diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -259,14 +259,19 @@
 
   MCSymbol *HwasanTagMismatchV2Sym =
       OutContext.getOrCreateSymbol("__hwasan_tag_mismatch_v2");
+  // Annotate symbol as one having incompatible calling convention, so
+  // run-time linkers can instead eagerly bind this function
+  cast<MCSymbolELF>(HwasanTagMismatchV2Sym)
+      ->setOther(ELF::STO_RISCV_VARIANT_CC);
 
   const MCSymbolRefExpr *HwasanTagMismatchV2Ref =
       MCSymbolRefExpr::create(HwasanTagMismatchV2Sym, OutContext);
+  auto Expr = RISCVMCExpr::create(HwasanTagMismatchV2Ref,
+                                  RISCVMCExpr::VK_RISCV_CALL, OutContext);
 
   for (auto &P : HwasanMemaccessSymbols) {
     unsigned Reg = std::get<0>(P.first);
     uint32_t AccessInfo = std::get<1>(P.first);
-    const MCSymbolRefExpr *HwasanTagMismatchRef = HwasanTagMismatchV2Ref;
     MCSymbol *Sym = P.second;
 
     unsigned Size =
@@ -443,39 +448,7 @@
             .addImm(AccessInfo & HWASanAccessInfo::RuntimeMask),
         *STI);
 
-    // Intentionally load the GOT entry and branch to it, rather than possibly
-    // late binding the function, which may clobber the registers before we have
-    // a chance to save them.
-    RISCVMCExpr::VariantKind VKHi;
-    unsigned SecondOpcode;
-    if (OutContext.getObjectFileInfo()->isPositionIndependent()) {
-      SecondOpcode = RISCV::LD;
-      VKHi = RISCVMCExpr::VK_RISCV_GOT_HI;
-    } else {
-      SecondOpcode = RISCV::ADDI;
-      VKHi = RISCVMCExpr::VK_RISCV_PCREL_HI;
-    }
-    auto ExprHi = RISCVMCExpr::create(HwasanTagMismatchRef, VKHi, OutContext);
-
-    MCSymbol *TmpLabel =
-        OutContext.createTempSymbol("pcrel_hi", /* AlwaysAddSuffix */ true);
-    OutStreamer->emitLabel(TmpLabel);
-    const MCExpr *ExprLo =
-        RISCVMCExpr::create(MCSymbolRefExpr::create(TmpLabel, OutContext),
-                            RISCVMCExpr::VK_RISCV_PCREL_LO, OutContext);
-
-    OutStreamer->emitInstruction(
-        MCInstBuilder(RISCV::AUIPC).addReg(RISCV::X6).addExpr(ExprHi), *STI);
-    OutStreamer->emitInstruction(MCInstBuilder(SecondOpcode)
-                                     .addReg(RISCV::X6)
-                                     .addReg(RISCV::X6)
-                                     .addExpr(ExprLo),
-                                 *STI);
-
-    OutStreamer->emitInstruction(MCInstBuilder(RISCV::JALR)
-                                     .addReg(RISCV::X0)
-                                     .addReg(RISCV::X6)
-                                     .addImm(0),
+    OutStreamer->emitInstruction(MCInstBuilder(RISCV::PseudoCALL).addExpr(Expr),
                                  *STI);
   }
 }