diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.h b/llvm/lib/Target/SPIRV/SPIRVBuiltins.h
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.h
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.h
@@ -22,19 +22,20 @@
 /// Lowers a builtin funtion call using the provided \p DemangledCall skeleton
 /// and external instruction \p Set.
 ///
-/// \return a pair of boolean values, the first true means the call recognized
-/// as a builtin, the second one indicates the successful lowering.
+/// \return the lowering success status if the called function is a recognized
+/// builtin, None otherwise.
 ///
 /// \p DemangledCall is the skeleton of the lowered builtin function call.
 /// \p Set is the external instruction set containing the given builtin.
 /// \p OrigRet is the single original virtual return register if defined,
 /// Register(0) otherwise. \p OrigRetTy is the type of the \p OrigRet. \p Args
 /// are the arguments of the lowered builtin call.
-std::pair<bool, bool>
-lowerBuiltin(const StringRef DemangledCall, InstructionSet::InstructionSet Set,
-             MachineIRBuilder &MIRBuilder, const Register OrigRet,
-             const Type *OrigRetTy, const SmallVectorImpl<Register> &Args,
-             SPIRVGlobalRegistry *GR);
+Optional<bool> lowerBuiltin(const StringRef DemangledCall,
+                            InstructionSet::InstructionSet Set,
+                            MachineIRBuilder &MIRBuilder,
+                            const Register OrigRet, const Type *OrigRetTy,
+                            const SmallVectorImpl<Register> &Args,
+                            SPIRVGlobalRegistry *GR);
 } // namespace SPIRV
 } // namespace llvm
 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVBUILTINS_H
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -1534,11 +1534,12 @@
 /// Lowers a builtin funtion call using the provided \p DemangledCall skeleton
 /// and external instruction \p Set.
 namespace SPIRV {
-std::pair<bool, bool>
-lowerBuiltin(const StringRef DemangledCall, InstructionSet::InstructionSet Set,
-             MachineIRBuilder &MIRBuilder, const Register OrigRet,
-             const Type *OrigRetTy, const SmallVectorImpl<Register> &Args,
-             SPIRVGlobalRegistry *GR) {
+Optional<bool> lowerBuiltin(const StringRef DemangledCall,
+                            SPIRV::InstructionSet::InstructionSet Set,
+                            MachineIRBuilder &MIRBuilder,
+                            const Register OrigRet, const Type *OrigRetTy,
+                            const SmallVectorImpl<Register> &Args,
+                            SPIRVGlobalRegistry *GR) {
   LLVM_DEBUG(dbgs() << "Lowering builtin call: " << DemangledCall << "\n");
 
   // SPIR-V type and return register.
@@ -1558,7 +1559,7 @@
 
   if (!Call) {
     LLVM_DEBUG(dbgs() << "Builtin record was not found!");
-    return {false, false};
+    return {};
   }
 
   // TODO: check if the provided args meet the builtin requirments.
@@ -1570,48 +1571,45 @@
   // Match the builtin with implementation based on the grouping.
   switch (Call->Builtin->Group) {
   case SPIRV::Extended:
-    return {true, generateExtInst(Call.get(), MIRBuilder, GR)};
+    return generateExtInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Relational:
-    return {true, generateRelationalInst(Call.get(), MIRBuilder, GR)};
+    return generateRelationalInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Group:
-    return {true, generateGroupInst(Call.get(), MIRBuilder, GR)};
+    return generateGroupInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Variable:
-    return {true, generateBuiltinVar(Call.get(), MIRBuilder, GR)};
+    return generateBuiltinVar(Call.get(), MIRBuilder, GR);
   case SPIRV::Atomic:
-    return {true, generateAtomicInst(Call.get(), MIRBuilder, GR)};
+    return generateAtomicInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Barrier:
-    return {true, generateBarrierInst(Call.get(), MIRBuilder, GR)};
+    return generateBarrierInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Dot:
-    return {true, generateDotOrFMulInst(Call.get(), MIRBuilder, GR)};
+    return generateDotOrFMulInst(Call.get(), MIRBuilder, GR);
   case SPIRV::GetQuery:
-    return {true, generateGetQueryInst(Call.get(), MIRBuilder, GR)};
+    return generateGetQueryInst(Call.get(), MIRBuilder, GR);
   case SPIRV::ImageSizeQuery:
-    return {true, generateImageSizeQueryInst(Call.get(), MIRBuilder, GR)};
+    return generateImageSizeQueryInst(Call.get(), MIRBuilder, GR);
   case SPIRV::ImageMiscQuery:
-    return {true, generateImageMiscQueryInst(Call.get(), MIRBuilder, GR)};
+    return generateImageMiscQueryInst(Call.get(), MIRBuilder, GR);
   case SPIRV::ReadImage:
-    return {true,
-            generateReadImageInst(DemangledCall, Call.get(), MIRBuilder, GR)};
+    return generateReadImageInst(DemangledCall, Call.get(), MIRBuilder, GR);
   case SPIRV::WriteImage:
-    return {true, generateWriteImageInst(Call.get(), MIRBuilder, GR)};
+    return generateWriteImageInst(Call.get(), MIRBuilder, GR);
   case SPIRV::SampleImage:
-    return {true,
-            generateSampleImageInst(DemangledCall, Call.get(), MIRBuilder, GR)};
+    return generateSampleImageInst(DemangledCall, Call.get(), MIRBuilder, GR);
   case SPIRV::Select:
-    return {true, generateSelectInst(Call.get(), MIRBuilder)};
+    return generateSelectInst(Call.get(), MIRBuilder);
   case SPIRV::SpecConstant:
-    return {true, generateSpecConstantInst(Call.get(), MIRBuilder, GR)};
+    return generateSpecConstantInst(Call.get(), MIRBuilder, GR);
   case SPIRV::Enqueue:
-    return {true, generateEnqueueInst(Call.get(), MIRBuilder, GR)};
+    return generateEnqueueInst(Call.get(), MIRBuilder, GR);
   case SPIRV::AsyncCopy:
-    return {true, generateAsyncCopy(Call.get(), MIRBuilder, GR)};
+    return generateAsyncCopy(Call.get(), MIRBuilder, GR);
   case SPIRV::Convert:
-    return {true,
-            generateConvertInst(DemangledCall, Call.get(), MIRBuilder, GR)};
+    return generateConvertInst(DemangledCall, Call.get(), MIRBuilder, GR);
   case SPIRV::VectorLoadStore:
-    return {true, generateVectorLoadStoreInst(Call.get(), MIRBuilder, GR)};
+    return generateVectorLoadStoreInst(Call.get(), MIRBuilder, GR);
   }
-  return {true, false};
+  return false;
 }
 } // namespace SPIRV
 } // namespace llvm
diff --git a/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp b/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
--- a/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
@@ -301,11 +301,10 @@
       SPIRVType *SPIRVTy = GR->getOrCreateSPIRVType(Arg.Ty, MIRBuilder);
       GR->assignSPIRVTypeToVReg(SPIRVTy, Arg.Regs[0], MIRBuilder.getMF());
     }
-    auto Res =
-        SPIRV::lowerBuiltin(DemangledName, SPIRV::InstructionSet::OpenCL_std,
-                            MIRBuilder, ResVReg, OrigRetTy, ArgVRegs, GR);
-    if (Res.first)
-      return Res.second;
+    if (auto Res = SPIRV::lowerBuiltin(
+            DemangledName, SPIRV::InstructionSet::OpenCL_std, MIRBuilder,
+            ResVReg, OrigRetTy, ArgVRegs, GR))
+      return *Res;
   }
   if (CF && CF->isDeclaration() &&
       !GR->find(CF, &MIRBuilder.getMF()).isValid()) {