diff --git a/llvm/test/Analysis/CostModel/RISCV/arith-fp.ll b/llvm/test/Analysis/CostModel/RISCV/arith-fp.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Analysis/CostModel/RISCV/arith-fp.ll @@ -0,0 +1,724 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 < %s | FileCheck %s +; Check that we don't crash querying costs when vectors are not enabled. +; RUN: opt -passes="print" 2>&1 -disable-output -mtriple=riscv64 + +define i32 @fadd() { +; CHECK-LABEL: 'fadd' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fadd half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fadd float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fadd double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F16 = fadd <1 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = fadd <2 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = fadd <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F16 = fadd <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F16 = fadd <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32F16 = fadd <32 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F16 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F16 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F16 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F16 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F16 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV32F16 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F32 = fadd <1 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = fadd <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = fadd <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = fadd <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = fadd <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F32 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F32 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F32 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F32 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F32 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F64 = fadd <1 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = fadd <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = fadd <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = fadd <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F64 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F64 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F64 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F64 = fadd undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fadd half undef, undef + %F32 = fadd float undef, undef + %F64 = fadd double undef, undef + + %V1F16 = fadd <1 x half> undef, undef + %V2F16 = fadd <2 x half> undef, undef + %V4F16 = fadd <4 x half> undef, undef + %V8F16 = fadd <8 x half> undef, undef + %V16F16 = fadd <16 x half> undef, undef + %V32F16 = fadd <32 x half> undef, undef + + %NXV1F16 = fadd undef, undef + %NXV2F16 = fadd undef, undef + %NXV4F16 = fadd undef, undef + %NXV8F16 = fadd undef, undef + %NXV16F16 = fadd undef, undef + %NXV32F16 = fadd undef, undef + + %V1F32 = fadd <1 x float> undef, undef + %V2F32 = fadd <2 x float> undef, undef + %V4F32 = fadd <4 x float> undef, undef + %V8F32 = fadd <8 x float> undef, undef + %V16F32 = fadd <16 x float> undef, undef + + %NXV1F32 = fadd undef, undef + %NXV2F32 = fadd undef, undef + %NXV4F32 = fadd undef, undef + %NXV8F32 = fadd undef, undef + %NXV16F32 = fadd undef, undef + + %V1F64 = fadd <1 x double> undef, undef + %V2F64 = fadd <2 x double> undef, undef + %V4F64 = fadd <4 x double> undef, undef + %V8F64 = fadd <8 x double> undef, undef + + %NXV1F64 = fadd undef, undef + %NXV2F64 = fadd undef, undef + %NXV4F64 = fadd undef, undef + %NXV8F64 = fadd undef, undef + + ret i32 undef +} + +define i32 @fsub() { +; CHECK-LABEL: 'fsub' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fsub half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fsub float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fsub double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F16 = fsub <1 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = fsub <2 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = fsub <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F16 = fsub <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F16 = fsub <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32F16 = fsub <32 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F16 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F16 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F16 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F16 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F16 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV32F16 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F32 = fsub <1 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = fsub <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = fsub <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = fsub <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = fsub <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F32 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F32 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F32 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F32 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F32 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F64 = fsub <1 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = fsub <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = fsub <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = fsub <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F64 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F64 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F64 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F64 = fsub undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fsub half undef, undef + %F32 = fsub float undef, undef + %F64 = fsub double undef, undef + + %V1F16 = fsub <1 x half> undef, undef + %V2F16 = fsub <2 x half> undef, undef + %V4F16 = fsub <4 x half> undef, undef + %V8F16 = fsub <8 x half> undef, undef + %V16F16 = fsub <16 x half> undef, undef + %V32F16 = fsub <32 x half> undef, undef + + %NXV1F16 = fsub undef, undef + %NXV2F16 = fsub undef, undef + %NXV4F16 = fsub undef, undef + %NXV8F16 = fsub undef, undef + %NXV16F16 = fsub undef, undef + %NXV32F16 = fsub undef, undef + + %V1F32 = fsub <1 x float> undef, undef + %V2F32 = fsub <2 x float> undef, undef + %V4F32 = fsub <4 x float> undef, undef + %V8F32 = fsub <8 x float> undef, undef + %V16F32 = fsub <16 x float> undef, undef + + %NXV1F32 = fsub undef, undef + %NXV2F32 = fsub undef, undef + %NXV4F32 = fsub undef, undef + %NXV8F32 = fsub undef, undef + %NXV16F32 = fsub undef, undef + + %V1F64 = fsub <1 x double> undef, undef + %V2F64 = fsub <2 x double> undef, undef + %V4F64 = fsub <4 x double> undef, undef + %V8F64 = fsub <8 x double> undef, undef + + %NXV1F64 = fsub undef, undef + %NXV2F64 = fsub undef, undef + %NXV4F64 = fsub undef, undef + %NXV8F64 = fsub undef, undef + + ret i32 undef +} + +define i32 @fmul() { +; CHECK-LABEL: 'fmul' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fmul half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fmul float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fmul double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F16 = fmul <1 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = fmul <2 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = fmul <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F16 = fmul <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F16 = fmul <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32F16 = fmul <32 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F16 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F16 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F16 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F16 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F16 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV32F16 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F32 = fmul <1 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = fmul <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = fmul <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = fmul <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = fmul <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F32 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F32 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F32 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F32 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F32 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F64 = fmul <1 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = fmul <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = fmul <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = fmul <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F64 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F64 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F64 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F64 = fmul undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fmul half undef, undef + %F32 = fmul float undef, undef + %F64 = fmul double undef, undef + + %V1F16 = fmul <1 x half> undef, undef + %V2F16 = fmul <2 x half> undef, undef + %V4F16 = fmul <4 x half> undef, undef + %V8F16 = fmul <8 x half> undef, undef + %V16F16 = fmul <16 x half> undef, undef + %V32F16 = fmul <32 x half> undef, undef + + %NXV1F16 = fmul undef, undef + %NXV2F16 = fmul undef, undef + %NXV4F16 = fmul undef, undef + %NXV8F16 = fmul undef, undef + %NXV16F16 = fmul undef, undef + %NXV32F16 = fmul undef, undef + + %V1F32 = fmul <1 x float> undef, undef + %V2F32 = fmul <2 x float> undef, undef + %V4F32 = fmul <4 x float> undef, undef + %V8F32 = fmul <8 x float> undef, undef + %V16F32 = fmul <16 x float> undef, undef + + %NXV1F32 = fmul undef, undef + %NXV2F32 = fmul undef, undef + %NXV4F32 = fmul undef, undef + %NXV8F32 = fmul undef, undef + %NXV16F32 = fmul undef, undef + + %V1F64 = fmul <1 x double> undef, undef + %V2F64 = fmul <2 x double> undef, undef + %V4F64 = fmul <4 x double> undef, undef + %V8F64 = fmul <8 x double> undef, undef + + %NXV1F64 = fmul undef, undef + %NXV2F64 = fmul undef, undef + %NXV4F64 = fmul undef, undef + %NXV8F64 = fmul undef, undef + + ret i32 undef +} + +define i32 @fdiv() { +; CHECK-LABEL: 'fdiv' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fdiv half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fdiv float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fdiv double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F16 = fdiv <1 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = fdiv <2 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = fdiv <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F16 = fdiv <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F16 = fdiv <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32F16 = fdiv <32 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F16 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F16 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F16 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F16 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F16 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV32F16 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F32 = fdiv <1 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = fdiv <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = fdiv <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = fdiv <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = fdiv <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F32 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F32 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F32 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F32 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F32 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F64 = fdiv <1 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = fdiv <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = fdiv <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = fdiv <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F64 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F64 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F64 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F64 = fdiv undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fdiv half undef, undef + %F32 = fdiv float undef, undef + %F64 = fdiv double undef, undef + + %V1F16 = fdiv <1 x half> undef, undef + %V2F16 = fdiv <2 x half> undef, undef + %V4F16 = fdiv <4 x half> undef, undef + %V8F16 = fdiv <8 x half> undef, undef + %V16F16 = fdiv <16 x half> undef, undef + %V32F16 = fdiv <32 x half> undef, undef + + %NXV1F16 = fdiv undef, undef + %NXV2F16 = fdiv undef, undef + %NXV4F16 = fdiv undef, undef + %NXV8F16 = fdiv undef, undef + %NXV16F16 = fdiv undef, undef + %NXV32F16 = fdiv undef, undef + + %V1F32 = fdiv <1 x float> undef, undef + %V2F32 = fdiv <2 x float> undef, undef + %V4F32 = fdiv <4 x float> undef, undef + %V8F32 = fdiv <8 x float> undef, undef + %V16F32 = fdiv <16 x float> undef, undef + + %NXV1F32 = fdiv undef, undef + %NXV2F32 = fdiv undef, undef + %NXV4F32 = fdiv undef, undef + %NXV8F32 = fdiv undef, undef + %NXV16F32 = fdiv undef, undef + + %V1F64 = fdiv <1 x double> undef, undef + %V2F64 = fdiv <2 x double> undef, undef + %V4F64 = fdiv <4 x double> undef, undef + %V8F64 = fdiv <8 x double> undef, undef + + %NXV1F64 = fdiv undef, undef + %NXV2F64 = fdiv undef, undef + %NXV4F64 = fdiv undef, undef + %NXV8F64 = fdiv undef, undef + + ret i32 undef +} + +define i32 @frem() { +; CHECK-LABEL: 'frem' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = frem half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = frem float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = frem double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V1F16 = frem <1 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2F16 = frem <2 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F16 = frem <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8F16 = frem <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16F16 = frem <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V32F16 = frem <32 x half> undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV1F16 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV2F16 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV4F16 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV8F16 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV16F16 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV32F16 = frem undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V1F32 = frem <1 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2F32 = frem <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F32 = frem <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8F32 = frem <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16F32 = frem <16 x float> undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV1F32 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV2F32 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV4F32 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV8F32 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV16F32 = frem undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V1F64 = frem <1 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2F64 = frem <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F64 = frem <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8F64 = frem <8 x double> undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV1F64 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV2F64 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV4F64 = frem undef, undef +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NXV8F64 = frem undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = frem half undef, undef + %F32 = frem float undef, undef + %F64 = frem double undef, undef + + %V1F16 = frem <1 x half> undef, undef + %V2F16 = frem <2 x half> undef, undef + %V4F16 = frem <4 x half> undef, undef + %V8F16 = frem <8 x half> undef, undef + %V16F16 = frem <16 x half> undef, undef + %V32F16 = frem <32 x half> undef, undef + + %NXV1F16 = frem undef, undef + %NXV2F16 = frem undef, undef + %NXV4F16 = frem undef, undef + %NXV8F16 = frem undef, undef + %NXV16F16 = frem undef, undef + %NXV32F16 = frem undef, undef + + %V1F32 = frem <1 x float> undef, undef + %V2F32 = frem <2 x float> undef, undef + %V4F32 = frem <4 x float> undef, undef + %V8F32 = frem <8 x float> undef, undef + %V16F32 = frem <16 x float> undef, undef + + %NXV1F32 = frem undef, undef + %NXV2F32 = frem undef, undef + %NXV4F32 = frem undef, undef + %NXV8F32 = frem undef, undef + %NXV16F32 = frem undef, undef + + %V1F64 = frem <1 x double> undef, undef + %V2F64 = frem <2 x double> undef, undef + %V4F64 = frem <4 x double> undef, undef + %V8F64 = frem <8 x double> undef, undef + + %NXV1F64 = frem undef, undef + %NXV2F64 = frem undef, undef + %NXV4F64 = frem undef, undef + %NXV8F64 = frem undef, undef + + ret i32 undef +} + +define i32 @fneg() { +; CHECK-LABEL: 'fneg' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fneg half undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fneg float undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fneg double undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F16 = fneg <1 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = fneg <2 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = fneg <4 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F16 = fneg <8 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F16 = fneg <16 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32F16 = fneg <32 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F16 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F16 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F16 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F16 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F16 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV32F16 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F32 = fneg <1 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = fneg <2 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = fneg <4 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F32 = fneg <8 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F32 = fneg <16 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F32 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F32 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F32 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F32 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV16F32 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1F64 = fneg <1 x double> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = fneg <2 x double> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = fneg <4 x double> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = fneg <8 x double> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV1F64 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV2F64 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV4F64 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NXV8F64 = fneg undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fneg half undef + %F32 = fneg float undef + %F64 = fneg double undef + + %V1F16 = fneg <1 x half> undef + %V2F16 = fneg <2 x half> undef + %V4F16 = fneg <4 x half> undef + %V8F16 = fneg <8 x half> undef + %V16F16 = fneg <16 x half> undef + %V32F16 = fneg <32 x half> undef + + %NXV1F16 = fneg undef + %NXV2F16 = fneg undef + %NXV4F16 = fneg undef + %NXV8F16 = fneg undef + %NXV16F16 = fneg undef + %NXV32F16 = fneg undef + + %V1F32 = fneg <1 x float> undef + %V2F32 = fneg <2 x float> undef + %V4F32 = fneg <4 x float> undef + %V8F32 = fneg <8 x float> undef + %V16F32 = fneg <16 x float> undef + + %NXV1F32 = fneg undef + %NXV2F32 = fneg undef + %NXV4F32 = fneg undef + %NXV8F32 = fneg undef + %NXV16F32 = fneg undef + + %V1F64 = fneg <1 x double> undef + %V2F64 = fneg <2 x double> undef + %V4F64 = fneg <4 x double> undef + %V8F64 = fneg <8 x double> undef + + %NXV1F64 = fneg undef + %NXV2F64 = fneg undef + %NXV4F64 = fneg undef + %NXV8F64 = fneg undef + + ret i32 undef +} + +define i32 @fcopysign() { +; CHECK-LABEL: 'fcopysign' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.copysign.f16(half undef, half undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.copysign.f64(double undef, double undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1F16 = call <1 x half> @llvm.copysign.v1f16(<1 x half> undef, <1 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F16 = call <2 x half> @llvm.copysign.v2f16(<2 x half> undef, <2 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.copysign.v4f16(<4 x half> undef, <4 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.copysign.v8f16(<8 x half> undef, <8 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = call <16 x half> @llvm.copysign.v16f16(<16 x half> undef, <16 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32F16 = call <32 x half> @llvm.copysign.v32f16(<32 x half> undef, <32 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV1F16 = call @llvm.copysign.nxv1f16( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV2F16 = call @llvm.copysign.nxv2f16( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV4F16 = call @llvm.copysign.nxv4f16( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV8F16 = call @llvm.copysign.nxv8f16( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV16F16 = call @llvm.copysign.nxv16f16( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV32F16 = call @llvm.copysign.nxv32f16( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1F32 = call <1 x float> @llvm.copysign.v1f32(<1 x float> undef, <1 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.copysign.v2f32(<2 x float> undef, <2 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV1F32 = call @llvm.copysign.nxv1f32( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV2F32 = call @llvm.copysign.nxv2f32( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV4F32 = call @llvm.copysign.nxv4f32( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV8F32 = call @llvm.copysign.nxv8f32( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV16F32 = call @llvm.copysign.nxv16f32( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1F64 = call <1 x double> @llvm.copysign.v1f64(<1 x double> undef, <1 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV1F64 = call @llvm.copysign.nxv1f64( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV2F64 = call @llvm.copysign.nxv2f64( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV4F64 = call @llvm.copysign.nxv4f64( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV8F64 = call @llvm.copysign.nxv8f64( undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = call half @llvm.copysign.f16(half undef, half undef) + %F32 = call float @llvm.copysign.f32(float undef, float undef) + %F64 = call double @llvm.copysign.f64(double undef, double undef) + + %V1F16 = call <1 x half> @llvm.copysign.v1f16(<1 x half> undef, <1 x half> undef) + %V2F16 = call <2 x half> @llvm.copysign.v2f16(<2 x half> undef, <2 x half> undef) + %V4F16 = call <4 x half> @llvm.copysign.v4f16(<4 x half> undef, <4 x half> undef) + %V8F16 = call <8 x half> @llvm.copysign.v8f16(<8 x half> undef, <8 x half> undef) + %V16F16 = call <16 x half> @llvm.copysign.v16f16(<16 x half> undef, <16 x half> undef) + %V32F16 = call <32 x half> @llvm.copysign.v32f16(<32 x half> undef, <32 x half> undef) + + %NXV1F16 = call @llvm.copysign.nxv1f16( undef, undef) + %NXV2F16 = call @llvm.copysign.nxv2f16( undef, undef) + %NXV4F16 = call @llvm.copysign.nxv4f16( undef, undef) + %NXV8F16 = call @llvm.copysign.nxv8f16( undef, undef) + %NXV16F16 = call @llvm.copysign.nxv16f16( undef, undef) + %NXV32F16 = call @llvm.copysign.nxv32f16( undef, undef) + + %V1F32 = call <1 x float> @llvm.copysign.v1f32(<1 x float> undef, <1 x float> undef) + %V2F32 = call <2 x float> @llvm.copysign.v2f32(<2 x float> undef, <2 x float> undef) + %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) + %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) + %V16F32 = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) + + %NXV1F32 = call @llvm.copysign.nxv1f32( undef, undef) + %NXV2F32 = call @llvm.copysign.nxv2f32( undef, undef) + %NXV4F32 = call @llvm.copysign.nxv4f32( undef, undef) + %NXV8F32 = call @llvm.copysign.nxv8f32( undef, undef) + %NXV16F32 = call @llvm.copysign.nxv16f32( undef, undef) + + %V1F64 = call <1 x double> @llvm.copysign.v1f64(<1 x double> undef, <1 x double> undef) + %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) + %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) + %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) + + %NXV1F64 = call @llvm.copysign.nxv1f64( undef, undef) + %NXV2F64 = call @llvm.copysign.nxv2f64( undef, undef) + %NXV4F64 = call @llvm.copysign.nxv4f64( undef, undef) + %NXV8F64 = call @llvm.copysign.nxv8f64( undef, undef) + + ret i32 undef +} + +define i32 @fma() { +; CHECK-LABEL: 'fma' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.fma.f16(half undef, half undef, half undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1F16 = call <1 x half> @llvm.fma.v1f16(<1 x half> undef, <1 x half> undef, <1 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F16 = call <2 x half> @llvm.fma.v2f16(<2 x half> undef, <2 x half> undef, <2 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.fma.v4f16(<4 x half> undef, <4 x half> undef, <4 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.fma.v8f16(<8 x half> undef, <8 x half> undef, <8 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = call <16 x half> @llvm.fma.v16f16(<16 x half> undef, <16 x half> undef, <16 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32F16 = call <32 x half> @llvm.fma.v32f16(<32 x half> undef, <32 x half> undef, <32 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV1F16 = call @llvm.fma.nxv1f16( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV2F16 = call @llvm.fma.nxv2f16( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV4F16 = call @llvm.fma.nxv4f16( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV8F16 = call @llvm.fma.nxv8f16( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV16F16 = call @llvm.fma.nxv16f16( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV32F16 = call @llvm.fma.nxv32f16( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1F32 = call <1 x float> @llvm.fma.v1f32(<1 x float> undef, <1 x float> undef, <1 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.fma.v2f32(<2 x float> undef, <2 x float> undef, <2 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV1F32 = call @llvm.fma.nxv1f32( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV2F32 = call @llvm.fma.nxv2f32( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV4F32 = call @llvm.fma.nxv4f32( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV8F32 = call @llvm.fma.nxv8f32( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV16F32 = call @llvm.fma.nxv16f32( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1F64 = call <1 x double> @llvm.fma.v1f64(<1 x double> undef, <1 x double> undef, <1 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV1F64 = call @llvm.fma.nxv1f64( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV2F64 = call @llvm.fma.nxv2f64( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV4F64 = call @llvm.fma.nxv4f64( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NXV8F64 = call @llvm.fma.nxv8f64( undef, undef, undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = call half @llvm.fma.f16(half undef, half undef, half undef) + %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) + %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) + + %V1F16 = call <1 x half> @llvm.fma.v1f16(<1 x half> undef, <1 x half> undef, <1 x half> undef) + %V2F16 = call <2 x half> @llvm.fma.v2f16(<2 x half> undef, <2 x half> undef, <2 x half> undef) + %V4F16 = call <4 x half> @llvm.fma.v4f16(<4 x half> undef, <4 x half> undef, <4 x half> undef) + %V8F16 = call <8 x half> @llvm.fma.v8f16(<8 x half> undef, <8 x half> undef, <8 x half> undef) + %V16F16 = call <16 x half> @llvm.fma.v16f16(<16 x half> undef, <16 x half> undef, <16 x half> undef) + %V32F16 = call <32 x half> @llvm.fma.v32f16(<32 x half> undef, <32 x half> undef, <32 x half> undef) + + %NXV1F16 = call @llvm.fma.nxv1f16( undef, undef, undef) + %NXV2F16 = call @llvm.fma.nxv2f16( undef, undef, undef) + %NXV4F16 = call @llvm.fma.nxv4f16( undef, undef, undef) + %NXV8F16 = call @llvm.fma.nxv8f16( undef, undef, undef) + %NXV16F16 = call @llvm.fma.nxv16f16( undef, undef, undef) + %NXV32F16 = call @llvm.fma.nxv32f16( undef, undef, undef) + + %V1F32 = call <1 x float> @llvm.fma.v1f32(<1 x float> undef, <1 x float> undef, <1 x float> undef) + %V2F32 = call <2 x float> @llvm.fma.v2f32(<2 x float> undef, <2 x float> undef, <2 x float> undef) + %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) + %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) + %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) + + %NXV1F32 = call @llvm.fma.nxv1f32( undef, undef, undef) + %NXV2F32 = call @llvm.fma.nxv2f32( undef, undef, undef) + %NXV4F32 = call @llvm.fma.nxv4f32( undef, undef, undef) + %NXV8F32 = call @llvm.fma.nxv8f32( undef, undef, undef) + %NXV16F32 = call @llvm.fma.nxv16f32( undef, undef, undef) + + %V1F64 = call <1 x double> @llvm.fma.v1f64(<1 x double> undef, <1 x double> undef, <1 x double> undef) + %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) + %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) + %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) + + %NXV1F64 = call @llvm.fma.nxv1f64( undef, undef, undef) + %NXV2F64 = call @llvm.fma.nxv2f64( undef, undef, undef) + %NXV4F64 = call @llvm.fma.nxv4f64( undef, undef, undef) + %NXV8F64 = call @llvm.fma.nxv8f64( undef, undef, undef) + + ret i32 undef +} + +declare half @llvm.copysign.f16(half, half) +declare float @llvm.copysign.f32(float, float) +declare double @llvm.copysign.f64(double, double) + +declare <1 x half> @llvm.copysign.v1f16(<1 x half>, <1 x half>) +declare <2 x half> @llvm.copysign.v2f16(<2 x half>, <2 x half>) +declare <4 x half> @llvm.copysign.v4f16(<4 x half>, <4 x half>) +declare <8 x half> @llvm.copysign.v8f16(<8 x half>, <8 x half>) +declare <16 x half> @llvm.copysign.v16f16(<16 x half>, <16 x half>) +declare <32 x half> @llvm.copysign.v32f16(<32 x half>, <32 x half>) + +declare @llvm.copysign.nxv1f16(, ) +declare @llvm.copysign.nxv2f16(, ) +declare @llvm.copysign.nxv4f16(, ) +declare @llvm.copysign.nxv8f16(, ) +declare @llvm.copysign.nxv16f16(, ) +declare @llvm.copysign.nxv32f16(, ) + +declare <1 x float> @llvm.copysign.v1f32(<1 x float>, <1 x float>) +declare <2 x float> @llvm.copysign.v2f32(<2 x float>, <2 x float>) +declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>) +declare <8 x float> @llvm.copysign.v8f32(<8 x float>, <8 x float>) +declare <16 x float> @llvm.copysign.v16f32(<16 x float>, <16 x float>) + +declare @llvm.copysign.nxv1f32(, ) +declare @llvm.copysign.nxv2f32(, ) +declare @llvm.copysign.nxv4f32(, ) +declare @llvm.copysign.nxv8f32(, ) +declare @llvm.copysign.nxv16f32(, ) + +declare <1 x double> @llvm.copysign.v1f64(<1 x double>, <1 x double>) +declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>) +declare <4 x double> @llvm.copysign.v4f64(<4 x double>, <4 x double>) +declare <8 x double> @llvm.copysign.v8f64(<8 x double>, <8 x double>) + +declare @llvm.copysign.nxv1f64(, ) +declare @llvm.copysign.nxv2f64(, ) +declare @llvm.copysign.nxv4f64(, ) +declare @llvm.copysign.nxv8f64(, ) + +declare half @llvm.fma.f16(half, half, half) +declare float @llvm.fma.f32(float, float, float) +declare double @llvm.fma.f64(double, double, double) + +declare <1 x half> @llvm.fma.v1f16(<1 x half>, <1 x half>, <1 x half>) +declare <2 x half> @llvm.fma.v2f16(<2 x half>, <2 x half>, <2 x half>) +declare <4 x half> @llvm.fma.v4f16(<4 x half>, <4 x half>, <4 x half>) +declare <8 x half> @llvm.fma.v8f16(<8 x half>, <8 x half>, <8 x half>) +declare <16 x half> @llvm.fma.v16f16(<16 x half>, <16 x half>, <16 x half>) +declare <32 x half> @llvm.fma.v32f16(<32 x half>, <32 x half>, <32 x half>) + +declare @llvm.fma.nxv1f16(, , ) +declare @llvm.fma.nxv2f16(, , ) +declare @llvm.fma.nxv4f16(, , ) +declare @llvm.fma.nxv8f16(, , ) +declare @llvm.fma.nxv16f16(, , ) +declare @llvm.fma.nxv32f16(, , ) + +declare <1 x float> @llvm.fma.v1f32(<1 x float>, <1 x float>, <1 x float>) +declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) +declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) +declare <8 x float> @llvm.fma.v8f32(<8 x float>, <8 x float>, <8 x float>) +declare <16 x float> @llvm.fma.v16f32(<16 x float>, <16 x float>, <16 x float>) + +declare @llvm.fma.nxv1f32(, , ) +declare @llvm.fma.nxv2f32(, , ) +declare @llvm.fma.nxv4f32(, , ) +declare @llvm.fma.nxv8f32(, , ) +declare @llvm.fma.nxv16f32(, , ) + +declare <1 x double> @llvm.fma.v1f64(<1 x double>, <1 x double>, <1 x double>) +declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) +declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>) +declare <8 x double> @llvm.fma.v8f64(<8 x double>, <8 x double>, <8 x double>) + +declare @llvm.fma.nxv1f64(, , ) +declare @llvm.fma.nxv2f64(, , ) +declare @llvm.fma.nxv4f64(, , ) +declare @llvm.fma.nxv8f64(, , )