diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
@@ -83,7 +83,7 @@
     case RISCV::fixup_riscv_rvc_branch:
       return ELF::R_RISCV_RVC_BRANCH;
     case RISCV::fixup_riscv_call:
-      return ELF::R_RISCV_CALL;
+      return ELF::R_RISCV_CALL_PLT;
     case RISCV::fixup_riscv_call_plt:
       return ELF::R_RISCV_CALL_PLT;
     case RISCV::fixup_riscv_add_8:
diff --git a/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s b/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s
--- a/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s
+++ b/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s
@@ -41,10 +41,12 @@
 # Test R_RISCV_CALL
 # jitlink-check: decode_operand(test_call, 1) = ((external_func - test_call) + 0x800)[31:12]
 # jitlink-check: decode_operand(test_call+4, 2)[11:0] = (external_func - test_call)[11:0]
-        .globl test_call
+        .globl test_call, external_func
         .p2align  1
         .type  test_call,@function
 test_call:
-        call external_func
+        .reloc ., R_RISCV_CALL, external_func
+        auipc ra, 0
+        jalr ra
         ret
         .size test_call, .-test_call
diff --git a/llvm/test/MC/RISCV/function-call.s b/llvm/test/MC/RISCV/function-call.s
--- a/llvm/test/MC/RISCV/function-call.s
+++ b/llvm/test/MC/RISCV/function-call.s
@@ -8,12 +8,12 @@
 .long foo
 
 call foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
 call bar
-# RELOC: R_RISCV_CALL bar 0x0
+# RELOC: R_RISCV_CALL_PLT bar 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
@@ -21,25 +21,25 @@
 # Ensure that calls to functions whose names coincide with register names work.
 
 call zero
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
 
 call f1
-# RELOC: R_RISCV_CALL f1 0x0
+# RELOC: R_RISCV_CALL_PLT f1 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: f1, kind: fixup_riscv_call
 
 call ra
-# RELOC: R_RISCV_CALL ra 0x0
+# RELOC: R_RISCV_CALL_PLT ra 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: ra, kind: fixup_riscv_call
 
 call mstatus
-# RELOC: R_RISCV_CALL mstatus 0x0
+# RELOC: R_RISCV_CALL_PLT mstatus 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: mstatus, kind: fixup_riscv_call
@@ -55,7 +55,7 @@
 # Ensure that an explicit register operand can be parsed.
 
 call a0, foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc a0, 0
 # INSTR: jalr  a0
 # FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
diff --git a/llvm/test/MC/RISCV/linker-relaxation.s b/llvm/test/MC/RISCV/linker-relaxation.s
--- a/llvm/test/MC/RISCV/linker-relaxation.s
+++ b/llvm/test/MC/RISCV/linker-relaxation.s
@@ -14,9 +14,9 @@
 .long foo
 
 call foo
-# NORELAX-RELOC: R_RISCV_CALL foo 0x0
+# NORELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
 # NORELAX-RELOC-NOT: R_RISCV_RELAX
-# RELAX-RELOC: R_RISCV_CALL foo 0x0
+# RELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
 # RELAX-RELOC: R_RISCV_RELAX - 0x0
 # RELAX-FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
 # RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
@@ -83,7 +83,7 @@
 call bar
 # NORELAX-RELOC-NOT: R_RISCV_CALL
 # NORELAX-RELOC-NOT: R_RISCV_RELAX
-# RELAX-RELOC: R_RISCV_CALL bar 0x0
+# RELAX-RELOC: R_RISCV_CALL_PLT bar 0x0
 # RELAX-RELOC: R_RISCV_RELAX - 0x0
 # RELAX-FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
 # RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
diff --git a/llvm/test/MC/RISCV/option-pushpop.s b/llvm/test/MC/RISCV/option-pushpop.s
--- a/llvm/test/MC/RISCV/option-pushpop.s
+++ b/llvm/test/MC/RISCV/option-pushpop.s
@@ -20,7 +20,7 @@
 # where .option pop was last used.
 
 # CHECK-INST: call foo
-# CHECK-RELOC: R_RISCV_CALL foo 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT foo 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call foo
 
@@ -35,7 +35,7 @@
 .option relax
 # CHECK-INST: .option relax
 # CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
 # CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
 call bar
 
@@ -57,14 +57,14 @@
 addi s0, sp, 1020
 
 # CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
 # CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
 call bar
 
 .option pop     # Pop relax=false, rvc=false
 # CHECK-INST: .option pop
 # CHECK-INST: call baz
-# CHECK-RELOC: R_RISCV_CALL baz 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT baz 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call baz
 
diff --git a/llvm/test/MC/RISCV/option-relax.s b/llvm/test/MC/RISCV/option-relax.s
--- a/llvm/test/MC/RISCV/option-relax.s
+++ b/llvm/test/MC/RISCV/option-relax.s
@@ -20,7 +20,7 @@
 # CHECK-INST: .option norelax
 
 # CHECK-INST: call foo
-# CHECK-RELOC: R_RISCV_CALL foo 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT foo 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call foo
 
@@ -37,7 +37,7 @@
 # CHECK-INST: .option relax
 
 # CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
 # CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
 call bar
 
@@ -53,7 +53,7 @@
 # CHECK-INST: .option norelax
 
 # CHECK-INST: call baz
-# CHECK-RELOC-NEXT: R_RISCV_CALL baz 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT baz 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call baz
 
diff --git a/llvm/test/MC/RISCV/pseudo-jump.s b/llvm/test/MC/RISCV/pseudo-jump.s
--- a/llvm/test/MC/RISCV/pseudo-jump.s
+++ b/llvm/test/MC/RISCV/pseudo-jump.s
@@ -8,7 +8,7 @@
 .long foo
 
 jump foo, x31
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc t6, 0
 # INSTR: jr  t6
 # FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
@@ -16,7 +16,7 @@
 # Ensure that jumps to symbols whose names coincide with register names work.
 
 jump zero, x1
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
 # INSTR: auipc ra, 0
 # INSTR: ret
 # FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
diff --git a/llvm/test/MC/RISCV/tail-call.s b/llvm/test/MC/RISCV/tail-call.s
--- a/llvm/test/MC/RISCV/tail-call.s
+++ b/llvm/test/MC/RISCV/tail-call.s
@@ -15,12 +15,12 @@
 .long foo
 
 tail foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: foo, kind:
 tail bar
-# RELOC: R_RISCV_CALL bar 0x0
+# RELOC: R_RISCV_CALL_PLT bar 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: bar, kind:
@@ -29,19 +29,19 @@
 # work.
 
 tail zero
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: zero, kind:
 
 tail f1
-# RELOC: R_RISCV_CALL f1 0x0
+# RELOC: R_RISCV_CALL_PLT f1 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: f1, kind:
 
 tail ra
-# RELOC: R_RISCV_CALL ra 0x0
+# RELOC: R_RISCV_CALL_PLT ra 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: ra, kind: