Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -3630,7 +3630,7 @@
       SDLoc DL(Op);
 
       // If the RHS is a constant in the range [-2049, 0) or (0, 2046], we can
-      // convert this to the equivalent of (set(u)ge X, C+1) by using
+      // convert this to the equivalent of (set(u)ge X, C) by using
       // (xori (slti(u) X, C+1), 1). This avoids materializing a small constant
       // in a register.
       if (isa<ConstantSDNode>(RHS)) {
Index: llvm/lib/Target/RISCV/RISCVInstrInfo.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -366,15 +366,6 @@
 def simm12_plus1 : ImmLeaf<XLenVT,
   [{return (isInt<12>(Imm) && Imm != -2048) || Imm == 2048;}]>;
 
-// A 12-bit signed immediate sub one and exclude zero
-def simm12_minus1_nonzero : PatLeaf<(imm), [{
-  if (!N->hasOneUse())
-    return false;
-  // The immediate operand must be in range [-2049, 0) or (0, 2046].
-  int64_t Imm = N->getSExtValue();
-  return (Imm >= -2049 && Imm < 0) || (Imm > 0 && Imm <= 2046);
-}]>;
-
 // A 6-bit constant greater than 32.
 def uimm6gt32 : ImmLeaf<XLenVT, [{
   return isUInt<6>(Imm) && Imm > 32;
@@ -398,12 +389,6 @@
                                    N->getValueType(0));
 }]>;
 
-// Return an immediate value plus 1.
-def ImmPlus1 : SDNodeXForm<imm, [{
-  return CurDAG->getTargetConstant(N->getSExtValue() + 1, SDLoc(N),
-                                   N->getValueType(0));
-}]>;
-
 // Return an immediate subtracted from XLen.
 def ImmSubFromXLen : SDNodeXForm<imm, [{
   uint64_t XLen = Subtarget->getXLen();