diff --git a/clang/test/CodeGen/aarch64-ls64-inline-asm.c b/clang/test/CodeGen/aarch64-ls64-inline-asm.c --- a/clang/test/CodeGen/aarch64-ls64-inline-asm.c +++ b/clang/test/CodeGen/aarch64-ls64-inline-asm.c @@ -5,7 +5,7 @@ // CHECK-LABEL: @load( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i512 asm sideeffect "ld64b $0,[$1]", "=r,r,~{memory}"(i8* [[ADDR:%.*]]) #[[ATTR1:[0-9]+]], !srcloc !2 +// CHECK-NEXT: [[TMP0:%.*]] = call i512 asm sideeffect "ld64b $0,[$1]", "=r,r,~{memory}"(i8* [[ADDR:%.*]]) #[[ATTR1:[0-9]+]], !srcloc !2 // CHECK-NEXT: [[TMP1:%.*]] = bitcast %struct.foo* [[OUTPUT:%.*]] to i512* // CHECK-NEXT: store i512 [[TMP0]], i512* [[TMP1]], align 8 // CHECK-NEXT: ret void @@ -19,7 +19,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct.foo* [[INPUT:%.*]] to i512* // CHECK-NEXT: [[TMP1:%.*]] = load i512, i512* [[TMP0]], align 8 -// CHECK-NEXT: tail call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 [[TMP1]], i8* [[ADDR:%.*]]) #[[ATTR1]], !srcloc !3 +// CHECK-NEXT: call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 [[TMP1]], i8* [[ADDR:%.*]]) #[[ATTR1]], !srcloc !3 // CHECK-NEXT: ret void // void store(const struct foo *input, void *addr) @@ -74,7 +74,7 @@ // CHECK-NEXT: [[S_SROA_0_0_INSERT_EXT:%.*]] = zext i64 [[CONV]] to i512 // CHECK-NEXT: [[S_SROA_0_0_INSERT_MASK:%.*]] = or i512 [[S_SROA_4_0_INSERT_MASK]], [[S_SROA_4_0_INSERT_SHIFT]] // CHECK-NEXT: [[S_SROA_0_0_INSERT_INSERT:%.*]] = or i512 [[S_SROA_0_0_INSERT_MASK]], [[S_SROA_0_0_INSERT_EXT]] -// CHECK-NEXT: tail call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 [[S_SROA_0_0_INSERT_INSERT]], i8* [[ADDR:%.*]]) #[[ATTR1]], !srcloc !8 +// CHECK-NEXT: call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 [[S_SROA_0_0_INSERT_INSERT]], i8* [[ADDR:%.*]]) #[[ATTR1]], !srcloc !8 // CHECK-NEXT: ret void // void store2(int *in, void *addr) diff --git a/clang/test/CodeGen/aarch64-neon-vcmla.c b/clang/test/CodeGen/aarch64-neon-vcmla.c --- a/clang/test/CodeGen/aarch64-neon-vcmla.c +++ b/clang/test/CodeGen/aarch64-neon-vcmla.c @@ -8,140 +8,140 @@ #include // CHECK-LABEL: @test_vcmla_f16( -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmla_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot0.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot0.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_f16( -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot0.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot0.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_f32( -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_f64( -// CHECK: [[RES:%.*]] = tail call <2 x double> @llvm.aarch64.neon.vcmla.rot0.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) +// CHECK: [[RES:%.*]] = call <2 x double> @llvm.aarch64.neon.vcmla.rot0.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) // CHECK: ret <2 x double> [[RES]] float64x2_t test_vcmlaq_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) { return vcmlaq_f64(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmla_rot90_f16( -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot90_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_rot90_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmla_rot90_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot90.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot90.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot90_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_rot90_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot90_f16( -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot90.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot90.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot90_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_rot90_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot90_f32( -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot90_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_rot90_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot90_f64( -// CHECK: [[RES:%.*]] = tail call <2 x double> @llvm.aarch64.neon.vcmla.rot90.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) +// CHECK: [[RES:%.*]] = call <2 x double> @llvm.aarch64.neon.vcmla.rot90.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) // CHECK: ret <2 x double> [[RES]] float64x2_t test_vcmlaq_rot90_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) { return vcmlaq_rot90_f64(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmla_rot180_f16( -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot180_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_rot180_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmla_rot180_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot180.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot180.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot180_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_rot180_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot180_f16( -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot180.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot180.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot180_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_rot180_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot180_f32( -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot180_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_rot180_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot180_f64( -// CHECK: [[RES:%.*]] = tail call <2 x double> @llvm.aarch64.neon.vcmla.rot180.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) +// CHECK: [[RES:%.*]] = call <2 x double> @llvm.aarch64.neon.vcmla.rot180.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) // CHECK: ret <2 x double> [[RES]] float64x2_t test_vcmlaq_rot180_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) { return vcmlaq_rot180_f64(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmla_rot270_f16( -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> %rhs) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot270_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_rot270_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmla_rot270_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot270.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot270.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot270_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_rot270_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot270_f16( -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot270.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot270.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> %rhs) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot270_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_rot270_f16(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot270_f32( -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> %rhs) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot270_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_rot270_f32(acc, lhs, rhs); } // CHECK-LABEL: @test_vcmlaq_rot270_f64( -// CHECK: [[RES:%.*]] = tail call <2 x double> @llvm.aarch64.neon.vcmla.rot270.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) +// CHECK: [[RES:%.*]] = call <2 x double> @llvm.aarch64.neon.vcmla.rot270.v2f64(<2 x double> %acc, <2 x double> %lhs, <2 x double> %rhs) // CHECK: ret <2 x double> [[RES]] float64x2_t test_vcmlaq_rot270_f64(float64x2_t acc, float64x2_t lhs, float64x2_t rhs) { return vcmlaq_rot270_f64(acc, lhs, rhs); @@ -149,7 +149,7 @@ // CHECK-LABEL: @test_vcmla_lane_f16( // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_lane_f16(acc, lhs, rhs, 1); @@ -160,7 +160,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <2 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot0.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_laneq_f16(float16x4_t acc, float16x4_t lhs, float16x8_t rhs) { return vcmla_laneq_f16(acc, lhs, rhs, 3); @@ -170,7 +170,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot0.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot0.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_lane_f16(float16x8_t acc, float16x8_t lhs, float16x4_t rhs) { return vcmlaq_lane_f16(acc, lhs, rhs, 1); @@ -180,14 +180,14 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot0.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot0.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_laneq_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_laneq_f16(acc, lhs, rhs, 3); } // CHECK-LABEL: @test_vcmla_lane_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot0.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot0.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_lane_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_lane_f32(acc, lhs, rhs, 0); @@ -198,7 +198,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <1 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <1 x i64> [[DUP]] to <2 x float> -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot0.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot0.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { return vcmla_laneq_f32(acc, lhs, rhs, 1); @@ -209,7 +209,7 @@ // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[CPLX_VEC]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { return vcmlaq_lane_f32(acc, lhs, rhs, 0); @@ -217,7 +217,7 @@ // CHECK-LABEL: @test_vcmlaq_laneq_f32( // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot0.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_laneq_f32(acc, lhs, rhs, 1); @@ -225,7 +225,7 @@ // CHECK-LABEL: @test_vcmla_rot90_lane_f16( // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot90_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_rot90_lane_f16(acc, lhs, rhs, 1); @@ -236,7 +236,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <2 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot90.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot90_laneq_f16(float16x4_t acc, float16x4_t lhs, float16x8_t rhs) { return vcmla_rot90_laneq_f16(acc, lhs, rhs, 3); @@ -246,7 +246,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot90.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot90.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot90_lane_f16(float16x8_t acc, float16x8_t lhs, float16x4_t rhs) { return vcmlaq_rot90_lane_f16(acc, lhs, rhs, 1); @@ -256,14 +256,14 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot90.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot90.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot90_laneq_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_rot90_laneq_f16(acc, lhs, rhs, 3); } // CHECK-LABEL: @test_vcmla_rot90_lane_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot90.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot90.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot90_lane_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_rot90_lane_f32(acc, lhs, rhs, 0); @@ -274,7 +274,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <1 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <1 x i64> [[DUP]] to <2 x float> -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot90.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot90.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot90_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { return vcmla_rot90_laneq_f32(acc, lhs, rhs, 1); @@ -285,7 +285,7 @@ // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[CPLX_VEC]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot90_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { return vcmlaq_rot90_lane_f32(acc, lhs, rhs, 0); @@ -293,7 +293,7 @@ // CHECK-LABEL: @test_vcmlaq_rot90_laneq_f32( // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot90.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot90_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_rot90_laneq_f32(acc, lhs, rhs, 1); @@ -301,7 +301,7 @@ // CHECK-LABEL: @test_vcmla_rot180_lane_f16( // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot180_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_rot180_lane_f16(acc, lhs, rhs, 1); @@ -312,7 +312,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <2 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot180.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot180_laneq_f16(float16x4_t acc, float16x4_t lhs, float16x8_t rhs) { return vcmla_rot180_laneq_f16(acc, lhs, rhs, 3); @@ -322,7 +322,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot180.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot180.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot180_lane_f16(float16x8_t acc, float16x8_t lhs, float16x4_t rhs) { return vcmlaq_rot180_lane_f16(acc, lhs, rhs, 1); @@ -332,14 +332,14 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot180.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot180.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot180_laneq_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_rot180_laneq_f16(acc, lhs, rhs, 3); } // CHECK-LABEL: @test_vcmla_rot180_lane_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot180.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot180.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot180_lane_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_rot180_lane_f32(acc, lhs, rhs, 0); @@ -350,7 +350,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <1 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <1 x i64> [[DUP]] to <2 x float> -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot180.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot180.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot180_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { return vcmla_rot180_laneq_f32(acc, lhs, rhs, 1); @@ -361,7 +361,7 @@ // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[CPLX_VEC]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot180_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { return vcmlaq_rot180_lane_f32(acc, lhs, rhs, 0); @@ -369,7 +369,7 @@ // CHECK-LABEL: @test_vcmlaq_rot180_laneq_f32( // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot180.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot180_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_rot180_laneq_f32(acc, lhs, rhs, 1); @@ -377,7 +377,7 @@ // CHECK-LABEL: @test_vcmla_rot270_lane_f16( // CHECK: [[DUP:%.*]] = shufflevector <4 x half> %rhs, <4 x half> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot270_lane_f16(float16x4_t acc, float16x4_t lhs, float16x4_t rhs) { return vcmla_rot270_lane_f16(acc, lhs, rhs, 1); @@ -388,7 +388,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <2 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <2 x i32> [[DUP]] to <4 x half> -// CHECK: [[RES:%.*]] = tail call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <4 x half> @llvm.aarch64.neon.vcmla.rot270.v4f16(<4 x half> %acc, <4 x half> %lhs, <4 x half> [[DUP_FLT]]) // CHECK: ret <4 x half> [[RES]] float16x4_t test_vcmla_rot270_laneq_f16(float16x4_t acc, float16x4_t lhs, float16x8_t rhs) { return vcmla_rot270_laneq_f16(acc, lhs, rhs, 3); @@ -398,7 +398,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x half> %rhs to <2 x i32> // CHECK: [[DUP:%.*]] = shufflevector <2 x i32> [[CPLX]], <2 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot270.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot270.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot270_lane_f16(float16x8_t acc, float16x8_t lhs, float16x4_t rhs) { return vcmlaq_rot270_lane_f16(acc, lhs, rhs, 1); @@ -408,14 +408,14 @@ // CHECK: [[CPLX:%.*]] = bitcast <8 x half> %rhs to <4 x i32> // CHECK: [[DUP:%.*]] = shufflevector <4 x i32> [[CPLX]], <4 x i32> undef, <4 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <4 x i32> [[DUP]] to <8 x half> -// CHECK: [[RES:%.*]] = tail call <8 x half> @llvm.aarch64.neon.vcmla.rot270.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <8 x half> @llvm.aarch64.neon.vcmla.rot270.v8f16(<8 x half> %acc, <8 x half> %lhs, <8 x half> [[DUP_FLT]]) // CHECK: ret <8 x half> [[RES]] float16x8_t test_vcmlaq_rot270_laneq_f16(float16x8_t acc, float16x8_t lhs, float16x8_t rhs) { return vcmlaq_rot270_laneq_f16(acc, lhs, rhs, 3); } // CHECK-LABEL: @test_vcmla_rot270_lane_f32( -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot270.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot270.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> %rhs) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot270_lane_f32(float32x2_t acc, float32x2_t lhs, float32x2_t rhs) { return vcmla_rot270_lane_f32(acc, lhs, rhs, 0); @@ -426,7 +426,7 @@ // CHECK: [[CPLX:%.*]] = bitcast <4 x float> %rhs to <2 x i64> // CHECK: [[DUP:%.*]] = shufflevector <2 x i64> [[CPLX]], <2 x i64> undef, <1 x i32> // CHECK: [[DUP_FLT:%.*]] = bitcast <1 x i64> [[DUP]] to <2 x float> -// CHECK: [[RES:%.*]] = tail call <2 x float> @llvm.aarch64.neon.vcmla.rot270.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) +// CHECK: [[RES:%.*]] = call <2 x float> @llvm.aarch64.neon.vcmla.rot270.v2f32(<2 x float> %acc, <2 x float> %lhs, <2 x float> [[DUP_FLT]]) // CHECK: ret <2 x float> [[RES]] float32x2_t test_vcmla_rot270_laneq_f32(float32x2_t acc, float32x2_t lhs, float32x4_t rhs) { return vcmla_rot270_laneq_f32(acc, lhs, rhs, 1); @@ -437,7 +437,7 @@ // CHECK: [[CPLX_VEC:%.*]] = insertelement <2 x i64> undef, i64 [[CPLX]], i64 0 // CHECK: [[CPLX2:%.*]] = bitcast <2 x i64> [[DUP]] to <4 x float> // CHECK: [[DUP:%.*]] = shufflevector <4 x float> [[CPLX2]], <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot270_lane_f32(float32x4_t acc, float32x4_t lhs, float32x2_t rhs) { return vcmlaq_rot270_lane_f32(acc, lhs, rhs, 0); @@ -445,7 +445,7 @@ // CHECK-LABEL: @test_vcmlaq_rot270_laneq_f32( // CHECK: [[DUP:%.*]] = shufflevector <4 x float> %rhs, <4 x float> poison, <4 x i32> -// CHECK: [[RES:%.*]] = tail call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) +// CHECK: [[RES:%.*]] = call <4 x float> @llvm.aarch64.neon.vcmla.rot270.v4f32(<4 x float> %acc, <4 x float> %lhs, <4 x float> [[DUP]]) // CHECK: ret <4 x float> [[RES]] float32x4_t test_vcmlaq_rot270_laneq_f32(float32x4_t acc, float32x4_t lhs, float32x4_t rhs) { return vcmlaq_rot270_laneq_f32(acc, lhs, rhs, 1); diff --git a/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c b/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c --- a/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c +++ b/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c @@ -52,20 +52,20 @@ typedef int8_t vec_int8 __attribute__((vector_size(N / 8))); // CHECK128-LABEL: define{{.*}} <16 x i8> @f2(<16 x i8> noundef %x) // CHECK128-NEXT: entry: -// CHECK128-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[X:%.*]], i64 0) -// CHECK128-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[TMP0]], [[CASTSCALABLESVE]], i32 1) -// CHECK128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[TMP1]], i64 0) +// CHECK128-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[X:%.*]], i64 0) +// CHECK128-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[TMP0]], [[CASTSCALABLESVE]], i32 1) +// CHECK128-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[TMP1]], i64 0) // CHECK128-NEXT: ret <16 x i8> [[CASTFIXEDSVE]] // CHECK-LABEL: define{{.*}} void @f2( // CHECK-SAME: <[[#div(VBITS,8)]] x i8>* noalias nocapture writeonly sret(<[[#div(VBITS,8)]] x i8>) align 16 %agg.result, <[[#div(VBITS,8)]] x i8>* nocapture noundef readonly %0) // CHECK-NEXT: entry: // CHECK-NEXT: [[X:%.*]] = load <[[#div(VBITS,8)]] x i8>, <[[#div(VBITS,8)]] x i8>* [[TMP0:%.*]], align 16, [[TBAA6:!tbaa !.*]] -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv16i8.v[[#div(VBITS,8)]]i8( undef, <[[#div(VBITS,8)]] x i8> [[X]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[TMP1]], [[CASTSCALABLESVE]], i32 1) -// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <[[#div(VBITS,8)]] x i8> @llvm.vector.extract.v[[#div(VBITS,8)]]i8.nxv16i8( [[TMP2]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv16i8.v[[#div(VBITS,8)]]i8( undef, <[[#div(VBITS,8)]] x i8> [[X]], i64 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[TMP1]], [[CASTSCALABLESVE]], i32 1) +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = call <[[#div(VBITS,8)]] x i8> @llvm.vector.extract.v[[#div(VBITS,8)]]i8.nxv16i8( [[TMP2]], i64 0) // CHECK-NEXT: store <[[#div(VBITS,8)]] x i8> [[CASTFIXEDSVE]], <[[#div(VBITS,8)]] x i8>* [[AGG_RESULT:%.*]], align 16, [[TBAA6]] // CHECK-NEXT: ret void vec_int8 f2(vec_int8 x) { return svasrd_x(svptrue_b8(), x, 1); } @@ -80,14 +80,14 @@ // CHECK128-LABEL: define{{.*}} void @g( noundef %x.coerce) // CHECK128-NEXT: entry: -// CHECK128-NEXT: [[X:%.*]] = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[X_COERCE:%.*]], i64 0) +// CHECK128-NEXT: [[X:%.*]] = call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[X_COERCE:%.*]], i64 0) // CHECK128-NEXT: call void @f3(<16 x i8> noundef [[X]]) [[ATTR5:#.*]] // CHECK128-NEXT: ret void // CHECK-LABEL: define{{.*}} void @g( noundef %x.coerce) // CHECK-NEXT: entry: // CHECK-NEXT: [[INDIRECT_ARG_TEMP:%.*]] = alloca <[[#div(VBITS,8)]] x i8>, align 16 -// CHECK-NEXT: [[X:%.*]] = tail call <[[#div(VBITS,8)]] x i8> @llvm.vector.extract.v[[#div(VBITS,8)]]i8.nxv16i8( [[X_COERCE:%.*]], i64 0) +// CHECK-NEXT: [[X:%.*]] = call <[[#div(VBITS,8)]] x i8> @llvm.vector.extract.v[[#div(VBITS,8)]]i8.nxv16i8( [[X_COERCE:%.*]], i64 0) // CHECK-NEXT: store <[[#div(VBITS,8)]] x i8> [[X]], <[[#div(VBITS,8)]] x i8>* [[INDIRECT_ARG_TEMP]], align 16, [[TBAA6]] // CHECK-NEXT: call void @f3(<[[#div(VBITS,8)]] x i8>* noundef nonnull [[INDIRECT_ARG_TEMP]]) [[ATTR5:#.*]] // CHECK-NEXT: ret void diff --git a/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp b/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp --- a/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp +++ b/clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp @@ -49,10 +49,10 @@ // CHECK-SAME: [[#VBITS]] // CHECK-SAME: EES_( noundef %x.coerce, noundef %y.coerce) // CHECK-NEXT: entry: -// CHECK-NEXT: [[X:%.*]] = tail call <[[#div(VBITS, 32)]] x i32> @llvm.vector.extract.v[[#div(VBITS, 32)]]i32.nxv4i32( [[X_COERCE:%.*]], i64 0) -// CHECK-NEXT: [[Y:%.*]] = tail call <[[#div(VBITS, 32)]] x i32> @llvm.vector.extract.v[[#div(VBITS, 32)]]i32.nxv4i32( [[X_COERCE1:%.*]], i64 0) +// CHECK-NEXT: [[X:%.*]] = call <[[#div(VBITS, 32)]] x i32> @llvm.vector.extract.v[[#div(VBITS, 32)]]i32.nxv4i32( [[X_COERCE:%.*]], i64 0) +// CHECK-NEXT: [[Y:%.*]] = call <[[#div(VBITS, 32)]] x i32> @llvm.vector.extract.v[[#div(VBITS, 32)]]i32.nxv4i32( [[X_COERCE1:%.*]], i64 0) // CHECK-NEXT: [[ADD:%.*]] = add <[[#div(VBITS, 32)]] x i32> [[Y]], [[X]] -// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv4i32.v[[#div(VBITS, 32)]]i32( undef, <[[#div(VBITS, 32)]] x i32> [[ADD]], i64 0) +// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv4i32.v[[#div(VBITS, 32)]]i32( undef, <[[#div(VBITS, 32)]] x i32> [[ADD]], i64 0) // CHECK-NEXT: ret [[CASTSCALABLESVE]] typedef svint32_t vec __attribute__((arm_sve_vector_bits(N))); auto f(vec x, vec y) { return x + y; } // Returns a vec. @@ -68,11 +68,11 @@ // CHECK-SAME: [[#VBITS]] // CHECK-SAME: EE( noundef %x.coerce) // CHECK-NEXT: entry: -// CHECK128-NEXT: [[X:%.*]] = tail call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[X_COERCE:%.*]], i64 0) +// CHECK128-NEXT: [[X:%.*]] = call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[X_COERCE:%.*]], i64 0) // CHECK128-NEXT: call void @_Z1fDv8_s(<8 x i16> noundef [[X]]) [[ATTR5:#.*]] // CHECK128-NEXT: ret void // CHECKWIDE-NEXT: [[INDIRECT_ARG_TEMP:%.*]] = alloca <[[#div(VBITS, 16)]] x i16>, align 16 -// CHECKWIDE-NEXT: [[X:%.*]] = tail call <[[#div(VBITS, 16)]] x i16> @llvm.vector.extract.v[[#div(VBITS, 16)]]i16.nxv8i16( [[X_COERCE:%.*]], i64 0) +// CHECKWIDE-NEXT: [[X:%.*]] = call <[[#div(VBITS, 16)]] x i16> @llvm.vector.extract.v[[#div(VBITS, 16)]]i16.nxv8i16( [[X_COERCE:%.*]], i64 0) // CHECKWIDE-NEXT: store <[[#div(VBITS, 16)]] x i16> [[X]], <[[#div(VBITS, 16)]] x i16>* [[INDIRECT_ARG_TEMP]], align 16, [[TBAA6:!tbaa !.*]] // CHECKWIDE-NEXT: call void @_Z1fDv[[#div(VBITS, 16)]]_s(<[[#div(VBITS, 16)]] x i16>* noundef nonnull [[INDIRECT_ARG_TEMP]]) [[ATTR5:#.*]] // CHECKWIDE-NEXT: ret void diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svabd_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svabd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svabd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svabd_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svabd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svabd_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svabd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svabd_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svabd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svabd_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svabd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svabd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svabd_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svabd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svabd_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svabd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svabd_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svabd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svabd_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svabd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svabd_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svabd_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svabd_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svabd_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svabd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svabd_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svabd_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svabd_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svabd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svabd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svabd_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svabd_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svabd_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svabd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svabd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svabd_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svabd_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svabd_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svabd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svabd_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svabd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svabd_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svabd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svabd_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svabd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svabd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svabd_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svabd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svabd_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svabd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svabd_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svabd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svabd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svabd_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svabd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svabd_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svabd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svabd_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svabd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svabd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svabd_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svabd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svabd_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svabd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svabd_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svabd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svabd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svabd_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svabd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svabd_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svabd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svabd_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svabd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svabd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svabd_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svabd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svabd_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svabd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svabd_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svabd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svabd_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svabd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svabd_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svabd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svabd_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svabd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svabd_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svabd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svabd_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svabd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svabd_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svabd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svabd_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svabd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svabd_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svabd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svabd_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svabd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svabd_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svabd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svabd_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svabd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svabd_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svabd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svabd_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svabd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svabd_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svabd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svabd_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svabd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svabd_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svabd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svabd_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svabd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svabd_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svabd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svabs_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.abs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabs_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.abs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svabs_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svabs_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabs_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svabs_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabs_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svabs_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabs_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svabs_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.abs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabs_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.abs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svabs_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svabs_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabs_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svabs_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabs_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svabs_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabs_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svabs_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.abs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svabs_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.abs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svabs_s8_x(svbool_t pg, svint8_t op) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svabs_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabs_s16_x(svbool_t pg, svint16_t op) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svabs_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabs_s32_x(svbool_t pg, svint32_t op) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svabs_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.abs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabs_s64_x(svbool_t pg, svint64_t op) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svabs_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svabs_f16_z(svbool_t pg, svfloat16_t op) @@ -231,14 +231,14 @@ // CHECK-LABEL: @test_svabs_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svabs_f32_z(svbool_t pg, svfloat32_t op) @@ -248,14 +248,14 @@ // CHECK-LABEL: @test_svabs_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svabs_f64_z(svbool_t pg, svfloat64_t op) @@ -265,14 +265,14 @@ // CHECK-LABEL: @test_svabs_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svabs_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -282,14 +282,14 @@ // CHECK-LABEL: @test_svabs_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svabs_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -299,14 +299,14 @@ // CHECK-LABEL: @test_svabs_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svabs_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -316,14 +316,14 @@ // CHECK-LABEL: @test_svabs_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svabs_f16_x(svbool_t pg, svfloat16_t op) @@ -333,14 +333,14 @@ // CHECK-LABEL: @test_svabs_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svabs_f32_x(svbool_t pg, svfloat32_t op) @@ -350,14 +350,14 @@ // CHECK-LABEL: @test_svabs_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabs_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabs.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svabs_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svacge_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svacge_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svacge_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,20 +73,20 @@ // CHECK-LABEL: @test_svacge_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svacge_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svacge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -96,20 +96,20 @@ // CHECK-LABEL: @test_svacge_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svacge_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svacge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svacgt_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svacgt_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svacgt_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,20 +73,20 @@ // CHECK-LABEL: @test_svacgt_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svacgt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svacgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -96,20 +96,20 @@ // CHECK-LABEL: @test_svacgt_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svacgt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svacgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svacle_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacle_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacle_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svacle_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacle_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacle_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svacle_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svacle_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svacle_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,20 +73,20 @@ // CHECK-LABEL: @test_svacle_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svacle_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svacle_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -96,20 +96,20 @@ // CHECK-LABEL: @test_svacle_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svacle_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svacle_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svaclt_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svaclt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svaclt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svaclt_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svaclt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svaclt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svaclt_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svaclt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svaclt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,20 +73,20 @@ // CHECK-LABEL: @test_svaclt_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svaclt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svaclt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -96,20 +96,20 @@ // CHECK-LABEL: @test_svaclt_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svaclt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svaclt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svadd_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svadd_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svadd_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svadd_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svadd_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svadd_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svadd_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svadd_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svadd_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svadd_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svadd_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svadd_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svadd_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svadd_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svadd_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svadd_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svadd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svadd_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svadd_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svadd_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svadd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svadd_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svadd_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svadd_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svadd_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svadd_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svadd_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svadd_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svadd_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svadd_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svadd_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svadd_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svadd_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svadd_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svadd_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svadd_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svadd_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svadd_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svadd_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svadd_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svadd_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svadd_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svadd_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svadd_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svadd_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svadd_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svadd_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svadd_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svadd_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svadd_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svadd_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svadd_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svadd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svadd_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svadd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svadd_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svadd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svadd_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svadd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svadd_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svadd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svadd_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svadd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svadd_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svadd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svadd_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svadd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svadd_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svadd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svadda_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fadda.nxv8f16( [[TMP0]], half [[INITIAL:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fadda.nxv8f16( [[TMP0]], half [[INITIAL:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svadda_f16u10__SVBool_tDhu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fadda.nxv8f16( [[TMP0]], half [[INITIAL:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fadda.nxv8f16( [[TMP0]], half [[INITIAL:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svadda_f16(svbool_t pg, float16_t initial, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svadda_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fadda.nxv4f32( [[TMP0]], float [[INITIAL:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fadda.nxv4f32( [[TMP0]], float [[INITIAL:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svadda_f32u10__SVBool_tfu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fadda.nxv4f32( [[TMP0]], float [[INITIAL:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fadda.nxv4f32( [[TMP0]], float [[INITIAL:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svadda_f32(svbool_t pg, float32_t initial, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svadda_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fadda.nxv2f64( [[TMP0]], double [[INITIAL:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fadda.nxv2f64( [[TMP0]], double [[INITIAL:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svadda_f64u10__SVBool_tdu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fadda.nxv2f64( [[TMP0]], double [[INITIAL:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fadda.nxv2f64( [[TMP0]], double [[INITIAL:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svadda_f64(svbool_t pg, float64_t initial, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svaddv_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaddv_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svaddv_s8(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svaddv_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svaddv_s16(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svaddv_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svaddv_s32(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svaddv_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.saddv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svaddv_s64(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svaddv_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaddv_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svaddv_u8(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svaddv_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svaddv_u16(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svaddv_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svaddv_u32(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svaddv_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uaddv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svaddv_u64(svbool_t pg, svuint64_t op) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svaddv_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.faddv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.faddv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_f16u10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.faddv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.faddv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svaddv_f16(svbool_t pg, svfloat16_t op) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svaddv_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.faddv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.faddv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.faddv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.faddv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svaddv_f32(svbool_t pg, svfloat32_t op) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svaddv_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.faddv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.faddv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaddv_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.faddv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.faddv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svaddv_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svadrb_u32base_s32offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z29test_svadrb_u32base_s32offsetu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrb_u32base_s32offset(svuint32_t bases, svint32_t offsets) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svadrb_u64base_s64offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z29test_svadrb_u64base_s64offsetu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrb_u64base_s64offset(svuint64_t bases, svint64_t offsets) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svadrb_u32base_u32offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z29test_svadrb_u32base_u32offsetu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrb_u32base_u32offset(svuint32_t bases, svuint32_t offsets) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svadrb_u64base_u64offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z29test_svadrb_u64base_u64offsetu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrb_u64base_u64offset(svuint64_t bases, svuint64_t offsets) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svadrd_u32base_s32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrd_u32base_s32indexu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrd_u32base_s32index(svuint32_t bases, svint32_t indices) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svadrd_u64base_s64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrd_u64base_s64indexu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrd_u64base_s64index(svuint64_t bases, svint64_t indices) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svadrd_u32base_u32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrd_u32base_u32indexu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrd_u32base_u32index(svuint32_t bases, svuint32_t indices) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svadrd_u64base_u64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrd_u64base_u64indexu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrd_u64base_u64index(svuint64_t bases, svuint64_t indices) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svadrh_u32base_s32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrh_u32base_s32indexu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrh_u32base_s32index(svuint32_t bases, svint32_t indices) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svadrh_u64base_s64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrh_u64base_s64indexu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrh_u64base_s64index(svuint64_t bases, svint64_t indices) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svadrh_u32base_u32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrh_u32base_u32indexu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrh_u32base_u32index(svuint32_t bases, svuint32_t indices) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svadrh_u64base_u64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrh_u64base_u64indexu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrh_u64base_u64index(svuint64_t bases, svuint64_t indices) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svadrw_u32base_s32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrw_u32base_s32indexu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrw_u32base_s32index(svuint32_t bases, svint32_t indices) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svadrw_u64base_s64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrw_u64base_s64indexu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrw_u64base_s64index(svuint64_t bases, svint64_t indices) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svadrw_u32base_u32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrw_u32base_u32indexu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadrw_u32base_u32index(svuint32_t bases, svuint32_t indices) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svadrw_u64base_u64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z28test_svadrw_u64base_u64indexu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadrw_u64base_u64index(svuint64_t bases, svuint64_t indices) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svand_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svand_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svand_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svand_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svand_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svand_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svand_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svand_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svand_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svand_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svand_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svand_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svand_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svand_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svand_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svand_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svand_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svand_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svand_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svand_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svand_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svand_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svand_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svand_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svand_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svand_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svand_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svand_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svand_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svand_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svand_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svand_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svand_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svand_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svand_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svand_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svand_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svand_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svand_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svand_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svand_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svand_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svand_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svand_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svand_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svand_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svand_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svand_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svand_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svand_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svand_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svand_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svand_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svand_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svand_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svand_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svand_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svand_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svand_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svand_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svand_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svand_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svand_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svand_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svand_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svand_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svand_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svand_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svand_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svand_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svand_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svand_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svand_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svand_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svand_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svand_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svand_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svand_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svand_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svand_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svand_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svand_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svand_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svand_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svand_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svand_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svand_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svand_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svand_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svand_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svand_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svand_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svand_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svand_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svand_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svand_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svand_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svand_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svand_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svand_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svand_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svand_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svand_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svand_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svand_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,12 +936,12 @@ // CHECK-LABEL: @test_svand_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svand_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svand_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svandv_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svandv_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svandv_s8(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svandv_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svandv_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // int16_t test_svandv_s16(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svandv_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svandv_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svandv_s32(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svandv_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svandv_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svandv_s64(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svandv_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svandv_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svandv_u8(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svandv_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svandv_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // uint16_t test_svandv_u16(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svandv_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svandv_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svandv_u32(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svandv_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svandv_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svandv_u64(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svasr_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svasr_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasr_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svasr_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasr_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svasr_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasr_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svasr_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svasr_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -90,12 +90,12 @@ // CHECK-LABEL: @test_svasr_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svasr_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasr_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -105,14 +105,14 @@ // CHECK-LABEL: @test_svasr_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasr_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -122,14 +122,14 @@ // CHECK-LABEL: @test_svasr_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasr_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -139,14 +139,14 @@ // CHECK-LABEL: @test_svasr_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svasr_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -156,12 +156,12 @@ // CHECK-LABEL: @test_svasr_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svasr_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasr_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -171,14 +171,14 @@ // CHECK-LABEL: @test_svasr_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasr_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -188,14 +188,14 @@ // CHECK-LABEL: @test_svasr_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasr_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svasr_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svasr_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svasr_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -222,20 +222,20 @@ // CHECK-LABEL: @test_svasr_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_zu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svasr_n_s64_z(svbool_t pg, svint64_t op1, uint64_t op2) @@ -245,18 +245,18 @@ // CHECK-LABEL: @test_svasr_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_mu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svasr_n_s64_m(svbool_t pg, svint64_t op1, uint64_t op2) @@ -266,18 +266,18 @@ // CHECK-LABEL: @test_svasr_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_xu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svasr_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2) @@ -288,13 +288,13 @@ // CHECK-LABEL: @test_svasr_wide_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasr_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) @@ -304,16 +304,16 @@ // CHECK-LABEL: @test_svasr_wide_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasr_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) @@ -323,16 +323,16 @@ // CHECK-LABEL: @test_svasr_wide_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasr_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) @@ -342,12 +342,12 @@ // CHECK-LABEL: @test_svasr_wide_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasr_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) @@ -357,14 +357,14 @@ // CHECK-LABEL: @test_svasr_wide_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasr_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) @@ -374,14 +374,14 @@ // CHECK-LABEL: @test_svasr_wide_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasr_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) @@ -391,12 +391,12 @@ // CHECK-LABEL: @test_svasr_wide_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasr_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) @@ -406,14 +406,14 @@ // CHECK-LABEL: @test_svasr_wide_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasr_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) @@ -423,14 +423,14 @@ // CHECK-LABEL: @test_svasr_wide_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasr_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) @@ -443,7 +443,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_zu10__SVBool_tu10__SVInt8_th( @@ -451,7 +451,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svasr_n_s8_z(svbool_t pg, svint8_t op1, uint8_t op2) @@ -461,20 +461,20 @@ // CHECK-LABEL: @test_svasr_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_zu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svasr_n_s16_z(svbool_t pg, svint16_t op1, uint16_t op2) @@ -484,20 +484,20 @@ // CHECK-LABEL: @test_svasr_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_zu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svasr_n_s32_z(svbool_t pg, svint32_t op1, uint32_t op2) @@ -509,14 +509,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_mu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasr_n_s8_m(svbool_t pg, svint8_t op1, uint8_t op2) @@ -526,18 +526,18 @@ // CHECK-LABEL: @test_svasr_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_mu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasr_n_s16_m(svbool_t pg, svint16_t op1, uint16_t op2) @@ -547,18 +547,18 @@ // CHECK-LABEL: @test_svasr_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_mu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasr_n_s32_m(svbool_t pg, svint32_t op1, uint32_t op2) @@ -570,14 +570,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_xu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasr_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2) @@ -587,18 +587,18 @@ // CHECK-LABEL: @test_svasr_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_xu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasr_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2) @@ -608,18 +608,18 @@ // CHECK-LABEL: @test_svasr_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_xu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasr_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2) @@ -631,14 +631,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasr_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svasr_wide_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasr_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svasr_wide_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasr_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) @@ -693,7 +693,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( @@ -701,7 +701,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svasr_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) @@ -711,20 +711,20 @@ // CHECK-LABEL: @test_svasr_wide_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svasr_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) @@ -734,20 +734,20 @@ // CHECK-LABEL: @test_svasr_wide_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svasr_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) @@ -759,14 +759,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasr_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) @@ -776,18 +776,18 @@ // CHECK-LABEL: @test_svasr_wide_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasr_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) @@ -797,18 +797,18 @@ // CHECK-LABEL: @test_svasr_wide_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasr_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svasrd_n_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 1) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svasrd_n_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 1) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasrd_n_s8_z(svbool_t pg, svint8_t op1) @@ -34,13 +34,13 @@ // CHECK-LABEL: @test_svasrd_n_s8_z_1( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 8) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 8) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svasrd_n_s8_z_1u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 8) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 8) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svasrd_n_s8_z_1(svbool_t pg, svint8_t op1) @@ -50,16 +50,16 @@ // CHECK-LABEL: @test_svasrd_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasrd_n_s16_z(svbool_t pg, svint16_t op1) @@ -69,16 +69,16 @@ // CHECK-LABEL: @test_svasrd_n_s16_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 16) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 16) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svasrd_n_s16_z_1u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 16) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 16) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svasrd_n_s16_z_1(svbool_t pg, svint16_t op1) @@ -88,16 +88,16 @@ // CHECK-LABEL: @test_svasrd_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasrd_n_s32_z(svbool_t pg, svint32_t op1) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svasrd_n_s32_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 32) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 32) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svasrd_n_s32_z_1u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 32) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 32) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svasrd_n_s32_z_1(svbool_t pg, svint32_t op1) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svasrd_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svasrd_n_s64_z(svbool_t pg, svint64_t op1) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svasrd_n_s64_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 64) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 64) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svasrd_n_s64_z_1u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 64) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 64) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svasrd_n_s64_z_1(svbool_t pg, svint64_t op1) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svasrd_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svasrd_n_s8_mu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasrd_n_s8_m(svbool_t pg, svint8_t op1) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svasrd_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s16_mu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasrd_n_s16_m(svbool_t pg, svint16_t op1) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svasrd_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s32_mu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasrd_n_s32_m(svbool_t pg, svint32_t op1) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svasrd_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s64_mu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svasrd_n_s64_m(svbool_t pg, svint64_t op1) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svasrd_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svasrd_n_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svasrd_n_s8_x(svbool_t pg, svint8_t op1) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svasrd_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svasrd_n_s16_x(svbool_t pg, svint16_t op1) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svasrd_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svasrd_n_s32_x(svbool_t pg, svint32_t op1) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svasrd_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svasrd_n_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svasrd_n_s64_x(svbool_t pg, svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_bfdot_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_bfdot_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfdot_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_bfdot_lane_0_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_bfdot_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfdot_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_bfdot_lane_3_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_bfdot_lane_3_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfdot_lane_3_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -61,14 +61,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_bfdot_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_bfdot_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbfmlalb_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svbfmlalb_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svbfmlalb_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_bfmlalb_lane_0_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfmlalb_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_bfmlalb_lane_7_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfmlalb_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -61,14 +61,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_bfmlalb_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_bfmlalb_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbfmlalt_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svbfmlalt_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svbfmlalt_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_bfmlalt_lane_0_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfmlalt_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_bfmlalt_lane_7_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfmlalt_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { @@ -61,14 +61,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_bfmlalt_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, bfloat [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_bfmlalt_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_bfmmla_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmmla( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmmla( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_bfmmla_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bfmmla( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmmla( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_bfmmla_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svbic_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svbic_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svbic_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svbic_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svbic_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svbic_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svbic_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svbic_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svbic_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svbic_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svbic_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbic_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svbic_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svbic_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svbic_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svbic_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svbic_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svbic_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svbic_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbic_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svbic_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svbic_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svbic_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svbic_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svbic_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svbic_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svbic_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svbic_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbic_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbic_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svbic_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbic_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svbic_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbic_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svbic_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbic_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svbic_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbic_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svbic_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svbic_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svbic_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svbic_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svbic_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svbic_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svbic_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svbic_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbic_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbic_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svbic_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbic_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svbic_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbic_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svbic_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbic_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbic_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svbic_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svbic_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svbic_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svbic_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svbic_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svbic_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svbic_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svbic_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svbic_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svbic_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svbic_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svbic_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svbic_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svbic_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svbic_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svbic_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svbic_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svbic_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svbic_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svbic_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svbic_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbic_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svbic_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svbic_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svbic_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svbic_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svbic_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svbic_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svbic_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svbic_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svbic_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svbic_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svbic_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svbic_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svbic_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbic_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svbic_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svbic_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svbic_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svbic_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svbic_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svbic_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,12 +936,12 @@ // CHECK-LABEL: @test_svbic_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbic_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbic_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svbrka_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brka.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbrka_b_zu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brka.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbrka_b_z(svbool_t pg, svbool_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svbrka_b_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brka.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbrka_b_mu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brka.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbrka_b_m(svbool_t inactive, svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svbrkb_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkb.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbrkb_b_zu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkb.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbrkb_b_z(svbool_t pg, svbool_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svbrkb_b_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkb.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbrkb_b_mu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkb.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbrkb_b_m(svbool_t inactive, svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svbrkn_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbrkn_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbrkn_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svbrkpa_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkpa.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpa.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbrkpa_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkpa.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpa.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbrkpa_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svbrkpb_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkpb.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpb.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbrkpb_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.brkpb.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpb.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svbrkpb_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svcadd_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svcadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svcadd_f16_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svcadd_f16_z_1u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svcadd_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svcadd_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svcadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -73,16 +73,16 @@ // CHECK-LABEL: @test_svcadd_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svcadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -92,14 +92,14 @@ // CHECK-LABEL: @test_svcadd_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -109,14 +109,14 @@ // CHECK-LABEL: @test_svcadd_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -126,14 +126,14 @@ // CHECK-LABEL: @test_svcadd_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -143,14 +143,14 @@ // CHECK-LABEL: @test_svcadd_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -160,14 +160,14 @@ // CHECK-LABEL: @test_svcadd_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -177,14 +177,14 @@ // CHECK-LABEL: @test_svcadd_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svclasta_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svclasta_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svclasta_bf16(svbool_t pg, svbfloat16_t fallback, svbfloat16_t data) { @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svclasta_n_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret bfloat [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svclasta_n_bf16u10__SVBool_tu6__bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret bfloat [[TMP1]] // bfloat16_t test_svclasta_n_bf16(svbool_t pg, bfloat16_t fallback, svbfloat16_t data) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svclasta_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svclasta_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svclasta_s8(svbool_t pg, svint8_t fallback, svint8_t data) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svclasta_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svclasta_s16(svbool_t pg, svint16_t fallback, svint16_t data) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svclasta_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svclasta_s32(svbool_t pg, svint32_t fallback, svint32_t data) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svclasta_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svclasta_s64(svbool_t pg, svint64_t fallback, svint64_t data) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svclasta_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svclasta_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclasta_u8(svbool_t pg, svuint8_t fallback, svuint8_t data) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svclasta_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclasta_u16(svbool_t pg, svuint16_t fallback, svuint16_t data) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svclasta_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclasta_u32(svbool_t pg, svuint32_t fallback, svuint32_t data) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svclasta_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclasta_u64(svbool_t pg, svuint64_t fallback, svuint64_t data) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svclasta_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svclasta_f16(svbool_t pg, svfloat16_t fallback, svfloat16_t data) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svclasta_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svclasta_f32(svbool_t pg, svfloat32_t fallback, svfloat32_t data) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svclasta_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclasta_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clasta.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svclasta_f64(svbool_t pg, svfloat64_t fallback, svfloat64_t data) @@ -199,12 +199,12 @@ // CHECK-LABEL: @test_svclasta_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svclasta_n_s8u10__SVBool_tau10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svclasta_n_s8(svbool_t pg, int8_t fallback, svint8_t data) @@ -214,19 +214,19 @@ // CHECK-LABEL: @test_svclasta_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CHECK-NEXT: ret i16 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_s16u10__SVBool_tsu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CPP-CHECK-NEXT: ret i16 [[TMP4]] // @@ -237,19 +237,19 @@ // CHECK-LABEL: @test_svclasta_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CHECK-NEXT: ret i32 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_s32u10__SVBool_tiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CPP-CHECK-NEXT: ret i32 [[TMP4]] // @@ -260,19 +260,19 @@ // CHECK-LABEL: @test_svclasta_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CHECK-NEXT: ret i64 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_s64u10__SVBool_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CPP-CHECK-NEXT: ret i64 [[TMP4]] // @@ -283,12 +283,12 @@ // CHECK-LABEL: @test_svclasta_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svclasta_n_u8u10__SVBool_thu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svclasta_n_u8(svbool_t pg, uint8_t fallback, svuint8_t data) @@ -298,19 +298,19 @@ // CHECK-LABEL: @test_svclasta_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CHECK-NEXT: ret i16 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_u16u10__SVBool_ttu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CPP-CHECK-NEXT: ret i16 [[TMP4]] // @@ -321,19 +321,19 @@ // CHECK-LABEL: @test_svclasta_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CHECK-NEXT: ret i32 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_u32u10__SVBool_tju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CPP-CHECK-NEXT: ret i32 [[TMP4]] // @@ -344,19 +344,19 @@ // CHECK-LABEL: @test_svclasta_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CHECK-NEXT: ret i64 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_u64u10__SVBool_tmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CPP-CHECK-NEXT: ret i64 [[TMP4]] // @@ -367,14 +367,14 @@ // CHECK-LABEL: @test_svclasta_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_f16u10__SVBool_tDhu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svclasta_n_f16(svbool_t pg, float16_t fallback, svfloat16_t data) @@ -384,14 +384,14 @@ // CHECK-LABEL: @test_svclasta_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_f32u10__SVBool_tfu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svclasta_n_f32(svbool_t pg, float32_t fallback, svfloat32_t data) @@ -401,14 +401,14 @@ // CHECK-LABEL: @test_svclasta_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svclasta_n_f64u10__SVBool_tdu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svclasta_n_f64(svbool_t pg, float64_t fallback, svfloat64_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svclastb_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svclastb_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svclastb_bf16(svbool_t pg, svbfloat16_t fallback, svbfloat16_t data) { @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svclastb_n_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret bfloat [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svclastb_n_bf16u10__SVBool_tu6__bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret bfloat [[TMP1]] // bfloat16_t test_svclastb_n_bf16(svbool_t pg, bfloat16_t fallback, svbfloat16_t data) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svclastb_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svclastb_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svclastb_s8(svbool_t pg, svint8_t fallback, svint8_t data) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svclastb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svclastb_s16(svbool_t pg, svint16_t fallback, svint16_t data) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svclastb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svclastb_s32(svbool_t pg, svint32_t fallback, svint32_t data) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svclastb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svclastb_s64(svbool_t pg, svint64_t fallback, svint64_t data) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svclastb_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svclastb_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclastb_u8(svbool_t pg, svuint8_t fallback, svuint8_t data) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svclastb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclastb_u16(svbool_t pg, svuint16_t fallback, svuint16_t data) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svclastb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclastb_u32(svbool_t pg, svuint32_t fallback, svuint32_t data) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svclastb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclastb_u64(svbool_t pg, svuint64_t fallback, svuint64_t data) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svclastb_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svclastb_f16(svbool_t pg, svfloat16_t fallback, svfloat16_t data) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svclastb_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svclastb_f32(svbool_t pg, svfloat32_t fallback, svfloat32_t data) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svclastb_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svclastb_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clastb.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svclastb_f64(svbool_t pg, svfloat64_t fallback, svfloat64_t data) @@ -199,12 +199,12 @@ // CHECK-LABEL: @test_svclastb_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svclastb_n_s8u10__SVBool_tau10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svclastb_n_s8(svbool_t pg, int8_t fallback, svint8_t data) @@ -214,19 +214,19 @@ // CHECK-LABEL: @test_svclastb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CHECK-NEXT: ret i16 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_s16u10__SVBool_tsu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CPP-CHECK-NEXT: ret i16 [[TMP4]] // @@ -237,19 +237,19 @@ // CHECK-LABEL: @test_svclastb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CHECK-NEXT: ret i32 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_s32u10__SVBool_tiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CPP-CHECK-NEXT: ret i32 [[TMP4]] // @@ -260,19 +260,19 @@ // CHECK-LABEL: @test_svclastb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CHECK-NEXT: ret i64 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_s64u10__SVBool_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CPP-CHECK-NEXT: ret i64 [[TMP4]] // @@ -283,12 +283,12 @@ // CHECK-LABEL: @test_svclastb_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svclastb_n_u8u10__SVBool_thu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svclastb_n_u8(svbool_t pg, uint8_t fallback, svuint8_t data) @@ -298,19 +298,19 @@ // CHECK-LABEL: @test_svclastb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CHECK-NEXT: ret i16 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_u16u10__SVBool_ttu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[FALLBACK:%.*]] to half // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast half [[TMP3]] to i16 // CPP-CHECK-NEXT: ret i16 [[TMP4]] // @@ -321,19 +321,19 @@ // CHECK-LABEL: @test_svclastb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CHECK-NEXT: ret i32 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_u32u10__SVBool_tju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[FALLBACK:%.*]] to float // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[TMP3]] to i32 // CPP-CHECK-NEXT: ret i32 [[TMP4]] // @@ -344,19 +344,19 @@ // CHECK-LABEL: @test_svclastb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CHECK-NEXT: ret i64 [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_u64u10__SVBool_tmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[FALLBACK:%.*]] to double // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[TMP1]], [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[TMP3]] to i64 // CPP-CHECK-NEXT: ret i64 [[TMP4]] // @@ -367,14 +367,14 @@ // CHECK-LABEL: @test_svclastb_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_f16u10__SVBool_tDhu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svclastb_n_f16(svbool_t pg, float16_t fallback, svfloat16_t data) @@ -384,14 +384,14 @@ // CHECK-LABEL: @test_svclastb_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_f32u10__SVBool_tfu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svclastb_n_f32(svbool_t pg, float32_t fallback, svfloat32_t data) @@ -401,14 +401,14 @@ // CHECK-LABEL: @test_svclastb_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svclastb_n_f64u10__SVBool_tdu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svclastb_n_f64(svbool_t pg, float64_t fallback, svfloat64_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcls_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cls.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcls_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cls.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcls_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svcls_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcls_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svcls_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcls_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svcls_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcls_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svcls_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cls.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcls_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cls.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcls_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svcls_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcls_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svcls_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcls_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svcls_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcls_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svcls_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cls.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcls_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cls.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcls_s8_x(svbool_t pg, svint8_t op) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svcls_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcls_s16_x(svbool_t pg, svint16_t op) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svcls_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcls_s32_x(svbool_t pg, svint32_t op) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svcls_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcls_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cls.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcls_s64_x(svbool_t pg, svint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svclz_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svclz_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclz_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svclz_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclz_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svclz_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclz_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svclz_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclz_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svclz_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svclz_u8_zu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclz_u8_z(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svclz_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclz_u16_z(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svclz_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclz_u32_z(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svclz_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclz_u64_z(svbool_t pg, svuint64_t op) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svclz_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svclz_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclz_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svclz_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclz_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svclz_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclz_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svclz_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclz_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svclz_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svclz_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclz_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svclz_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclz_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svclz_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclz_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svclz_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclz_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -280,12 +280,12 @@ // CHECK-LABEL: @test_svclz_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svclz_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclz_s8_x(svbool_t pg, svint8_t op) @@ -295,14 +295,14 @@ // CHECK-LABEL: @test_svclz_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclz_s16_x(svbool_t pg, svint16_t op) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svclz_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclz_s32_x(svbool_t pg, svint32_t op) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svclz_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclz_s64_x(svbool_t pg, svint64_t op) @@ -346,12 +346,12 @@ // CHECK-LABEL: @test_svclz_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svclz_u8_xu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svclz_u8_x(svbool_t pg, svuint8_t op) @@ -361,14 +361,14 @@ // CHECK-LABEL: @test_svclz_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svclz_u16_x(svbool_t pg, svuint16_t op) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svclz_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svclz_u32_x(svbool_t pg, svuint32_t op) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svclz_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svclz_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svclz_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svcmla_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svcmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svcmla_f16_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svcmla_f16_z_1u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svcmla_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svcmla_f16_z_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svcmla_f16_z_2u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svcmla_f16_z_2(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -73,16 +73,16 @@ // CHECK-LABEL: @test_svcmla_f16_z_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svcmla_f16_z_3u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svcmla_f16_z_3(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -92,16 +92,16 @@ // CHECK-LABEL: @test_svcmla_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svcmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -111,16 +111,16 @@ // CHECK-LABEL: @test_svcmla_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svcmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -130,14 +130,14 @@ // CHECK-LABEL: @test_svcmla_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -147,14 +147,14 @@ // CHECK-LABEL: @test_svcmla_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svcmla_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svcmla_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svcmla_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -215,14 +215,14 @@ // CHECK-LABEL: @test_svcmla_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -232,12 +232,12 @@ // CHECK-LABEL: @test_svcmla_lane_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmla_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svcmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -247,12 +247,12 @@ // CHECK-LABEL: @test_svcmla_lane_f16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svcmla_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svcmla_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -262,12 +262,12 @@ // CHECK-LABEL: @test_svcmla_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmla_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svcmla_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -277,12 +277,12 @@ // CHECK-LABEL: @test_svcmla_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svcmla_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svcmla_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcmpeq_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpeq_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpeq_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,16 +31,16 @@ // CHECK-LABEL: @test_svcmpeq_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -50,16 +50,16 @@ // CHECK-LABEL: @test_svcmpeq_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_s32(svbool_t pg, svint32_t op1, svint32_t op2) @@ -69,16 +69,16 @@ // CHECK-LABEL: @test_svcmpeq_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_s64(svbool_t pg, svint64_t op1, svint64_t op2) @@ -88,12 +88,12 @@ // CHECK-LABEL: @test_svcmpeq_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpeq_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpeq_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -103,16 +103,16 @@ // CHECK-LABEL: @test_svcmpeq_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -122,16 +122,16 @@ // CHECK-LABEL: @test_svcmpeq_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -141,16 +141,16 @@ // CHECK-LABEL: @test_svcmpeq_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,20 +160,20 @@ // CHECK-LABEL: @test_svcmpeq_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_s64(svbool_t pg, svint64_t op1, int64_t op2) @@ -183,20 +183,20 @@ // CHECK-LABEL: @test_svcmpeq_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -206,12 +206,12 @@ // CHECK-LABEL: @test_svcmpeq_wide_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmpeq_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpeq_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) @@ -221,16 +221,16 @@ // CHECK-LABEL: @test_svcmpeq_wide_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) @@ -240,16 +240,16 @@ // CHECK-LABEL: @test_svcmpeq_wide_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) @@ -261,14 +261,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpeq_n_s8(svbool_t pg, svint8_t op1, int8_t op2) @@ -278,20 +278,20 @@ // CHECK-LABEL: @test_svcmpeq_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_s16(svbool_t pg, svint16_t op1, int16_t op2) @@ -301,20 +301,20 @@ // CHECK-LABEL: @test_svcmpeq_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_s32(svbool_t pg, svint32_t op1, int32_t op2) @@ -326,14 +326,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpeq_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -343,20 +343,20 @@ // CHECK-LABEL: @test_svcmpeq_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -366,20 +366,20 @@ // CHECK-LABEL: @test_svcmpeq_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -389,16 +389,16 @@ // CHECK-LABEL: @test_svcmpeq_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -408,16 +408,16 @@ // CHECK-LABEL: @test_svcmpeq_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -427,16 +427,16 @@ // CHECK-LABEL: @test_svcmpeq_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpeq_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpeq_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -446,20 +446,20 @@ // CHECK-LABEL: @test_svcmpeq_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -469,20 +469,20 @@ // CHECK-LABEL: @test_svcmpeq_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -492,20 +492,20 @@ // CHECK-LABEL: @test_svcmpeq_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -517,14 +517,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpeq_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpeq_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) @@ -534,20 +534,20 @@ // CHECK-LABEL: @test_svcmpeq_wide_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) @@ -557,20 +557,20 @@ // CHECK-LABEL: @test_svcmpeq_wide_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpeq_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcmpge_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpge_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpge_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,16 +31,16 @@ // CHECK-LABEL: @test_svcmpge_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -50,16 +50,16 @@ // CHECK-LABEL: @test_svcmpge_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_s32(svbool_t pg, svint32_t op1, svint32_t op2) @@ -69,16 +69,16 @@ // CHECK-LABEL: @test_svcmpge_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_s64(svbool_t pg, svint64_t op1, svint64_t op2) @@ -88,12 +88,12 @@ // CHECK-LABEL: @test_svcmpge_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpge_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpge_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -103,16 +103,16 @@ // CHECK-LABEL: @test_svcmpge_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -122,16 +122,16 @@ // CHECK-LABEL: @test_svcmpge_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -141,16 +141,16 @@ // CHECK-LABEL: @test_svcmpge_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,20 +160,20 @@ // CHECK-LABEL: @test_svcmpge_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_s64(svbool_t pg, svint64_t op1, int64_t op2) @@ -183,20 +183,20 @@ // CHECK-LABEL: @test_svcmpge_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -206,12 +206,12 @@ // CHECK-LABEL: @test_svcmpge_wide_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpge_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) @@ -221,16 +221,16 @@ // CHECK-LABEL: @test_svcmpge_wide_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) @@ -240,16 +240,16 @@ // CHECK-LABEL: @test_svcmpge_wide_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) @@ -259,12 +259,12 @@ // CHECK-LABEL: @test_svcmpge_wide_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpge_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -274,16 +274,16 @@ // CHECK-LABEL: @test_svcmpge_wide_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -293,16 +293,16 @@ // CHECK-LABEL: @test_svcmpge_wide_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -314,14 +314,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpge_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpge_n_s8(svbool_t pg, svint8_t op1, int8_t op2) @@ -331,20 +331,20 @@ // CHECK-LABEL: @test_svcmpge_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_s16(svbool_t pg, svint16_t op1, int16_t op2) @@ -354,20 +354,20 @@ // CHECK-LABEL: @test_svcmpge_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_s32(svbool_t pg, svint32_t op1, int32_t op2) @@ -379,14 +379,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpge_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpge_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -396,20 +396,20 @@ // CHECK-LABEL: @test_svcmpge_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -419,20 +419,20 @@ // CHECK-LABEL: @test_svcmpge_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -442,16 +442,16 @@ // CHECK-LABEL: @test_svcmpge_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -461,16 +461,16 @@ // CHECK-LABEL: @test_svcmpge_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -480,16 +480,16 @@ // CHECK-LABEL: @test_svcmpge_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -499,20 +499,20 @@ // CHECK-LABEL: @test_svcmpge_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -522,20 +522,20 @@ // CHECK-LABEL: @test_svcmpge_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -545,20 +545,20 @@ // CHECK-LABEL: @test_svcmpge_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -570,14 +570,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpge_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) @@ -587,20 +587,20 @@ // CHECK-LABEL: @test_svcmpge_wide_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) @@ -610,20 +610,20 @@ // CHECK-LABEL: @test_svcmpge_wide_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) @@ -635,14 +635,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpge_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) @@ -652,20 +652,20 @@ // CHECK-LABEL: @test_svcmpge_wide_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) @@ -675,20 +675,20 @@ // CHECK-LABEL: @test_svcmpge_wide_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpge_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcmpgt_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpgt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpgt_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,16 +31,16 @@ // CHECK-LABEL: @test_svcmpgt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -50,16 +50,16 @@ // CHECK-LABEL: @test_svcmpgt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_s32(svbool_t pg, svint32_t op1, svint32_t op2) @@ -69,16 +69,16 @@ // CHECK-LABEL: @test_svcmpgt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_s64(svbool_t pg, svint64_t op1, svint64_t op2) @@ -88,12 +88,12 @@ // CHECK-LABEL: @test_svcmpgt_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpgt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpgt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -103,16 +103,16 @@ // CHECK-LABEL: @test_svcmpgt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -122,16 +122,16 @@ // CHECK-LABEL: @test_svcmpgt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -141,16 +141,16 @@ // CHECK-LABEL: @test_svcmpgt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,20 +160,20 @@ // CHECK-LABEL: @test_svcmpgt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) @@ -183,20 +183,20 @@ // CHECK-LABEL: @test_svcmpgt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -206,12 +206,12 @@ // CHECK-LABEL: @test_svcmpgt_wide_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpgt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) @@ -221,16 +221,16 @@ // CHECK-LABEL: @test_svcmpgt_wide_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) @@ -240,16 +240,16 @@ // CHECK-LABEL: @test_svcmpgt_wide_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) @@ -259,12 +259,12 @@ // CHECK-LABEL: @test_svcmpgt_wide_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpgt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -274,16 +274,16 @@ // CHECK-LABEL: @test_svcmpgt_wide_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -293,16 +293,16 @@ // CHECK-LABEL: @test_svcmpgt_wide_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -314,14 +314,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpgt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) @@ -331,20 +331,20 @@ // CHECK-LABEL: @test_svcmpgt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) @@ -354,20 +354,20 @@ // CHECK-LABEL: @test_svcmpgt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) @@ -379,14 +379,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpgt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -396,20 +396,20 @@ // CHECK-LABEL: @test_svcmpgt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -419,20 +419,20 @@ // CHECK-LABEL: @test_svcmpgt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -442,16 +442,16 @@ // CHECK-LABEL: @test_svcmpgt_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -461,16 +461,16 @@ // CHECK-LABEL: @test_svcmpgt_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -480,16 +480,16 @@ // CHECK-LABEL: @test_svcmpgt_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -499,20 +499,20 @@ // CHECK-LABEL: @test_svcmpgt_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -522,20 +522,20 @@ // CHECK-LABEL: @test_svcmpgt_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -545,20 +545,20 @@ // CHECK-LABEL: @test_svcmpgt_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -570,14 +570,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpgt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) @@ -587,20 +587,20 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) @@ -610,20 +610,20 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) @@ -635,14 +635,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpgt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) @@ -652,20 +652,20 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) @@ -675,20 +675,20 @@ // CHECK-LABEL: @test_svcmpgt_wide_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpgt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcmple_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmple_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmple_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,16 +31,16 @@ // CHECK-LABEL: @test_svcmple_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -50,16 +50,16 @@ // CHECK-LABEL: @test_svcmple_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_s32(svbool_t pg, svint32_t op1, svint32_t op2) @@ -69,16 +69,16 @@ // CHECK-LABEL: @test_svcmple_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_s64(svbool_t pg, svint64_t op1, svint64_t op2) @@ -88,12 +88,12 @@ // CHECK-LABEL: @test_svcmple_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmple_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmple_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -103,16 +103,16 @@ // CHECK-LABEL: @test_svcmple_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -122,16 +122,16 @@ // CHECK-LABEL: @test_svcmple_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -141,16 +141,16 @@ // CHECK-LABEL: @test_svcmple_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,20 +160,20 @@ // CHECK-LABEL: @test_svcmple_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_s64(svbool_t pg, svint64_t op1, int64_t op2) @@ -183,20 +183,20 @@ // CHECK-LABEL: @test_svcmple_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -206,12 +206,12 @@ // CHECK-LABEL: @test_svcmple_wide_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmple_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmple_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) @@ -221,16 +221,16 @@ // CHECK-LABEL: @test_svcmple_wide_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) @@ -240,16 +240,16 @@ // CHECK-LABEL: @test_svcmple_wide_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) @@ -259,12 +259,12 @@ // CHECK-LABEL: @test_svcmple_wide_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmple_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmple_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -274,16 +274,16 @@ // CHECK-LABEL: @test_svcmple_wide_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -293,16 +293,16 @@ // CHECK-LABEL: @test_svcmple_wide_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -314,14 +314,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmple_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmple_n_s8(svbool_t pg, svint8_t op1, int8_t op2) @@ -331,20 +331,20 @@ // CHECK-LABEL: @test_svcmple_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_s16(svbool_t pg, svint16_t op1, int16_t op2) @@ -354,20 +354,20 @@ // CHECK-LABEL: @test_svcmple_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_s32(svbool_t pg, svint32_t op1, int32_t op2) @@ -379,14 +379,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmple_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmple_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -396,20 +396,20 @@ // CHECK-LABEL: @test_svcmple_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -419,20 +419,20 @@ // CHECK-LABEL: @test_svcmple_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -442,16 +442,16 @@ // CHECK-LABEL: @test_svcmple_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -461,16 +461,16 @@ // CHECK-LABEL: @test_svcmple_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -480,16 +480,16 @@ // CHECK-LABEL: @test_svcmple_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmple_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmple_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -499,20 +499,20 @@ // CHECK-LABEL: @test_svcmple_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -522,20 +522,20 @@ // CHECK-LABEL: @test_svcmple_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -545,20 +545,20 @@ // CHECK-LABEL: @test_svcmple_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmple_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -570,14 +570,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmple_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) @@ -587,20 +587,20 @@ // CHECK-LABEL: @test_svcmple_wide_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) @@ -610,20 +610,20 @@ // CHECK-LABEL: @test_svcmple_wide_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) @@ -635,14 +635,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmple_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) @@ -652,20 +652,20 @@ // CHECK-LABEL: @test_svcmple_wide_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) @@ -675,20 +675,20 @@ // CHECK-LABEL: @test_svcmple_wide_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmple_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcmplt_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmplt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmplt_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,16 +31,16 @@ // CHECK-LABEL: @test_svcmplt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -50,16 +50,16 @@ // CHECK-LABEL: @test_svcmplt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_s32(svbool_t pg, svint32_t op1, svint32_t op2) @@ -69,16 +69,16 @@ // CHECK-LABEL: @test_svcmplt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_s64(svbool_t pg, svint64_t op1, svint64_t op2) @@ -88,12 +88,12 @@ // CHECK-LABEL: @test_svcmplt_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmplt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmplt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -103,16 +103,16 @@ // CHECK-LABEL: @test_svcmplt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -122,16 +122,16 @@ // CHECK-LABEL: @test_svcmplt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -141,16 +141,16 @@ // CHECK-LABEL: @test_svcmplt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,20 +160,20 @@ // CHECK-LABEL: @test_svcmplt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) @@ -183,20 +183,20 @@ // CHECK-LABEL: @test_svcmplt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -206,12 +206,12 @@ // CHECK-LABEL: @test_svcmplt_wide_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmplt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) @@ -221,16 +221,16 @@ // CHECK-LABEL: @test_svcmplt_wide_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) @@ -240,16 +240,16 @@ // CHECK-LABEL: @test_svcmplt_wide_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) @@ -259,12 +259,12 @@ // CHECK-LABEL: @test_svcmplt_wide_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmplt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -274,16 +274,16 @@ // CHECK-LABEL: @test_svcmplt_wide_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -293,16 +293,16 @@ // CHECK-LABEL: @test_svcmplt_wide_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -314,14 +314,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmplt_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmplt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) @@ -331,20 +331,20 @@ // CHECK-LABEL: @test_svcmplt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) @@ -354,20 +354,20 @@ // CHECK-LABEL: @test_svcmplt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) @@ -379,14 +379,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmplt_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmplt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -396,20 +396,20 @@ // CHECK-LABEL: @test_svcmplt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -419,20 +419,20 @@ // CHECK-LABEL: @test_svcmplt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -442,16 +442,16 @@ // CHECK-LABEL: @test_svcmplt_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -461,16 +461,16 @@ // CHECK-LABEL: @test_svcmplt_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -480,16 +480,16 @@ // CHECK-LABEL: @test_svcmplt_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmplt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmplt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -499,20 +499,20 @@ // CHECK-LABEL: @test_svcmplt_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -522,20 +522,20 @@ // CHECK-LABEL: @test_svcmplt_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -545,20 +545,20 @@ // CHECK-LABEL: @test_svcmplt_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -570,14 +570,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmplt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) @@ -587,20 +587,20 @@ // CHECK-LABEL: @test_svcmplt_wide_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) @@ -610,20 +610,20 @@ // CHECK-LABEL: @test_svcmplt_wide_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) @@ -635,14 +635,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmplt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) @@ -652,20 +652,20 @@ // CHECK-LABEL: @test_svcmplt_wide_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) @@ -675,20 +675,20 @@ // CHECK-LABEL: @test_svcmplt_wide_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmplt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcmpne_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpne_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpne_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,16 +31,16 @@ // CHECK-LABEL: @test_svcmpne_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -50,16 +50,16 @@ // CHECK-LABEL: @test_svcmpne_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_s32(svbool_t pg, svint32_t op1, svint32_t op2) @@ -69,16 +69,16 @@ // CHECK-LABEL: @test_svcmpne_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_s64(svbool_t pg, svint64_t op1, svint64_t op2) @@ -88,12 +88,12 @@ // CHECK-LABEL: @test_svcmpne_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmpne_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpne_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -103,16 +103,16 @@ // CHECK-LABEL: @test_svcmpne_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -122,16 +122,16 @@ // CHECK-LABEL: @test_svcmpne_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -141,16 +141,16 @@ // CHECK-LABEL: @test_svcmpne_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,20 +160,20 @@ // CHECK-LABEL: @test_svcmpne_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s64u10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_s64(svbool_t pg, svint64_t op1, int64_t op2) @@ -183,20 +183,20 @@ // CHECK-LABEL: @test_svcmpne_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u64u10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -206,12 +206,12 @@ // CHECK-LABEL: @test_svcmpne_wide_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmpne_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svcmpne_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) @@ -221,16 +221,16 @@ // CHECK-LABEL: @test_svcmpne_wide_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) @@ -240,16 +240,16 @@ // CHECK-LABEL: @test_svcmpne_wide_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) @@ -261,14 +261,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpne_n_s8u10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpne_n_s8(svbool_t pg, svint8_t op1, int8_t op2) @@ -278,20 +278,20 @@ // CHECK-LABEL: @test_svcmpne_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s16u10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_s16(svbool_t pg, svint16_t op1, int16_t op2) @@ -301,20 +301,20 @@ // CHECK-LABEL: @test_svcmpne_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s32u10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_s32(svbool_t pg, svint32_t op1, int32_t op2) @@ -326,14 +326,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcmpne_n_u8u10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpne_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -343,20 +343,20 @@ // CHECK-LABEL: @test_svcmpne_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u16u10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -366,20 +366,20 @@ // CHECK-LABEL: @test_svcmpne_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u32u10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -389,16 +389,16 @@ // CHECK-LABEL: @test_svcmpne_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -408,16 +408,16 @@ // CHECK-LABEL: @test_svcmpne_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -427,16 +427,16 @@ // CHECK-LABEL: @test_svcmpne_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpne_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpne_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -446,20 +446,20 @@ // CHECK-LABEL: @test_svcmpne_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -469,20 +469,20 @@ // CHECK-LABEL: @test_svcmpne_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -492,20 +492,20 @@ // CHECK-LABEL: @test_svcmpne_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -517,14 +517,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcmpne_wide_n_s8u10__SVBool_tu10__SVInt8_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svcmpne_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) @@ -534,20 +534,20 @@ // CHECK-LABEL: @test_svcmpne_wide_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s16u10__SVBool_tu11__SVInt16_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) @@ -557,20 +557,20 @@ // CHECK-LABEL: @test_svcmpne_wide_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s32u10__SVBool_tu11__SVInt32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpne_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svcmpuo_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpuo_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpuo_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svcmpuo_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpuo_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpuo_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svcmpuo_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svcmpuo_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svcmpuo_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,20 +73,20 @@ // CHECK-LABEL: @test_svcmpuo_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f16u10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpuo_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -96,20 +96,20 @@ // CHECK-LABEL: @test_svcmpuo_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f32u10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpuo_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -119,20 +119,20 @@ // CHECK-LABEL: @test_svcmpuo_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f64u10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svcmpuo_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcnot_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcnot_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcnot_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svcnot_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svcnot_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svcnot_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcnot_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svcnot_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcnot_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svcnot_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcnot_u8_zu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnot_u8_z(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svcnot_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnot_u16_z(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svcnot_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnot_u32_z(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svcnot_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnot_u64_z(svbool_t pg, svuint64_t op) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svcnot_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcnot_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcnot_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svcnot_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svcnot_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svcnot_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcnot_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svcnot_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcnot_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svcnot_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcnot_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnot_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svcnot_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnot_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svcnot_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnot_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svcnot_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnot_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -280,12 +280,12 @@ // CHECK-LABEL: @test_svcnot_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcnot_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcnot_s8_x(svbool_t pg, svint8_t op) @@ -295,14 +295,14 @@ // CHECK-LABEL: @test_svcnot_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svcnot_s16_x(svbool_t pg, svint16_t op) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svcnot_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcnot_s32_x(svbool_t pg, svint32_t op) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svcnot_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcnot_s64_x(svbool_t pg, svint64_t op) @@ -346,12 +346,12 @@ // CHECK-LABEL: @test_svcnot_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcnot_u8_xu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnot_u8_x(svbool_t pg, svuint8_t op) @@ -361,14 +361,14 @@ // CHECK-LABEL: @test_svcnot_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnot_u16_x(svbool_t pg, svuint16_t op) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svcnot_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnot_u32_x(svbool_t pg, svuint32_t op) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svcnot_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnot_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnot_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svcnt_bf16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8bf16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnt_bf16_zu10__SVBool_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8bf16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_bf16_z(svbool_t pg, svbfloat16_t op) { @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svcnt_bf16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnt_bf16_mu12__SVUint16_tu10__SVBool_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_bf16_m(svuint16_t inactive, svbool_t pg, svbfloat16_t op) { @@ -50,14 +50,14 @@ } // CHECK-LABEL: @test_svcnt_bf16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8bf16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svcnt_bf16_xu10__SVBool_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8bf16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_bf16_x(svbool_t pg, svbfloat16_t op) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svcnt_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcnt_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnt_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svcnt_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svcnt_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svcnt_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svcnt_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcnt_u8_zu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnt_u8_z(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svcnt_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_u16_z(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svcnt_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_u32_z(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svcnt_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_u64_z(svbool_t pg, svuint64_t op) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svcnt_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_f16_z(svbool_t pg, svfloat16_t op) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svcnt_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_f32_z(svbool_t pg, svfloat32_t op) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svcnt_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_f64_z(svbool_t pg, svfloat64_t op) @@ -199,12 +199,12 @@ // CHECK-LABEL: @test_svcnt_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcnt_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnt_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svcnt_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op) @@ -231,14 +231,14 @@ // CHECK-LABEL: @test_svcnt_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op) @@ -248,14 +248,14 @@ // CHECK-LABEL: @test_svcnt_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op) @@ -265,12 +265,12 @@ // CHECK-LABEL: @test_svcnt_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcnt_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnt_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svcnt_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) @@ -297,14 +297,14 @@ // CHECK-LABEL: @test_svcnt_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -314,14 +314,14 @@ // CHECK-LABEL: @test_svcnt_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -331,14 +331,14 @@ // CHECK-LABEL: @test_svcnt_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f16_mu12__SVUint16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_f16_m(svuint16_t inactive, svbool_t pg, svfloat16_t op) @@ -348,14 +348,14 @@ // CHECK-LABEL: @test_svcnt_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f32_mu12__SVUint32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_f32_m(svuint32_t inactive, svbool_t pg, svfloat32_t op) @@ -365,14 +365,14 @@ // CHECK-LABEL: @test_svcnt_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f64_mu12__SVUint64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_f64_m(svuint64_t inactive, svbool_t pg, svfloat64_t op) @@ -382,12 +382,12 @@ // CHECK-LABEL: @test_svcnt_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcnt_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnt_s8_x(svbool_t pg, svint8_t op) @@ -397,14 +397,14 @@ // CHECK-LABEL: @test_svcnt_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_s16_x(svbool_t pg, svint16_t op) @@ -414,14 +414,14 @@ // CHECK-LABEL: @test_svcnt_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_s32_x(svbool_t pg, svint32_t op) @@ -431,14 +431,14 @@ // CHECK-LABEL: @test_svcnt_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_s64_x(svbool_t pg, svint64_t op) @@ -448,12 +448,12 @@ // CHECK-LABEL: @test_svcnt_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcnt_u8_xu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcnt_u8_x(svbool_t pg, svuint8_t op) @@ -463,14 +463,14 @@ // CHECK-LABEL: @test_svcnt_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_u16_x(svbool_t pg, svuint16_t op) @@ -480,14 +480,14 @@ // CHECK-LABEL: @test_svcnt_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_u32_x(svbool_t pg, svuint32_t op) @@ -497,14 +497,14 @@ // CHECK-LABEL: @test_svcnt_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_u64_x(svbool_t pg, svuint64_t op) @@ -514,14 +514,14 @@ // CHECK-LABEL: @test_svcnt_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcnt_f16_x(svbool_t pg, svfloat16_t op) @@ -531,14 +531,14 @@ // CHECK-LABEL: @test_svcnt_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcnt_f32_x(svbool_t pg, svfloat32_t op) @@ -548,14 +548,14 @@ // CHECK-LABEL: @test_svcnt_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svcnt_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.cnt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcnt_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c @@ -7,13 +7,13 @@ // CHECK-LABEL: @test_svcntb( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z11test_svcntbv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -24,12 +24,12 @@ // CHECK-LABEL: @test_svcntb_pat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 0) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcntb_patv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 0) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntb_pat() @@ -156,12 +156,12 @@ // CHECK-LABEL: @test_svcntb_pat_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 10) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_10v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 10) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntb_pat_10() @@ -171,12 +171,12 @@ // CHECK-LABEL: @test_svcntb_pat_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 11) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_11v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 11) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntb_pat_11() @@ -186,12 +186,12 @@ // CHECK-LABEL: @test_svcntb_pat_12( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 12) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_12v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 12) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntb_pat_12() @@ -201,12 +201,12 @@ // CHECK-LABEL: @test_svcntb_pat_13( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 13) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_13v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 13) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntb_pat_13() @@ -216,12 +216,12 @@ // CHECK-LABEL: @test_svcntb_pat_14( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 29) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 29) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_14v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 29) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 29) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntb_pat_14() @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svcntb_pat_15( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 30) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 30) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_15v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntb(i32 30) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 30) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntb_pat_15() @@ -246,13 +246,13 @@ // CHECK-LABEL: @test_svcntb_pat_16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcntb_pat_16v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c @@ -7,13 +7,13 @@ // CHECK-LABEL: @test_svcntd( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z11test_svcntdv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -24,12 +24,12 @@ // CHECK-LABEL: @test_svcntd_pat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 0) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcntd_patv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 0) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat() @@ -65,12 +65,12 @@ // CHECK-LABEL: @test_svcntd_pat_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 3) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_3v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 3) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_3() @@ -80,12 +80,12 @@ // CHECK-LABEL: @test_svcntd_pat_4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 4) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 4) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_4v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 4) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 4) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_4() @@ -95,12 +95,12 @@ // CHECK-LABEL: @test_svcntd_pat_5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 5) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 5) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_5v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 5) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 5) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_5() @@ -110,12 +110,12 @@ // CHECK-LABEL: @test_svcntd_pat_6( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 6) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 6) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_6v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 6) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 6) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_6() @@ -125,12 +125,12 @@ // CHECK-LABEL: @test_svcntd_pat_7( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 7) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_7v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 7) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_7() @@ -140,12 +140,12 @@ // CHECK-LABEL: @test_svcntd_pat_8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 8) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_8v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 8) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_8() @@ -155,12 +155,12 @@ // CHECK-LABEL: @test_svcntd_pat_9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 9) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 9) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_9v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 9) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 9) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_9() @@ -170,12 +170,12 @@ // CHECK-LABEL: @test_svcntd_pat_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 10) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_10v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 10) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_10() @@ -185,12 +185,12 @@ // CHECK-LABEL: @test_svcntd_pat_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 11) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_11v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 11) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_11() @@ -200,12 +200,12 @@ // CHECK-LABEL: @test_svcntd_pat_12( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 12) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_12v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 12) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_12() @@ -215,12 +215,12 @@ // CHECK-LABEL: @test_svcntd_pat_13( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 13) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_13v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 13) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_13() @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svcntd_pat_14( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 29) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 29) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_14v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 29) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 29) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_14() @@ -245,12 +245,12 @@ // CHECK-LABEL: @test_svcntd_pat_15( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 30) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 30) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_15v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 30) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 30) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntd_pat_15() @@ -260,13 +260,13 @@ // CHECK-LABEL: @test_svcntd_pat_16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_16v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c @@ -7,13 +7,13 @@ // CHECK-LABEL: @test_svcnth( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z11test_svcnthv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -24,12 +24,12 @@ // CHECK-LABEL: @test_svcnth_pat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 0) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcnth_patv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 0) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat() @@ -143,12 +143,12 @@ // CHECK-LABEL: @test_svcnth_pat_9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 9) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 9) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcnth_pat_9v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 9) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 9) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat_9() @@ -158,12 +158,12 @@ // CHECK-LABEL: @test_svcnth_pat_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 10) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcnth_pat_10v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 10) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat_10() @@ -173,12 +173,12 @@ // CHECK-LABEL: @test_svcnth_pat_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 11) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcnth_pat_11v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 11) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat_11() @@ -188,12 +188,12 @@ // CHECK-LABEL: @test_svcnth_pat_12( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 12) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcnth_pat_12v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 12) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat_12() @@ -203,12 +203,12 @@ // CHECK-LABEL: @test_svcnth_pat_13( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 13) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcnth_pat_13v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 13) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat_13() @@ -218,12 +218,12 @@ // CHECK-LABEL: @test_svcnth_pat_14( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 29) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 29) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcnth_pat_14v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 29) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 29) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat_14() @@ -233,12 +233,12 @@ // CHECK-LABEL: @test_svcnth_pat_15( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 30) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 30) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcnth_pat_15v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cnth(i32 30) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 30) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcnth_pat_15() @@ -248,13 +248,13 @@ // CHECK-LABEL: @test_svcnth_pat_16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcnth_pat_16v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svcntp_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svcntp_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntp_b8(svbool_t pg, svbool_t op) @@ -22,16 +22,16 @@ // CHECK-LABEL: @test_svcntp_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv8i1( [[TMP0]], [[TMP1]]) // CHECK-NEXT: ret i64 [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svcntp_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv8i1( [[TMP0]], [[TMP1]]) // CPP-CHECK-NEXT: ret i64 [[TMP2]] // uint64_t test_svcntp_b16(svbool_t pg, svbool_t op) @@ -41,16 +41,16 @@ // CHECK-LABEL: @test_svcntp_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv4i1( [[TMP0]], [[TMP1]]) // CHECK-NEXT: ret i64 [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svcntp_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv4i1( [[TMP0]], [[TMP1]]) // CPP-CHECK-NEXT: ret i64 [[TMP2]] // uint64_t test_svcntp_b32(svbool_t pg, svbool_t op) @@ -60,16 +60,16 @@ // CHECK-LABEL: @test_svcntp_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv2i1( [[TMP0]], [[TMP1]]) // CHECK-NEXT: ret i64 [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svcntp_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv2i1( [[TMP0]], [[TMP1]]) // CPP-CHECK-NEXT: ret i64 [[TMP2]] // uint64_t test_svcntp_b64(svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c @@ -7,13 +7,13 @@ // CHECK-LABEL: @test_svcntw( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z11test_svcntwv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -24,12 +24,12 @@ // CHECK-LABEL: @test_svcntw_pat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 0) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcntw_patv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 0) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat() @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svcntw_pat_5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 5) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 5) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntw_pat_5v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 5) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 5) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_5() @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svcntw_pat_6( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 6) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 6) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntw_pat_6v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 6) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 6) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_6() @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svcntw_pat_7( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 7) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntw_pat_7v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 7) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_7() @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svcntw_pat_8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 8) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntw_pat_8v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 8) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_8() @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svcntw_pat_9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 9) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 9) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcntw_pat_9v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 9) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 9) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_9() @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svcntw_pat_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 10) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntw_pat_10v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 10) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_10() @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svcntw_pat_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 11) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntw_pat_11v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 11) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_11() @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svcntw_pat_12( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 12) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntw_pat_12v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 12) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_12() @@ -211,12 +211,12 @@ // CHECK-LABEL: @test_svcntw_pat_13( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 13) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntw_pat_13v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 13) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_13() @@ -226,12 +226,12 @@ // CHECK-LABEL: @test_svcntw_pat_14( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 29) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 29) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntw_pat_14v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 29) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 29) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_14() @@ -241,12 +241,12 @@ // CHECK-LABEL: @test_svcntw_pat_15( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 30) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 30) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcntw_pat_15v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntw(i32 30) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 30) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntw_pat_15() @@ -256,13 +256,13 @@ // CHECK-LABEL: @test_svcntw_pat_16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcntw_pat_16v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svcompact_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcompact_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcompact_s32(svbool_t pg, svint32_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svcompact_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcompact_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcompact_s64(svbool_t pg, svint64_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svcompact_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcompact_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcompact_u32(svbool_t pg, svuint32_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svcompact_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcompact_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcompact_u64(svbool_t pg, svuint64_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svcompact_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcompact_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcompact_f32(svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svcompact_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svcompact_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.compact.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcompact_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcreate2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svcreate2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x2_t test_svcreate2_bf16(svbfloat16_t x0, svbfloat16_t x1) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcreate2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcreate2_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x2_t test_svcreate2_s8(svint8_t x0, svint8_t x1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svcreate2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16x2_t test_svcreate2_s16(svint16_t x0, svint16_t x1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svcreate2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32x2_t test_svcreate2_s32(svint32_t x0, svint32_t x1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svcreate2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64x2_t test_svcreate2_s64(svint64_t x0, svint64_t x1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svcreate2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcreate2_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x2_t test_svcreate2_u8(svuint8_t x0, svuint8_t x1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svcreate2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16x2_t test_svcreate2_u16(svuint16_t x0, svuint16_t x1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svcreate2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32x2_t test_svcreate2_u32(svuint32_t x0, svuint32_t x1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svcreate2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64x2_t test_svcreate2_u64(svuint64_t x0, svuint64_t x1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svcreate2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16x2_t test_svcreate2_f16(svfloat16_t x0, svfloat16_t x1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svcreate2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv8f32.nxv4f32( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8f32.nxv4f32( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv8f32.nxv4f32( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8f32.nxv4f32( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32x2_t test_svcreate2_f32(svfloat32_t x0, svfloat32_t x1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svcreate2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv4f64.nxv2f64( [[X0:%.*]], [[X1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4f64.nxv2f64( [[X0:%.*]], [[X1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate2_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create2.nxv4f64.nxv2f64( [[X0:%.*]], [[X1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4f64.nxv2f64( [[X0:%.*]], [[X1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64x2_t test_svcreate2_f64(svfloat64_t x0, svfloat64_t x1) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcreate3_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svcreate3_bf16u14__SVBFloat16_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x3_t test_svcreate3_bf16(svbfloat16_t x0, svbfloat16_t x1, svbfloat16_t x2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcreate3_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcreate3_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x3_t test_svcreate3_s8(svint8_t x0, svint8_t x1, svint8_t x2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svcreate3_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16x3_t test_svcreate3_s16(svint16_t x0, svint16_t x1, svint16_t x2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svcreate3_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32x3_t test_svcreate3_s32(svint32_t x0, svint32_t x1, svint32_t x2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svcreate3_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64x3_t test_svcreate3_s64(svint64_t x0, svint64_t x1, svint64_t x2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svcreate3_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcreate3_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x3_t test_svcreate3_u8(svuint8_t x0, svuint8_t x1, svuint8_t x2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svcreate3_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16x3_t test_svcreate3_u16(svuint16_t x0, svuint16_t x1, svuint16_t x2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svcreate3_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32x3_t test_svcreate3_u32(svuint32_t x0, svuint32_t x1, svuint32_t x2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svcreate3_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64x3_t test_svcreate3_u64(svuint64_t x0, svuint64_t x1, svuint64_t x2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svcreate3_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv24f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16x3_t test_svcreate3_f16(svfloat16_t x0, svfloat16_t x1, svfloat16_t x2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svcreate3_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv12f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv12f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32x3_t test_svcreate3_f32(svfloat32_t x0, svfloat32_t x1, svfloat32_t x2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svcreate3_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv6f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate3_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create3.nxv6f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64x3_t test_svcreate3_f64(svfloat64_t x0, svfloat64_t x1, svfloat64_t x2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcreate4_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svcreate4_bf16u14__SVBFloat16_tu14__SVBFloat16_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x4_t test_svcreate4_bf16(svbfloat16_t x0, svbfloat16_t x1, svbfloat16_t x2, svbfloat16_t x4) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcreate4_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcreate4_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x4_t test_svcreate4_s8(svint8_t x0, svint8_t x1, svint8_t x2, svint8_t x4) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svcreate4_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16x4_t test_svcreate4_s16(svint16_t x0, svint16_t x1, svint16_t x2, svint16_t x4) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svcreate4_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32x4_t test_svcreate4_s32(svint32_t x0, svint32_t x1, svint32_t x2, svint32_t x4) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svcreate4_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64x4_t test_svcreate4_s64(svint64_t x0, svint64_t x1, svint64_t x2, svint64_t x4) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svcreate4_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcreate4_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x4_t test_svcreate4_u8(svuint8_t x0, svuint8_t x1, svuint8_t x2, svuint8_t x4) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svcreate4_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16x4_t test_svcreate4_u16(svuint16_t x0, svuint16_t x1, svuint16_t x2, svuint16_t x4) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svcreate4_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32x4_t test_svcreate4_u32(svuint32_t x0, svuint32_t x1, svuint32_t x2, svuint32_t x4) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svcreate4_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64x4_t test_svcreate4_u64(svuint64_t x0, svuint64_t x1, svuint64_t x2, svuint64_t x4) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svcreate4_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16x4_t test_svcreate4_f16(svfloat16_t x0, svfloat16_t x1, svfloat16_t x2, svfloat16_t x4) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svcreate4_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv16f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv16f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32x4_t test_svcreate4_f32(svfloat32_t x0, svfloat32_t x1, svfloat32_t x2, svfloat32_t x4) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svcreate4_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv8f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svcreate4_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.create4.nxv8f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64x4_t test_svcreate4_f64(svfloat64_t x0, svfloat64_t x1, svfloat64_t x2, svfloat64_t x4) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svcvt_bf16_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.bf16f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svcvt_bf16_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.bf16f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svcvt_bf16_f32_x(svbool_t pg, svfloat32_t op) { @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svcvt_bf16_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.bf16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svcvt_bf16_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.bf16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svcvt_bf16_f32_z(svbool_t pg, svfloat32_t op) { @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svcvt_bf16_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.bf16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svcvt_bf16_f32_mu14__SVBFloat16_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.bf16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svcvt_bf16_f32_m(svbfloat16_t inactive, svbool_t pg, svfloat32_t op) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svcvt_s16_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s16_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svcvt_s16_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svcvt_s16_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s16_f16_mu11__SVInt16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svcvt_s16_f16_m(svint16_t inactive, svbool_t pg, svfloat16_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svcvt_s16_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s16_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svcvt_s16_f16_x(svbool_t pg, svfloat16_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svcvt_u16_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u16_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcvt_u16_f16_z(svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svcvt_u16_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u16_f16_mu12__SVUint16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcvt_u16_f16_m(svuint16_t inactive, svbool_t pg, svfloat16_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svcvt_u16_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u16_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svcvt_u16_f16_x(svbool_t pg, svfloat16_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svcvt_s32_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f16_z(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svcvt_s32_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f32_z(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svcvt_s32_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f64_z(svbool_t pg, svfloat64_t op) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svcvt_s32_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f16_mu11__SVInt32_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f16_m(svint32_t inactive, svbool_t pg, svfloat16_t op) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svcvt_s32_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f32_mu11__SVInt32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f32_m(svint32_t inactive, svbool_t pg, svfloat32_t op) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svcvt_s32_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f64_mu11__SVInt32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f64_m(svint32_t inactive, svbool_t pg, svfloat64_t op) @@ -220,14 +220,14 @@ // CHECK-LABEL: @test_svcvt_s32_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f16_x(svbool_t pg, svfloat16_t op) @@ -237,14 +237,14 @@ // CHECK-LABEL: @test_svcvt_s32_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f32_x(svbool_t pg, svfloat32_t op) @@ -254,14 +254,14 @@ // CHECK-LABEL: @test_svcvt_s32_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i32f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svcvt_s32_f64_x(svbool_t pg, svfloat64_t op) @@ -271,14 +271,14 @@ // CHECK-LABEL: @test_svcvt_s64_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f16_z(svbool_t pg, svfloat16_t op) @@ -288,14 +288,14 @@ // CHECK-LABEL: @test_svcvt_s64_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f32_z(svbool_t pg, svfloat32_t op) @@ -305,14 +305,14 @@ // CHECK-LABEL: @test_svcvt_s64_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f64_z(svbool_t pg, svfloat64_t op) @@ -322,14 +322,14 @@ // CHECK-LABEL: @test_svcvt_s64_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f16_mu11__SVInt64_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f16_m(svint64_t inactive, svbool_t pg, svfloat16_t op) @@ -339,14 +339,14 @@ // CHECK-LABEL: @test_svcvt_s64_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f32_mu11__SVInt64_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f32_m(svint64_t inactive, svbool_t pg, svfloat32_t op) @@ -356,14 +356,14 @@ // CHECK-LABEL: @test_svcvt_s64_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f64_mu11__SVInt64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f64_m(svint64_t inactive, svbool_t pg, svfloat64_t op) @@ -373,14 +373,14 @@ // CHECK-LABEL: @test_svcvt_s64_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f16_x(svbool_t pg, svfloat16_t op) @@ -390,14 +390,14 @@ // CHECK-LABEL: @test_svcvt_s64_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.i64f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f32_x(svbool_t pg, svfloat32_t op) @@ -407,14 +407,14 @@ // CHECK-LABEL: @test_svcvt_s64_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svcvt_s64_f64_x(svbool_t pg, svfloat64_t op) @@ -424,14 +424,14 @@ // CHECK-LABEL: @test_svcvt_u32_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f16_z(svbool_t pg, svfloat16_t op) @@ -441,14 +441,14 @@ // CHECK-LABEL: @test_svcvt_u32_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f32_z(svbool_t pg, svfloat32_t op) @@ -458,14 +458,14 @@ // CHECK-LABEL: @test_svcvt_u32_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f64_z(svbool_t pg, svfloat64_t op) @@ -475,14 +475,14 @@ // CHECK-LABEL: @test_svcvt_u32_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f16_mu12__SVUint32_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f16_m(svuint32_t inactive, svbool_t pg, svfloat16_t op) @@ -492,14 +492,14 @@ // CHECK-LABEL: @test_svcvt_u32_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f32_mu12__SVUint32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f32_m(svuint32_t inactive, svbool_t pg, svfloat32_t op) @@ -509,14 +509,14 @@ // CHECK-LABEL: @test_svcvt_u32_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f64_mu12__SVUint32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f64_m(svuint32_t inactive, svbool_t pg, svfloat64_t op) @@ -526,14 +526,14 @@ // CHECK-LABEL: @test_svcvt_u32_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f16_x(svbool_t pg, svfloat16_t op) @@ -543,14 +543,14 @@ // CHECK-LABEL: @test_svcvt_u32_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f32_x(svbool_t pg, svfloat32_t op) @@ -560,14 +560,14 @@ // CHECK-LABEL: @test_svcvt_u32_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i32f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svcvt_u32_f64_x(svbool_t pg, svfloat64_t op) @@ -577,14 +577,14 @@ // CHECK-LABEL: @test_svcvt_u64_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f16_z(svbool_t pg, svfloat16_t op) @@ -594,14 +594,14 @@ // CHECK-LABEL: @test_svcvt_u64_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f32_z(svbool_t pg, svfloat32_t op) @@ -611,14 +611,14 @@ // CHECK-LABEL: @test_svcvt_u64_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f64_z(svbool_t pg, svfloat64_t op) @@ -628,14 +628,14 @@ // CHECK-LABEL: @test_svcvt_u64_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f16_mu12__SVUint64_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f16_m(svuint64_t inactive, svbool_t pg, svfloat16_t op) @@ -645,14 +645,14 @@ // CHECK-LABEL: @test_svcvt_u64_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f32_mu12__SVUint64_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f32_m(svuint64_t inactive, svbool_t pg, svfloat32_t op) @@ -662,14 +662,14 @@ // CHECK-LABEL: @test_svcvt_u64_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f64_mu12__SVUint64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f64_m(svuint64_t inactive, svbool_t pg, svfloat64_t op) @@ -679,14 +679,14 @@ // CHECK-LABEL: @test_svcvt_u64_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f16_x(svbool_t pg, svfloat16_t op) @@ -696,14 +696,14 @@ // CHECK-LABEL: @test_svcvt_u64_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.i64f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f32_x(svbool_t pg, svfloat32_t op) @@ -713,14 +713,14 @@ // CHECK-LABEL: @test_svcvt_u64_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svcvt_u64_f64_x(svbool_t pg, svfloat64_t op) @@ -730,14 +730,14 @@ // CHECK-LABEL: @test_svcvt_f16_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_s32_z(svbool_t pg, svint32_t op) @@ -747,14 +747,14 @@ // CHECK-LABEL: @test_svcvt_f32_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_s32_z(svbool_t pg, svint32_t op) @@ -764,14 +764,14 @@ // CHECK-LABEL: @test_svcvt_f64_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_s32_z(svbool_t pg, svint32_t op) @@ -781,14 +781,14 @@ // CHECK-LABEL: @test_svcvt_f16_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s32_mu13__SVFloat16_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_s32_m(svfloat16_t inactive, svbool_t pg, svint32_t op) @@ -798,14 +798,14 @@ // CHECK-LABEL: @test_svcvt_f32_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s32_mu13__SVFloat32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_s32_m(svfloat32_t inactive, svbool_t pg, svint32_t op) @@ -815,14 +815,14 @@ // CHECK-LABEL: @test_svcvt_f64_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s32_mu13__SVFloat64_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_s32_m(svfloat64_t inactive, svbool_t pg, svint32_t op) @@ -832,14 +832,14 @@ // CHECK-LABEL: @test_svcvt_f16_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_s32_x(svbool_t pg, svint32_t op) @@ -849,14 +849,14 @@ // CHECK-LABEL: @test_svcvt_f32_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_s32_x(svbool_t pg, svint32_t op) @@ -866,14 +866,14 @@ // CHECK-LABEL: @test_svcvt_f64_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_s32_x(svbool_t pg, svint32_t op) @@ -883,14 +883,14 @@ // CHECK-LABEL: @test_svcvt_f16_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_s64_z(svbool_t pg, svint64_t op) @@ -900,14 +900,14 @@ // CHECK-LABEL: @test_svcvt_f32_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_s64_z(svbool_t pg, svint64_t op) @@ -917,14 +917,14 @@ // CHECK-LABEL: @test_svcvt_f64_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_s64_z(svbool_t pg, svint64_t op) @@ -934,14 +934,14 @@ // CHECK-LABEL: @test_svcvt_f16_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s64_mu13__SVFloat16_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_s64_m(svfloat16_t inactive, svbool_t pg, svint64_t op) @@ -951,14 +951,14 @@ // CHECK-LABEL: @test_svcvt_f32_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s64_mu13__SVFloat32_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_s64_m(svfloat32_t inactive, svbool_t pg, svint64_t op) @@ -968,14 +968,14 @@ // CHECK-LABEL: @test_svcvt_f64_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s64_mu13__SVFloat64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_s64_m(svfloat64_t inactive, svbool_t pg, svint64_t op) @@ -985,14 +985,14 @@ // CHECK-LABEL: @test_svcvt_f16_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_s64_x(svbool_t pg, svint64_t op) @@ -1002,14 +1002,14 @@ // CHECK-LABEL: @test_svcvt_f32_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_s64_x(svbool_t pg, svint64_t op) @@ -1019,14 +1019,14 @@ // CHECK-LABEL: @test_svcvt_f64_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_s64_x(svbool_t pg, svint64_t op) @@ -1036,14 +1036,14 @@ // CHECK-LABEL: @test_svcvt_f16_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_u32_z(svbool_t pg, svuint32_t op) @@ -1053,14 +1053,14 @@ // CHECK-LABEL: @test_svcvt_f32_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_u32_z(svbool_t pg, svuint32_t op) @@ -1070,14 +1070,14 @@ // CHECK-LABEL: @test_svcvt_f64_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_u32_z(svbool_t pg, svuint32_t op) @@ -1087,14 +1087,14 @@ // CHECK-LABEL: @test_svcvt_f16_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u32_mu13__SVFloat16_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_u32_m(svfloat16_t inactive, svbool_t pg, svuint32_t op) @@ -1104,14 +1104,14 @@ // CHECK-LABEL: @test_svcvt_f32_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u32_mu13__SVFloat32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_u32_m(svfloat32_t inactive, svbool_t pg, svuint32_t op) @@ -1121,14 +1121,14 @@ // CHECK-LABEL: @test_svcvt_f64_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u32_mu13__SVFloat64_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_u32_m(svfloat64_t inactive, svbool_t pg, svuint32_t op) @@ -1138,14 +1138,14 @@ // CHECK-LABEL: @test_svcvt_f16_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_u32_x(svbool_t pg, svuint32_t op) @@ -1155,14 +1155,14 @@ // CHECK-LABEL: @test_svcvt_f32_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_u32_x(svbool_t pg, svuint32_t op) @@ -1172,14 +1172,14 @@ // CHECK-LABEL: @test_svcvt_f64_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_u32_x(svbool_t pg, svuint32_t op) @@ -1189,14 +1189,14 @@ // CHECK-LABEL: @test_svcvt_f16_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_u64_z(svbool_t pg, svuint64_t op) @@ -1206,14 +1206,14 @@ // CHECK-LABEL: @test_svcvt_f32_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_u64_z(svbool_t pg, svuint64_t op) @@ -1223,14 +1223,14 @@ // CHECK-LABEL: @test_svcvt_f64_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_u64_z(svbool_t pg, svuint64_t op) @@ -1240,14 +1240,14 @@ // CHECK-LABEL: @test_svcvt_f16_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u64_mu13__SVFloat16_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_u64_m(svfloat16_t inactive, svbool_t pg, svuint64_t op) @@ -1257,14 +1257,14 @@ // CHECK-LABEL: @test_svcvt_f32_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u64_mu13__SVFloat32_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_u64_m(svfloat32_t inactive, svbool_t pg, svuint64_t op) @@ -1274,14 +1274,14 @@ // CHECK-LABEL: @test_svcvt_f64_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u64_mu13__SVFloat64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_u64_m(svfloat64_t inactive, svbool_t pg, svuint64_t op) @@ -1291,14 +1291,14 @@ // CHECK-LABEL: @test_svcvt_f16_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_u64_x(svbool_t pg, svuint64_t op) @@ -1308,14 +1308,14 @@ // CHECK-LABEL: @test_svcvt_f32_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_u64_x(svbool_t pg, svuint64_t op) @@ -1325,14 +1325,14 @@ // CHECK-LABEL: @test_svcvt_f64_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_u64_x(svbool_t pg, svuint64_t op) @@ -1342,14 +1342,14 @@ // CHECK-LABEL: @test_svcvt_f32_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_f16_z(svbool_t pg, svfloat16_t op) @@ -1359,14 +1359,14 @@ // CHECK-LABEL: @test_svcvt_f64_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_f16_z(svbool_t pg, svfloat16_t op) @@ -1376,14 +1376,14 @@ // CHECK-LABEL: @test_svcvt_f32_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f16_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_f16_m(svfloat32_t inactive, svbool_t pg, svfloat16_t op) @@ -1393,14 +1393,14 @@ // CHECK-LABEL: @test_svcvt_f64_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f16_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_f16_m(svfloat64_t inactive, svbool_t pg, svfloat16_t op) @@ -1410,14 +1410,14 @@ // CHECK-LABEL: @test_svcvt_f32_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_f16_x(svbool_t pg, svfloat16_t op) @@ -1427,14 +1427,14 @@ // CHECK-LABEL: @test_svcvt_f64_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_f16_x(svbool_t pg, svfloat16_t op) @@ -1444,14 +1444,14 @@ // CHECK-LABEL: @test_svcvt_f64_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_f32_z(svbool_t pg, svfloat32_t op) @@ -1461,14 +1461,14 @@ // CHECK-LABEL: @test_svcvt_f64_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f32_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_f32_m(svfloat64_t inactive, svbool_t pg, svfloat32_t op) @@ -1478,14 +1478,14 @@ // CHECK-LABEL: @test_svcvt_f64_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f64f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvt_f64_f32_x(svbool_t pg, svfloat32_t op) @@ -1495,14 +1495,14 @@ // CHECK-LABEL: @test_svcvt_f16_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_f32_z(svbool_t pg, svfloat32_t op) @@ -1512,14 +1512,14 @@ // CHECK-LABEL: @test_svcvt_f16_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_f64_z(svbool_t pg, svfloat64_t op) @@ -1529,14 +1529,14 @@ // CHECK-LABEL: @test_svcvt_f16_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f32_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_f32_m(svfloat16_t inactive, svbool_t pg, svfloat32_t op) @@ -1546,14 +1546,14 @@ // CHECK-LABEL: @test_svcvt_f16_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f64_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_f64_m(svfloat16_t inactive, svbool_t pg, svfloat64_t op) @@ -1563,14 +1563,14 @@ // CHECK-LABEL: @test_svcvt_f16_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_f32_x(svbool_t pg, svfloat32_t op) @@ -1580,14 +1580,14 @@ // CHECK-LABEL: @test_svcvt_f16_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f16f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvt_f16_f64_x(svbool_t pg, svfloat64_t op) @@ -1597,14 +1597,14 @@ // CHECK-LABEL: @test_svcvt_f32_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_f64_z(svbool_t pg, svfloat64_t op) @@ -1614,14 +1614,14 @@ // CHECK-LABEL: @test_svcvt_f32_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) @@ -1631,14 +1631,14 @@ // CHECK-LABEL: @test_svcvt_f32_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvt.f32f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvt_f32_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svcvtnt_bf16_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svcvtnt_bf16_f32_xu14__SVBFloat16_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svcvtnt_bf16_f32_x(svbfloat16_t even, svbool_t pg, svfloat32_t op) { @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svcvtnt_bf16_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svcvtnt_bf16_f32_mu14__SVBFloat16_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svcvtnt_bf16_f32_m(svbfloat16_t even, svbool_t pg, svfloat32_t op) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svdiv_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svdiv_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svdiv_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svdiv_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svdiv_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svdiv_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -73,16 +73,16 @@ // CHECK-LABEL: @test_svdiv_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svdiv_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -92,14 +92,14 @@ // CHECK-LABEL: @test_svdiv_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdiv_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -109,14 +109,14 @@ // CHECK-LABEL: @test_svdiv_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdiv_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -126,14 +126,14 @@ // CHECK-LABEL: @test_svdiv_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdiv_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -143,14 +143,14 @@ // CHECK-LABEL: @test_svdiv_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdiv_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,14 +160,14 @@ // CHECK-LABEL: @test_svdiv_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdiv_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -177,14 +177,14 @@ // CHECK-LABEL: @test_svdiv_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdiv_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -194,14 +194,14 @@ // CHECK-LABEL: @test_svdiv_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdiv_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -211,14 +211,14 @@ // CHECK-LABEL: @test_svdiv_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdiv_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -228,20 +228,20 @@ // CHECK-LABEL: @test_svdiv_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svdiv_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -251,20 +251,20 @@ // CHECK-LABEL: @test_svdiv_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svdiv_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -274,20 +274,20 @@ // CHECK-LABEL: @test_svdiv_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svdiv_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -297,20 +297,20 @@ // CHECK-LABEL: @test_svdiv_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svdiv_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -320,18 +320,18 @@ // CHECK-LABEL: @test_svdiv_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svdiv_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -341,18 +341,18 @@ // CHECK-LABEL: @test_svdiv_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svdiv_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -362,18 +362,18 @@ // CHECK-LABEL: @test_svdiv_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svdiv_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -383,18 +383,18 @@ // CHECK-LABEL: @test_svdiv_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svdiv_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -404,18 +404,18 @@ // CHECK-LABEL: @test_svdiv_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svdiv_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -425,18 +425,18 @@ // CHECK-LABEL: @test_svdiv_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svdiv_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -446,18 +446,18 @@ // CHECK-LABEL: @test_svdiv_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svdiv_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -467,18 +467,18 @@ // CHECK-LABEL: @test_svdiv_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svdiv_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -488,16 +488,16 @@ // CHECK-LABEL: @test_svdiv_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svdiv_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -507,16 +507,16 @@ // CHECK-LABEL: @test_svdiv_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svdiv_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -526,16 +526,16 @@ // CHECK-LABEL: @test_svdiv_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svdiv_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -545,14 +545,14 @@ // CHECK-LABEL: @test_svdiv_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdiv_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -562,14 +562,14 @@ // CHECK-LABEL: @test_svdiv_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdiv_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -579,14 +579,14 @@ // CHECK-LABEL: @test_svdiv_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdiv_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -596,14 +596,14 @@ // CHECK-LABEL: @test_svdiv_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdiv_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -613,14 +613,14 @@ // CHECK-LABEL: @test_svdiv_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdiv_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -630,14 +630,14 @@ // CHECK-LABEL: @test_svdiv_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdiv_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -647,20 +647,20 @@ // CHECK-LABEL: @test_svdiv_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svdiv_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -670,20 +670,20 @@ // CHECK-LABEL: @test_svdiv_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svdiv_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -693,20 +693,20 @@ // CHECK-LABEL: @test_svdiv_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svdiv_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -716,18 +716,18 @@ // CHECK-LABEL: @test_svdiv_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svdiv_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -737,18 +737,18 @@ // CHECK-LABEL: @test_svdiv_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svdiv_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -758,18 +758,18 @@ // CHECK-LABEL: @test_svdiv_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svdiv_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -779,18 +779,18 @@ // CHECK-LABEL: @test_svdiv_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svdiv_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -800,18 +800,18 @@ // CHECK-LABEL: @test_svdiv_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svdiv_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -821,18 +821,18 @@ // CHECK-LABEL: @test_svdiv_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svdiv_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svdivr_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svdivr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svdivr_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svdivr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svdivr_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svdivr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -73,16 +73,16 @@ // CHECK-LABEL: @test_svdivr_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svdivr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -92,14 +92,14 @@ // CHECK-LABEL: @test_svdivr_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdivr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -109,14 +109,14 @@ // CHECK-LABEL: @test_svdivr_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdivr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -126,14 +126,14 @@ // CHECK-LABEL: @test_svdivr_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdivr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -143,14 +143,14 @@ // CHECK-LABEL: @test_svdivr_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdivr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -160,14 +160,14 @@ // CHECK-LABEL: @test_svdivr_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdivr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -177,14 +177,14 @@ // CHECK-LABEL: @test_svdivr_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdivr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -194,14 +194,14 @@ // CHECK-LABEL: @test_svdivr_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdivr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -211,14 +211,14 @@ // CHECK-LABEL: @test_svdivr_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdivr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -228,20 +228,20 @@ // CHECK-LABEL: @test_svdivr_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svdivr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -251,20 +251,20 @@ // CHECK-LABEL: @test_svdivr_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svdivr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -274,20 +274,20 @@ // CHECK-LABEL: @test_svdivr_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svdivr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -297,20 +297,20 @@ // CHECK-LABEL: @test_svdivr_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svdivr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -320,18 +320,18 @@ // CHECK-LABEL: @test_svdivr_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svdivr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -341,18 +341,18 @@ // CHECK-LABEL: @test_svdivr_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svdivr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -362,18 +362,18 @@ // CHECK-LABEL: @test_svdivr_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svdivr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -383,18 +383,18 @@ // CHECK-LABEL: @test_svdivr_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svdivr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -404,18 +404,18 @@ // CHECK-LABEL: @test_svdivr_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svdivr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -425,18 +425,18 @@ // CHECK-LABEL: @test_svdivr_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svdivr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -446,18 +446,18 @@ // CHECK-LABEL: @test_svdivr_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svdivr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -467,18 +467,18 @@ // CHECK-LABEL: @test_svdivr_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svdivr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -488,16 +488,16 @@ // CHECK-LABEL: @test_svdivr_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svdivr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -507,16 +507,16 @@ // CHECK-LABEL: @test_svdivr_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svdivr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -526,16 +526,16 @@ // CHECK-LABEL: @test_svdivr_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svdivr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -545,14 +545,14 @@ // CHECK-LABEL: @test_svdivr_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdivr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -562,14 +562,14 @@ // CHECK-LABEL: @test_svdivr_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdivr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -579,14 +579,14 @@ // CHECK-LABEL: @test_svdivr_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdivr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -596,14 +596,14 @@ // CHECK-LABEL: @test_svdivr_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdivr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -613,14 +613,14 @@ // CHECK-LABEL: @test_svdivr_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdivr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -630,14 +630,14 @@ // CHECK-LABEL: @test_svdivr_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdivr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -647,20 +647,20 @@ // CHECK-LABEL: @test_svdivr_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svdivr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -670,20 +670,20 @@ // CHECK-LABEL: @test_svdivr_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svdivr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -693,20 +693,20 @@ // CHECK-LABEL: @test_svdivr_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svdivr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -716,18 +716,18 @@ // CHECK-LABEL: @test_svdivr_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svdivr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -737,18 +737,18 @@ // CHECK-LABEL: @test_svdivr_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svdivr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -758,18 +758,18 @@ // CHECK-LABEL: @test_svdivr_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svdivr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -779,18 +779,18 @@ // CHECK-LABEL: @test_svdivr_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svdivr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -800,18 +800,18 @@ // CHECK-LABEL: @test_svdivr_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svdivr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -821,18 +821,18 @@ // CHECK-LABEL: @test_svdivr_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svdivr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svdot_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svdot_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svdot_s32(svint32_t op1, svint8_t op2, svint8_t op3) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svdot_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svdot_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svdot_s64(svint64_t op1, svint16_t op2, svint16_t op3) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svdot_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svdot_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svdot_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svdot_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svdot_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svdot_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) @@ -78,14 +78,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_s32u11__SVInt32_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdot_n_s32(svint32_t op1, svint8_t op2, int8_t op3) @@ -97,14 +97,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_s64u11__SVInt64_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdot_n_s64(svint64_t op1, svint16_t op2, int16_t op3) @@ -116,14 +116,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_u32u12__SVUint32_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdot_n_u32(svuint32_t op1, svuint8_t op2, uint8_t op3) @@ -135,14 +135,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdot_n_u64u12__SVUint64_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdot_n_u64(svuint64_t op1, svuint16_t op2, uint16_t op3) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svdot_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svdot_lane_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svdot_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svdot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svdot_lane_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svdot_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svdot_lane_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svdot_lane_s64(svint64_t op1, svint16_t op2, svint16_t op3) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svdot_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svdot_lane_s64_1u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svdot_lane_s64_1(svint64_t op1, svint16_t op2, svint16_t op3) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svdot_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svdot_lane_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svdot_lane_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svdot_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svdot_lane_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svdot_lane_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svdup_n_bf16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_zu10__SVBool_tu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svdup_n_bf16_z(svbool_t pg, bfloat16_t op) { @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svdup_n_bf16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_mu14__SVBFloat16_tu10__SVBool_tu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svdup_n_bf16_m(svbfloat16_t inactive, svbool_t pg, bfloat16_t op) { @@ -68,14 +68,14 @@ // CHECK-LABEL: @test_svdup_n_bf16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_xu10__SVBool_tu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) { @@ -87,14 +87,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBFloat16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c @@ -203,12 +203,12 @@ // CHECK-LABEL: @test_svdup_n_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_zu10__SVBool_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svdup_n_s8_z(svbool_t pg, int8_t op) @@ -218,14 +218,14 @@ // CHECK-LABEL: @test_svdup_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_zu10__SVBool_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svdup_n_s16_z(svbool_t pg, int16_t op) @@ -235,14 +235,14 @@ // CHECK-LABEL: @test_svdup_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_zu10__SVBool_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdup_n_s32_z(svbool_t pg, int32_t op) @@ -252,14 +252,14 @@ // CHECK-LABEL: @test_svdup_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_zu10__SVBool_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdup_n_s64_z(svbool_t pg, int64_t op) @@ -269,12 +269,12 @@ // CHECK-LABEL: @test_svdup_n_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_zu10__SVBool_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svdup_n_u8_z(svbool_t pg, uint8_t op) @@ -284,14 +284,14 @@ // CHECK-LABEL: @test_svdup_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_zu10__SVBool_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svdup_n_u16_z(svbool_t pg, uint16_t op) @@ -301,14 +301,14 @@ // CHECK-LABEL: @test_svdup_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_zu10__SVBool_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdup_n_u32_z(svbool_t pg, uint32_t op) @@ -318,14 +318,14 @@ // CHECK-LABEL: @test_svdup_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_zu10__SVBool_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdup_n_u64_z(svbool_t pg, uint64_t op) @@ -335,14 +335,14 @@ // CHECK-LABEL: @test_svdup_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_zu10__SVBool_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdup_n_f16_z(svbool_t pg, float16_t op) @@ -352,14 +352,14 @@ // CHECK-LABEL: @test_svdup_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_zu10__SVBool_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdup_n_f32_z(svbool_t pg, float32_t op) @@ -369,14 +369,14 @@ // CHECK-LABEL: @test_svdup_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_zu10__SVBool_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdup_n_f64_z(svbool_t pg, float64_t op) @@ -386,12 +386,12 @@ // CHECK-LABEL: @test_svdup_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_mu10__SVInt8_tu10__SVBool_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svdup_n_s8_m(svint8_t inactive, svbool_t pg, int8_t op) @@ -401,14 +401,14 @@ // CHECK-LABEL: @test_svdup_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_mu11__SVInt16_tu10__SVBool_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svdup_n_s16_m(svint16_t inactive, svbool_t pg, int16_t op) @@ -418,14 +418,14 @@ // CHECK-LABEL: @test_svdup_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_mu11__SVInt32_tu10__SVBool_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdup_n_s32_m(svint32_t inactive, svbool_t pg, int32_t op) @@ -435,14 +435,14 @@ // CHECK-LABEL: @test_svdup_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_mu11__SVInt64_tu10__SVBool_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdup_n_s64_m(svint64_t inactive, svbool_t pg, int64_t op) @@ -452,12 +452,12 @@ // CHECK-LABEL: @test_svdup_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_mu11__SVUint8_tu10__SVBool_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svdup_n_u8_m(svuint8_t inactive, svbool_t pg, uint8_t op) @@ -467,14 +467,14 @@ // CHECK-LABEL: @test_svdup_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_mu12__SVUint16_tu10__SVBool_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svdup_n_u16_m(svuint16_t inactive, svbool_t pg, uint16_t op) @@ -484,14 +484,14 @@ // CHECK-LABEL: @test_svdup_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_mu12__SVUint32_tu10__SVBool_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdup_n_u32_m(svuint32_t inactive, svbool_t pg, uint32_t op) @@ -501,14 +501,14 @@ // CHECK-LABEL: @test_svdup_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_mu12__SVUint64_tu10__SVBool_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdup_n_u64_m(svuint64_t inactive, svbool_t pg, uint64_t op) @@ -518,14 +518,14 @@ // CHECK-LABEL: @test_svdup_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_mu13__SVFloat16_tu10__SVBool_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdup_n_f16_m(svfloat16_t inactive, svbool_t pg, float16_t op) @@ -535,14 +535,14 @@ // CHECK-LABEL: @test_svdup_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_mu13__SVFloat32_tu10__SVBool_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdup_n_f32_m(svfloat32_t inactive, svbool_t pg, float32_t op) @@ -552,14 +552,14 @@ // CHECK-LABEL: @test_svdup_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_mu13__SVFloat64_tu10__SVBool_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdup_n_f64_m(svfloat64_t inactive, svbool_t pg, float64_t op) @@ -569,12 +569,12 @@ // CHECK-LABEL: @test_svdup_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_xu10__SVBool_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svdup_n_s8_x(svbool_t pg, int8_t op) @@ -584,14 +584,14 @@ // CHECK-LABEL: @test_svdup_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_xu10__SVBool_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svdup_n_s16_x(svbool_t pg, int16_t op) @@ -601,14 +601,14 @@ // CHECK-LABEL: @test_svdup_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_xu10__SVBool_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdup_n_s32_x(svbool_t pg, int32_t op) @@ -618,14 +618,14 @@ // CHECK-LABEL: @test_svdup_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_xu10__SVBool_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdup_n_s64_x(svbool_t pg, int64_t op) @@ -635,12 +635,12 @@ // CHECK-LABEL: @test_svdup_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_xu10__SVBool_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svdup_n_u8_x(svbool_t pg, uint8_t op) @@ -650,14 +650,14 @@ // CHECK-LABEL: @test_svdup_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_xu10__SVBool_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svdup_n_u16_x(svbool_t pg, uint16_t op) @@ -667,14 +667,14 @@ // CHECK-LABEL: @test_svdup_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_xu10__SVBool_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdup_n_u32_x(svbool_t pg, uint32_t op) @@ -684,14 +684,14 @@ // CHECK-LABEL: @test_svdup_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_xu10__SVBool_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdup_n_u64_x(svbool_t pg, uint64_t op) @@ -701,14 +701,14 @@ // CHECK-LABEL: @test_svdup_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_xu10__SVBool_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdup_n_f16_x(svbool_t pg, float16_t op) @@ -718,14 +718,14 @@ // CHECK-LABEL: @test_svdup_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_xu10__SVBool_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdup_n_f32_x(svbool_t pg, float32_t op) @@ -735,14 +735,14 @@ // CHECK-LABEL: @test_svdup_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_xu10__SVBool_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdup_n_f64_x(svbool_t pg, float64_t op) @@ -754,14 +754,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_lane_s8u10__SVInt8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svdup_lane_s8(svint8_t data, uint8_t index) @@ -773,14 +773,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s16u11__SVInt16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svdup_lane_s16(svint16_t data, uint16_t index) @@ -792,14 +792,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s32u11__SVInt32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdup_lane_s32(svint32_t data, uint32_t index) @@ -811,14 +811,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_s64u11__SVInt64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdup_lane_s64(svint64_t data, uint64_t index) @@ -830,14 +830,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdup_lane_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svdup_lane_u8(svuint8_t data, uint8_t index) @@ -849,14 +849,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svdup_lane_u16(svuint16_t data, uint16_t index) @@ -868,14 +868,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdup_lane_u32(svuint32_t data, uint32_t index) @@ -887,14 +887,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdup_lane_u64(svuint64_t data, uint64_t index) @@ -906,14 +906,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f16u13__SVFloat16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdup_lane_f16(svfloat16_t data, uint16_t index) @@ -925,14 +925,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f32u13__SVFloat32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdup_lane_f32(svfloat32_t data, uint32_t index) @@ -944,14 +944,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_lane_f64u13__SVFloat64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[INDEX:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdup_lane_f64(svfloat64_t data, uint64_t index) @@ -980,14 +980,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_b16b( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svdup_n_b16(bool op) @@ -999,14 +999,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_b32b( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svdup_n_b32(bool op) @@ -1018,14 +1018,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdup_n_b64b( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i1 [[OP:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svdup_n_b64(bool op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svdupq_lane_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svdupq_lane_bf16u14__SVBFloat16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svdupq_lane_bf16(svbfloat16_t data, uint64_t index) { @@ -39,8 +39,8 @@ // CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i64 5 // CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i64 6 // CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i64 7 -// CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z18test_svdupq_n_bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16( @@ -53,8 +53,8 @@ // CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i64 5 // CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i64 6 // CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i64 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] // svbfloat16_t test_svdupq_n_bf16(bfloat16_t x0, bfloat16_t x1, bfloat16_t x2, bfloat16_t x3, diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svdupq_lane_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svdupq_lane_s8u10__SVInt8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svdupq_lane_s8(svint8_t data, uint64_t index) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svdupq_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s16u11__SVInt16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svdupq_lane_s16(svint16_t data, uint64_t index) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svdupq_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s32u11__SVInt32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svdupq_lane_s32(svint32_t data, uint64_t index) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svdupq_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s64u11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svdupq_lane_s64(svint64_t data, uint64_t index) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svdupq_lane_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svdupq_lane_u8u11__SVUint8_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svdupq_lane_u8(svuint8_t data, uint64_t index) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svdupq_lane_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u16u12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svdupq_lane_u16(svuint16_t data, uint64_t index) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svdupq_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u32u12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svdupq_lane_u32(svuint32_t data, uint64_t index) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svdupq_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svdupq_lane_u64(svuint64_t data, uint64_t index) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svdupq_lane_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f16u13__SVFloat16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svdupq_lane_f16(svfloat16_t data, uint64_t index) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svdupq_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f32u13__SVFloat32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svdupq_lane_f32(svfloat32_t data, uint64_t index) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svdupq_lane_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f64u13__SVFloat64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svdupq_lane_f64(svfloat64_t data, uint64_t index) @@ -197,8 +197,8 @@ // CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 // CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 // CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 -// CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CHECK-NEXT: ret [[TMP17]] // // CPP-CHECK-LABEL: @_Z16test_svdupq_n_s8aaaaaaaaaaaaaaaa( @@ -219,8 +219,8 @@ // CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 // CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 // CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CPP-CHECK-NEXT: ret [[TMP17]] // svint8_t test_svdupq_n_s8(int8_t x0, int8_t x1, int8_t x2, int8_t x3, @@ -242,8 +242,8 @@ // CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 // CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 // CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 -// CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_s16ssssssss( @@ -256,8 +256,8 @@ // CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 // CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 // CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] // svint16_t test_svdupq_n_s16(int16_t x0, int16_t x1, int16_t x2, int16_t x3, @@ -273,8 +273,8 @@ // CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 // CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_s32iiii( @@ -283,8 +283,8 @@ // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 // CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 // CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CPP-CHECK-NEXT: ret [[TMP5]] // svint32_t test_svdupq_n_s32(int32_t x0, int32_t x1, int32_t x2, int32_t x3) @@ -297,16 +297,16 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_s64ll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svdupq_n_s64(int64_t x0, int64_t x1) @@ -332,8 +332,8 @@ // CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 // CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 // CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 -// CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CHECK-NEXT: ret [[TMP17]] // // CPP-CHECK-LABEL: @_Z16test_svdupq_n_u8hhhhhhhhhhhhhhhh( @@ -354,8 +354,8 @@ // CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i64 13 // CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i64 14 // CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i64 15 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) // CPP-CHECK-NEXT: ret [[TMP17]] // svuint8_t test_svdupq_n_u8(uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, @@ -377,8 +377,8 @@ // CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 // CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 // CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 -// CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_u16tttttttt( @@ -391,8 +391,8 @@ // CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i64 5 // CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i64 6 // CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i64 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] // svuint16_t test_svdupq_n_u16(uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3, @@ -408,8 +408,8 @@ // CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 // CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_u32jjjj( @@ -418,8 +418,8 @@ // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i64 1 // CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i64 2 // CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i64 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) // CPP-CHECK-NEXT: ret [[TMP5]] // svuint32_t test_svdupq_n_u32(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3) @@ -432,16 +432,16 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_u64mm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i64 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svdupq_n_u64(uint64_t x0, uint64_t x1) @@ -459,8 +459,8 @@ // CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i64 5 // CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i64 6 // CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i64 7 -// CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) // CHECK-NEXT: ret [[TMP9]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_f16DhDhDhDhDhDhDhDh( @@ -473,8 +473,8 @@ // CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i64 5 // CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i64 6 // CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i64 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) // CPP-CHECK-NEXT: ret [[TMP9]] // svfloat16_t test_svdupq_n_f16(float16_t x0, float16_t x1, float16_t x2, float16_t x3, @@ -490,8 +490,8 @@ // CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i64 2 // CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i64 3 -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_f32ffff( @@ -500,8 +500,8 @@ // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i64 1 // CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i64 2 // CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i64 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) // CPP-CHECK-NEXT: ret [[TMP5]] // svfloat32_t test_svdupq_n_f32(float32_t x0, float32_t x1, float32_t x2, float32_t x3) @@ -514,16 +514,16 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i64 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_f64dd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i64 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svdupq_n_f64(float64_t x0, float64_t x1) @@ -565,10 +565,10 @@ // CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i64 13 // CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i64 14 // CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i64 15 -// CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP18:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) -// CHECK-NEXT: [[TMP19:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], zeroinitializer) +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) +// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], zeroinitializer) // CHECK-NEXT: ret [[TMP19]] // // CPP-CHECK-LABEL: @_Z16test_svdupq_n_b8bbbbbbbbbbbbbbbb( @@ -605,10 +605,10 @@ // CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i64 13 // CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i64 14 // CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i64 15 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP18:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) -// CPP-CHECK-NEXT: [[TMP19:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) +// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], zeroinitializer) // CPP-CHECK-NEXT: ret [[TMP19]] // svbool_t test_svdupq_n_b8(bool x0, bool x1, bool x2, bool x3, @@ -638,11 +638,11 @@ // CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i64 5 // CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i64 6 // CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i64 7 -// CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP18:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) -// CHECK-NEXT: [[TMP19:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], zeroinitializer) -// CHECK-NEXT: [[TMP20:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP19]]) +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) +// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], zeroinitializer) +// CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP19]]) // CHECK-NEXT: ret [[TMP20]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_b16bbbbbbbb( @@ -663,11 +663,11 @@ // CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i64 5 // CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i64 6 // CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i64 7 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP18:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) -// CPP-CHECK-NEXT: [[TMP19:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP20:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP19]]) +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) +// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP19]]) // CPP-CHECK-NEXT: ret [[TMP20]] // svbool_t test_svdupq_n_b16(bool x0, bool x1, bool x2, bool x3, @@ -687,11 +687,11 @@ // CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i64 1 // CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i64 2 // CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i64 3 -// CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) -// CHECK-NEXT: [[TMP11:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], zeroinitializer) -// CHECK-NEXT: [[TMP12:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP11]]) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) +// CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], zeroinitializer) +// CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP11]]) // CHECK-NEXT: ret [[TMP12]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_b32bbbb( @@ -704,11 +704,11 @@ // CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i64 1 // CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i64 2 // CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i64 3 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) -// CPP-CHECK-NEXT: [[TMP11:%.*]] = tail call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP12:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP11]]) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) +// CPP-CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP11]]) // CPP-CHECK-NEXT: ret [[TMP12]] // svbool_t test_svdupq_n_b32(bool x0, bool x1, bool x2, bool x3) @@ -723,11 +723,11 @@ // CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 // CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i64 1 -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) -// CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], zeroinitializer) -// CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP7]]) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) +// CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], zeroinitializer) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP7]]) // CHECK-NEXT: ret [[TMP8]] // // CPP-CHECK-LABEL: @_Z17test_svdupq_n_b64bb( @@ -736,11 +736,11 @@ // CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 // CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i64 1 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) -// CPP-CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP7]]) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) +// CPP-CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP7]]) // CPP-CHECK-NEXT: ret [[TMP8]] // svbool_t test_svdupq_n_b64(bool x0, bool x1) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_sveor_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveor_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_sveor_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_sveor_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_sveor_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_sveor_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_sveor_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_sveor_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_sveor_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_sveor_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveor_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_sveor_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_sveor_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_sveor_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_sveor_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_sveor_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_sveor_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_sveor_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_sveor_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_sveor_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_sveor_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_sveor_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_sveor_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_sveor_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_sveor_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_sveor_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_sveor_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_sveor_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_sveor_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_sveor_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_sveor_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_sveor_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_sveor_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_sveor_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_sveor_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_sveor_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_sveor_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_sveor_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_sveor_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_sveor_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_sveor_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_sveor_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_sveor_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_sveor_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_sveor_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_sveor_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_sveor_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_sveor_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_sveor_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_sveor_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_sveor_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_sveor_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_sveor_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_sveor_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_sveor_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_sveor_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_sveor_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_sveor_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_sveor_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_sveor_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_sveor_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_sveor_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_sveor_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_sveor_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_sveor_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_sveor_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_sveor_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_sveor_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_sveor_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_sveor_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_sveor_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_sveor_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_sveor_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_sveor_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_sveor_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_sveor_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_sveor_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_sveor_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_sveor_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_sveor_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_sveor_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_sveor_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_sveor_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_sveor_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_sveor_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_sveor_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_sveor_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_sveor_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_sveor_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_sveor_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_sveor_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_sveor_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,12 +936,12 @@ // CHECK-LABEL: @test_sveor_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_sveor_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_sveor_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_sveorv_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_sveorv_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_sveorv_s8(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_sveorv_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveorv_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // int16_t test_sveorv_s16(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_sveorv_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveorv_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_sveorv_s32(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_sveorv_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveorv_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_sveorv_s64(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_sveorv_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_sveorv_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_sveorv_u8(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_sveorv_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveorv_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // uint16_t test_sveorv_u16(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_sveorv_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveorv_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_sveorv_u32(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_sveorv_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_sveorv_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_sveorv_u64(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svexpa_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fexpa.x.nxv8f16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv8f16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svexpa_f16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fexpa.x.nxv8f16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv8f16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svexpa_f16(svuint16_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svexpa_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fexpa.x.nxv4f32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv4f32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svexpa_f32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fexpa.x.nxv4f32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv4f32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svexpa_f32(svuint32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svexpa_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fexpa.x.nxv2f64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv2f64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svexpa_f64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fexpa.x.nxv2f64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv2f64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svexpa_f64(svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svext_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svext_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svext_bf16(svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svext_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svext_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svext_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svext_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svext_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svext_s8_1(svint8_t op1, svint8_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svext_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svext_s16(svint16_t op1, svint16_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svext_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svext_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svext_s16_1(svint16_t op1, svint16_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svext_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svext_s32(svint32_t op1, svint32_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svext_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svext_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svext_s32_1(svint32_t op1, svint32_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svext_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svext_s64(svint64_t op1, svint64_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svext_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svext_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svext_s64_1(svint64_t op1, svint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svext_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svext_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svext_u8(svuint8_t op1, svuint8_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svext_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svext_u16(svuint16_t op1, svuint16_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svext_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svext_u32(svuint32_t op1, svuint32_t op2) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svext_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svext_u64(svuint64_t op1, svuint64_t op2) @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svext_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 127) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 127) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svext_f16(svfloat16_t op1, svfloat16_t op2) @@ -211,12 +211,12 @@ // CHECK-LABEL: @test_svext_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svext_f32(svfloat32_t op1, svfloat32_t op2) @@ -226,12 +226,12 @@ // CHECK-LABEL: @test_svext_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svext_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ext.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svext_f64(svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svextb_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svextb_s16_z(svbool_t pg, svint16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svextb_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svextb_s32_z(svbool_t pg, svint32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svextb_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svextb_s64_z(svbool_t pg, svint64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svextb_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svextb_u16_z(svbool_t pg, svuint16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svextb_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svextb_u32_z(svbool_t pg, svuint32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svextb_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svextb_u64_z(svbool_t pg, svuint64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svextb_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svextb_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svextb_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svextb_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svextb_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svextb_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svextb_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svextb_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svextb_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svextb_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svextb_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svextb_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -220,14 +220,14 @@ // CHECK-LABEL: @test_svextb_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svextb_s16_x(svbool_t pg, svint16_t op) @@ -237,14 +237,14 @@ // CHECK-LABEL: @test_svextb_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svextb_s32_x(svbool_t pg, svint32_t op) @@ -254,14 +254,14 @@ // CHECK-LABEL: @test_svextb_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svextb_s64_x(svbool_t pg, svint64_t op) @@ -271,14 +271,14 @@ // CHECK-LABEL: @test_svextb_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svextb_u16_x(svbool_t pg, svuint16_t op) @@ -288,14 +288,14 @@ // CHECK-LABEL: @test_svextb_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svextb_u32_x(svbool_t pg, svuint32_t op) @@ -305,14 +305,14 @@ // CHECK-LABEL: @test_svextb_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextb_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svextb_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svexth_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svexth_s32_z(svbool_t pg, svint32_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svexth_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svexth_s64_z(svbool_t pg, svint64_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svexth_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svexth_u32_z(svbool_t pg, svuint32_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svexth_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svexth_u64_z(svbool_t pg, svuint64_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svexth_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svexth_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svexth_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svexth_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svexth_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svexth_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svexth_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svexth_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svexth_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svexth_s32_x(svbool_t pg, svint32_t op) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svexth_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svexth_s64_x(svbool_t pg, svint64_t op) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svexth_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svexth_u32_x(svbool_t pg, svuint32_t op) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svexth_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svexth_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svexth_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svextw_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextw_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svextw_s64_z(svbool_t pg, svint64_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svextw_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextw_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svextw_u64_z(svbool_t pg, svuint64_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svextw_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextw_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svextw_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svextw_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextw_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svextw_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svextw_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextw_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svextw_s64_x(svbool_t pg, svint64_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svextw_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svextw_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svextw_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svget2_bf16_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget2_bf16_014svbfloat16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget2_bf16_0(svbfloat16x2_t tuple) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svget2_bf16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget2_bf16_114svbfloat16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget2_bf16_1(svbfloat16x2_t tuple) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svget2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svget2_s810svint8x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svget2_s8(svint8x2_t tuple) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svget2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_s1611svint16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svget2_s16(svint16x2_t tuple) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svget2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_s3211svint32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svget2_s32(svint32x2_t tuple) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svget2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_s6411svint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svget2_s64(svint64x2_t tuple) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svget2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svget2_u811svuint8x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svget2_u8(svuint8x2_t tuple) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svget2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_u1612svuint16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svget2_u16(svuint16x2_t tuple) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svget2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_u3212svuint32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svget2_u32(svuint32x2_t tuple) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svget2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_u6412svuint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svget2_u64(svuint64x2_t tuple) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svget2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_f1613svfloat16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svget2_f16(svfloat16x2_t tuple) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svget2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_f3213svfloat32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svget2_f32(svfloat32x2_t tuple) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svget2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget2_f6413svfloat64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svget2_f64(svfloat64x2_t tuple) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svget3_bf16_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget3_bf16_014svbfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget3_bf16_0(svbfloat16x3_t tuple) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svget3_bf16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget3_bf16_114svbfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget3_bf16_1(svbfloat16x3_t tuple) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svget3_bf16_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget3_bf16_214svbfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget3_bf16_2(svbfloat16x3_t tuple) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svget3_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svget3_s810svint8x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svget3_s8(svint8x3_t tuple) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svget3_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_s1611svint16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svget3_s16(svint16x3_t tuple) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svget3_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_s3211svint32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svget3_s32(svint32x3_t tuple) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svget3_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_s6411svint64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svget3_s64(svint64x3_t tuple) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svget3_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svget3_u811svuint8x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svget3_u8(svuint8x3_t tuple) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svget3_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_u1612svuint16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svget3_u16(svuint16x3_t tuple) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svget3_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_u3212svuint32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svget3_u32(svuint32x3_t tuple) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svget3_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_u6412svuint64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svget3_u64(svuint64x3_t tuple) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svget3_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_f1613svfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svget3_f16(svfloat16x3_t tuple) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svget3_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_f3213svfloat32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svget3_f32(svfloat32x3_t tuple) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svget3_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget3_f6413svfloat64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svget3_f64(svfloat64x3_t tuple) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svget4_bf16_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget4_bf16_014svbfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget4_bf16_0(svbfloat16x4_t tuple) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svget4_bf16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget4_bf16_114svbfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget4_bf16_1(svbfloat16x4_t tuple) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svget4_bf16_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget4_bf16_214svbfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget4_bf16_2(svbfloat16x4_t tuple) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svget4_bf16_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svget4_bf16_314svbfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svget4_bf16_3(svbfloat16x4_t tuple) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c @@ -18,12 +18,12 @@ // several parameters, one for each member of the original struct. // CHECK-LABEL: @test_svget4_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svget4_s810svint8x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svget4_s8(svint8x4_t tuple) @@ -33,12 +33,12 @@ // CHECK-LABEL: @test_svget4_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_s1611svint16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svget4_s16(svint16x4_t tuple) @@ -48,12 +48,12 @@ // CHECK-LABEL: @test_svget4_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_s3211svint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svget4_s32(svint32x4_t tuple) @@ -63,12 +63,12 @@ // CHECK-LABEL: @test_svget4_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_s6411svint64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svget4_s64(svint64x4_t tuple) @@ -78,12 +78,12 @@ // CHECK-LABEL: @test_svget4_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svget4_u811svuint8x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svget4_u8(svuint8x4_t tuple) @@ -93,12 +93,12 @@ // CHECK-LABEL: @test_svget4_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_u1612svuint16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svget4_u16(svuint16x4_t tuple) @@ -108,12 +108,12 @@ // CHECK-LABEL: @test_svget4_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_u3212svuint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svget4_u32(svuint32x4_t tuple) @@ -123,12 +123,12 @@ // CHECK-LABEL: @test_svget4_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_u6412svuint64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svget4_u64(svuint64x4_t tuple) @@ -138,12 +138,12 @@ // CHECK-LABEL: @test_svget4_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_f1613svfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svget4_f16(svfloat16x4_t tuple) @@ -153,12 +153,12 @@ // CHECK-LABEL: @test_svget4_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[TUPLE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[TUPLE:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_f3213svfloat32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[TUPLE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[TUPLE:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svget4_f32(svfloat32x4_t tuple) @@ -168,12 +168,12 @@ // CHECK-LABEL: @test_svget4_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[TUPLE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[TUPLE:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svget4_f6413svfloat64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[TUPLE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[TUPLE:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svget4_f64(svfloat64x4_t tuple) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svindex_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svindex_s8aa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svindex_s8(int8_t base, int8_t step) @@ -22,12 +22,12 @@ // CHECK-LABEL: @test_svindex_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svindex_s16ss( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svindex_s16(int16_t base, int16_t step) @@ -37,12 +37,12 @@ // CHECK-LABEL: @test_svindex_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svindex_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svindex_s32(int32_t base, int32_t step) @@ -52,12 +52,12 @@ // CHECK-LABEL: @test_svindex_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svindex_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svindex_s64(int64_t base, int64_t step) @@ -67,12 +67,12 @@ // CHECK-LABEL: @test_svindex_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svindex_u8hh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svindex_u8(uint8_t base, uint8_t step) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svindex_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svindex_u16tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svindex_u16(uint16_t base, uint16_t step) @@ -97,12 +97,12 @@ // CHECK-LABEL: @test_svindex_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svindex_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svindex_u32(uint32_t base, uint32_t step) @@ -112,12 +112,12 @@ // CHECK-LABEL: @test_svindex_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svindex_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svindex_u64(uint64_t base, uint64_t step) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svinsr_n_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8bf16( [[OP1:%.*]], bfloat [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8bf16( [[OP1:%.*]], bfloat [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svinsr_n_bf16u14__SVBFloat16_tu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8bf16( [[OP1:%.*]], bfloat [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8bf16( [[OP1:%.*]], bfloat [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svinsr_n_bf16(svbfloat16_t op1, bfloat16_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svinsr_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svinsr_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svinsr_n_s8(svint8_t op1, int8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svinsr_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svinsr_n_s16(svint16_t op1, int16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svinsr_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svinsr_n_s32(svint32_t op1, int32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svinsr_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svinsr_n_s64(svint64_t op1, int64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svinsr_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svinsr_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svinsr_n_u8(svuint8_t op1, uint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svinsr_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svinsr_n_u16(svuint16_t op1, uint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svinsr_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svinsr_n_u32(svuint32_t op1, uint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svinsr_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svinsr_n_u64(svuint64_t op1, uint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svinsr_n_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8f16( [[OP1:%.*]], half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8f16( [[OP1:%.*]], half [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_f16u13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv8f16( [[OP1:%.*]], half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8f16( [[OP1:%.*]], half [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svinsr_n_f16(svfloat16_t op1, float16_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svinsr_n_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv4f32( [[OP1:%.*]], float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4f32( [[OP1:%.*]], float [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_f32u13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv4f32( [[OP1:%.*]], float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4f32( [[OP1:%.*]], float [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svinsr_n_f32(svfloat32_t op1, float32_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svinsr_n_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv2f64( [[OP1:%.*]], double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2f64( [[OP1:%.*]], double [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svinsr_n_f64u13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.insr.nxv2f64( [[OP1:%.*]], double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2f64( [[OP1:%.*]], double [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svinsr_n_f64(svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svlasta_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.lasta.nxv8bf16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lasta.nxv8bf16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret bfloat [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlasta_bf16u10__SVBool_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.lasta.nxv8bf16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lasta.nxv8bf16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret bfloat [[TMP1]] // bfloat16_t test_svlasta_bf16(svbool_t pg, svbfloat16_t op) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svlasta_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlasta_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svlasta_s8(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svlasta_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // int16_t test_svlasta_s16(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svlasta_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svlasta_s32(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svlasta_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svlasta_s64(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svlasta_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlasta_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svlasta_u8(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svlasta_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // uint16_t test_svlasta_u16(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svlasta_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svlasta_u32(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svlasta_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svlasta_u64(svbool_t pg, svuint64_t op) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svlasta_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.lasta.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lasta.nxv8f16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_f16u10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.lasta.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lasta.nxv8f16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svlasta_f16(svbool_t pg, svfloat16_t op) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svlasta_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.lasta.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lasta.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.lasta.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lasta.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svlasta_f32(svbool_t pg, svfloat32_t op) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svlasta_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.lasta.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lasta.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlasta_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.lasta.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lasta.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svlasta_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svlastb_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.lastb.nxv8bf16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lastb.nxv8bf16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret bfloat [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlastb_bf16u10__SVBool_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.lastb.nxv8bf16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lastb.nxv8bf16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret bfloat [[TMP1]] // bfloat16_t test_svlastb_bf16(svbool_t pg, svbfloat16_t op) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svlastb_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlastb_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svlastb_s8(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svlastb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // int16_t test_svlastb_s16(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svlastb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svlastb_s32(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svlastb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svlastb_s64(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svlastb_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlastb_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svlastb_u8(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svlastb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // uint16_t test_svlastb_u16(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svlastb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svlastb_u32(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svlastb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svlastb_u64(svbool_t pg, svuint64_t op) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svlastb_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.lastb.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lastb.nxv8f16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_f16u10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.lastb.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lastb.nxv8f16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svlastb_f16(svbool_t pg, svfloat16_t op) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svlastb_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.lastb.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lastb.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.lastb.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lastb.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svlastb_f32(svbool_t pg, svfloat32_t op) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svlastb_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.lastb.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lastb.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlastb_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.lastb.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lastb.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svlastb_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c @@ -17,16 +17,16 @@ // CHECK-LABEL: @test_svld1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svld1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: ret [[TMP2]] // svbfloat16_t test_svld1_bf16(svbool_t pg, const bfloat16_t *base) @@ -36,20 +36,20 @@ // CHECK-LABEL: @test_svld1_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z20test_svld1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8bf16.p0nxv8bf16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: ret [[TMP4]] // svbfloat16_t test_svld1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svld1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2:![0-9]+]] +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2:![0-9]+]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z13test_svld1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2:![0-9]+]] // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svld1_s8(svbool_t pg, const int8_t *base) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svld1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5:![0-9]+]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5:![0-9]+]] // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svld1_s16(svbool_t pg, const int16_t *base) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svld1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7:![0-9]+]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7:![0-9]+]] // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svld1_s32(svbool_t pg, const int32_t *base) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svld1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9:![0-9]+]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9:![0-9]+]] // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svld1_s64(svbool_t pg, const int64_t *base) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svld1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z13test_svld1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svld1_u8(svbool_t pg, const uint8_t *base) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svld1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svld1_u16(svbool_t pg, const uint16_t *base) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svld1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svld1_u32(svbool_t pg, const uint32_t *base) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svld1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svld1_u64(svbool_t pg, const uint64_t *base) @@ -164,16 +164,16 @@ // CHECK-LABEL: @test_svld1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11:![0-9]+]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11:![0-9]+]] // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svld1_f16(svbool_t pg, const float16_t *base) @@ -183,16 +183,16 @@ // CHECK-LABEL: @test_svld1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13:![0-9]+]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13:![0-9]+]] // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svld1_f32(svbool_t pg, const float32_t *base) @@ -202,16 +202,16 @@ // CHECK-LABEL: @test_svld1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15:![0-9]+]] // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svld1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15:![0-9]+]] // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svld1_f64(svbool_t pg, const float64_t *base) @@ -224,7 +224,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svld1_vnum_s8u10__SVBool_tPKal( @@ -232,7 +232,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] // CPP-CHECK-NEXT: ret [[TMP3]] // svint8_t test_svld1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) @@ -242,20 +242,20 @@ // CHECK-LABEL: @test_svld1_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] // CPP-CHECK-NEXT: ret [[TMP4]] // svint16_t test_svld1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) @@ -265,20 +265,20 @@ // CHECK-LABEL: @test_svld1_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] // CPP-CHECK-NEXT: ret [[TMP4]] // svint32_t test_svld1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) @@ -288,20 +288,20 @@ // CHECK-LABEL: @test_svld1_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] // CPP-CHECK-NEXT: ret [[TMP4]] // svint64_t test_svld1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) @@ -314,7 +314,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svld1_vnum_u8u10__SVBool_tPKhl( @@ -322,7 +322,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.masked.load.nxv16i8.p0nxv16i8(* [[TMP2]], i32 1, [[PG:%.*]], zeroinitializer), !tbaa [[TBAA2]] // CPP-CHECK-NEXT: ret [[TMP3]] // svuint8_t test_svld1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) @@ -332,20 +332,20 @@ // CHECK-LABEL: @test_svld1_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i16.p0nxv8i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA5]] // CPP-CHECK-NEXT: ret [[TMP4]] // svuint16_t test_svld1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) @@ -355,20 +355,20 @@ // CHECK-LABEL: @test_svld1_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i32.p0nxv4i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA7]] // CPP-CHECK-NEXT: ret [[TMP4]] // svuint32_t test_svld1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) @@ -378,20 +378,20 @@ // CHECK-LABEL: @test_svld1_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i64.p0nxv2i64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA9]] // CPP-CHECK-NEXT: ret [[TMP4]] // svuint64_t test_svld1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) @@ -401,20 +401,20 @@ // CHECK-LABEL: @test_svld1_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast half* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast half* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8f16.p0nxv8f16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA11]] // CPP-CHECK-NEXT: ret [[TMP4]] // svfloat16_t test_svld1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) @@ -424,20 +424,20 @@ // CHECK-LABEL: @test_svld1_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4f32.p0nxv4f32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA13]] // CPP-CHECK-NEXT: ret [[TMP4]] // svfloat32_t test_svld1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) @@ -447,20 +447,20 @@ // CHECK-LABEL: @test_svld1_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15]] // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2f64.p0nxv2f64(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA15]] // CPP-CHECK-NEXT: ret [[TMP4]] // svfloat64_t test_svld1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) @@ -470,14 +470,14 @@ // CHECK-LABEL: @test_svld1_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { @@ -486,14 +486,14 @@ // CHECK-LABEL: @test_svld1_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { @@ -502,14 +502,14 @@ // CHECK-LABEL: @test_svld1_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { @@ -518,14 +518,14 @@ // CHECK-LABEL: @test_svld1_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { @@ -534,14 +534,14 @@ // CHECK-LABEL: @test_svld1_gather_u32base_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { @@ -550,14 +550,14 @@ // CHECK-LABEL: @test_svld1_gather_u64base_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { @@ -566,14 +566,14 @@ // CHECK-LABEL: @test_svld1_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1_gather_s32offset_s32(svbool_t pg, const int32_t *base, svint32_t offsets) { @@ -582,14 +582,14 @@ // CHECK-LABEL: @test_svld1_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) { @@ -598,14 +598,14 @@ // CHECK-LABEL: @test_svld1_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, svint32_t offsets) { @@ -614,14 +614,14 @@ // CHECK-LABEL: @test_svld1_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) { @@ -630,14 +630,14 @@ // CHECK-LABEL: @test_svld1_gather_s32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1_gather_s32offset_f32(svbool_t pg, const float32_t *base, svint32_t offsets) { @@ -646,14 +646,14 @@ // CHECK-LABEL: @test_svld1_gather_s64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) { @@ -662,14 +662,14 @@ // CHECK-LABEL: @test_svld1_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) { @@ -678,14 +678,14 @@ // CHECK-LABEL: @test_svld1_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) { @@ -694,14 +694,14 @@ // CHECK-LABEL: @test_svld1_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) { @@ -710,14 +710,14 @@ // CHECK-LABEL: @test_svld1_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) { @@ -726,14 +726,14 @@ // CHECK-LABEL: @test_svld1_gather_u32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) { @@ -742,14 +742,14 @@ // CHECK-LABEL: @test_svld1_gather_u64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) { @@ -758,14 +758,14 @@ // CHECK-LABEL: @test_svld1_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -774,14 +774,14 @@ // CHECK-LABEL: @test_svld1_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -790,14 +790,14 @@ // CHECK-LABEL: @test_svld1_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -806,14 +806,14 @@ // CHECK-LABEL: @test_svld1_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -822,14 +822,14 @@ // CHECK-LABEL: @test_svld1_gather_u32base_offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -838,14 +838,14 @@ // CHECK-LABEL: @test_svld1_gather_u64base_offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -854,14 +854,14 @@ // CHECK-LABEL: @test_svld1_gather_s32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1_gather_s32index_s32(svbool_t pg, const int32_t *base, svint32_t indices) { @@ -870,14 +870,14 @@ // CHECK-LABEL: @test_svld1_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) { @@ -886,14 +886,14 @@ // CHECK-LABEL: @test_svld1_gather_s32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1_gather_s32index_u32(svbool_t pg, const uint32_t *base, svint32_t indices) { @@ -902,14 +902,14 @@ // CHECK-LABEL: @test_svld1_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) { @@ -918,14 +918,14 @@ // CHECK-LABEL: @test_svld1_gather_s32index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1_gather_s32index_f32(svbool_t pg, const float32_t *base, svint32_t indices) { @@ -934,14 +934,14 @@ // CHECK-LABEL: @test_svld1_gather_s64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) { @@ -950,14 +950,14 @@ // CHECK-LABEL: @test_svld1_gather_u32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1_gather_u32index_s32(svbool_t pg, const int32_t *base, svuint32_t indices) { @@ -966,14 +966,14 @@ // CHECK-LABEL: @test_svld1_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) { @@ -982,14 +982,14 @@ // CHECK-LABEL: @test_svld1_gather_u32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1_gather_u32index_u32(svbool_t pg, const uint32_t *base, svuint32_t indices) { @@ -998,14 +998,14 @@ // CHECK-LABEL: @test_svld1_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) { @@ -1014,14 +1014,14 @@ // CHECK-LABEL: @test_svld1_gather_u32index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1_gather_u32index_f32(svbool_t pg, const float32_t *base, svuint32_t indices) { @@ -1030,14 +1030,14 @@ // CHECK-LABEL: @test_svld1_gather_u64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) { @@ -1046,16 +1046,16 @@ // CHECK-LABEL: @test_svld1_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svld1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -1064,16 +1064,16 @@ // CHECK-LABEL: @test_svld1_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svld1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { @@ -1082,16 +1082,16 @@ // CHECK-LABEL: @test_svld1_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svld1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -1100,16 +1100,16 @@ // CHECK-LABEL: @test_svld1_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svld1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { @@ -1118,16 +1118,16 @@ // CHECK-LABEL: @test_svld1_gather_u32base_index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svld1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -1136,16 +1136,16 @@ // CHECK-LABEL: @test_svld1_gather_u64base_index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svld1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svld1ro_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svld1ro_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svld1ro_bf16(svbool_t pg, const bfloat16_t *base) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svld1ro_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svld1ro_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svld1ro_s8(svbool_t pg, const int8_t *base) { @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svld1ro_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svld1ro_s16(svbool_t pg, const int16_t *base) { @@ -47,14 +47,14 @@ // CHECK-LABEL: @test_svld1ro_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1ro_s32(svbool_t pg, const int32_t *base) { @@ -63,14 +63,14 @@ // CHECK-LABEL: @test_svld1ro_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1ro_s64(svbool_t pg, const int64_t *base) { @@ -79,12 +79,12 @@ // CHECK-LABEL: @test_svld1ro_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svld1ro_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svld1ro_u8(svbool_t pg, const uint8_t *base) { @@ -93,14 +93,14 @@ // CHECK-LABEL: @test_svld1ro_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svld1ro_u16(svbool_t pg, const uint16_t *base) { @@ -109,14 +109,14 @@ // CHECK-LABEL: @test_svld1ro_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1ro_u32(svbool_t pg, const uint32_t *base) { @@ -125,14 +125,14 @@ // CHECK-LABEL: @test_svld1ro_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1ro_u64(svbool_t pg, const uint64_t *base) { @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svld1ro_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svld1ro_f16(svbool_t pg, const float16_t *base) { @@ -157,14 +157,14 @@ // CHECK-LABEL: @test_svld1ro_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1ro_f32(svbool_t pg, const float32_t *base) { @@ -173,14 +173,14 @@ // CHECK-LABEL: @test_svld1ro_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1ro_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1ro.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1ro_f64(svbool_t pg, const float64_t *base) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svld1rq_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svld1rq_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svld1rq_bf16(svbool_t pg, const bfloat16_t *base) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svld1rq_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svld1rq_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svld1rq_s8(svbool_t pg, const int8_t *base) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svld1rq_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svld1rq_s16(svbool_t pg, const int16_t *base) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svld1rq_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svld1rq_s32(svbool_t pg, const int32_t *base) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svld1rq_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svld1rq_s64(svbool_t pg, const int64_t *base) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svld1rq_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svld1rq_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svld1rq_u8(svbool_t pg, const uint8_t *base) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svld1rq_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svld1rq_u16(svbool_t pg, const uint16_t *base) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svld1rq_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svld1rq_u32(svbool_t pg, const uint32_t *base) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svld1rq_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svld1rq_u64(svbool_t pg, const uint64_t *base) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svld1rq_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svld1rq_f16(svbool_t pg, const float16_t *base) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svld1rq_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svld1rq_f32(svbool_t pg, const float32_t *base) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svld1rq_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svld1rq_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1rq.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svld1rq_f64(svbool_t pg, const float64_t *base) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c @@ -16,17 +16,17 @@ // CHECK-LABEL: @test_svld1sb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sb_s16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -37,17 +37,17 @@ // CHECK-LABEL: @test_svld1sb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sb_s32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -58,17 +58,17 @@ // CHECK-LABEL: @test_svld1sb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sb_s64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -79,17 +79,17 @@ // CHECK-LABEL: @test_svld1sb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sb_u16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -100,17 +100,17 @@ // CHECK-LABEL: @test_svld1sb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sb_u32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -121,17 +121,17 @@ // CHECK-LABEL: @test_svld1sb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sb_u64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -142,21 +142,21 @@ // CHECK-LABEL: @test_svld1sb_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -167,21 +167,21 @@ // CHECK-LABEL: @test_svld1sb_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -192,21 +192,21 @@ // CHECK-LABEL: @test_svld1sb_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -217,21 +217,21 @@ // CHECK-LABEL: @test_svld1sb_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -242,21 +242,21 @@ // CHECK-LABEL: @test_svld1sb_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -267,21 +267,21 @@ // CHECK-LABEL: @test_svld1sb_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -292,15 +292,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -310,15 +310,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -328,15 +328,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -346,15 +346,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -364,15 +364,15 @@ // CHECK-LABEL: @test_svld1sb_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -382,15 +382,15 @@ // CHECK-LABEL: @test_svld1sb_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -400,15 +400,15 @@ // CHECK-LABEL: @test_svld1sb_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -418,15 +418,15 @@ // CHECK-LABEL: @test_svld1sb_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -436,15 +436,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -454,15 +454,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -472,15 +472,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -490,15 +490,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -508,15 +508,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -526,15 +526,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -544,15 +544,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -562,15 +562,15 @@ // CHECK-LABEL: @test_svld1sb_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c @@ -16,17 +16,17 @@ // CHECK-LABEL: @test_svld1sh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sh_s32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -37,17 +37,17 @@ // CHECK-LABEL: @test_svld1sh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sh_s64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -58,17 +58,17 @@ // CHECK-LABEL: @test_svld1sh_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sh_u32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -79,17 +79,17 @@ // CHECK-LABEL: @test_svld1sh_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sh_u64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -100,21 +100,21 @@ // CHECK-LABEL: @test_svld1sh_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_s32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -125,21 +125,21 @@ // CHECK-LABEL: @test_svld1sh_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_s64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -150,21 +150,21 @@ // CHECK-LABEL: @test_svld1sh_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_u32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -175,21 +175,21 @@ // CHECK-LABEL: @test_svld1sh_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_u64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -200,15 +200,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -218,15 +218,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -236,15 +236,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -254,15 +254,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -272,15 +272,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -290,15 +290,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -308,15 +308,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -326,15 +326,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -344,15 +344,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -362,15 +362,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -380,15 +380,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -398,15 +398,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -416,15 +416,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -434,15 +434,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -452,15 +452,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -470,15 +470,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -488,15 +488,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -506,15 +506,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -524,15 +524,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -542,15 +542,15 @@ // CHECK-LABEL: @test_svld1sh_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -560,15 +560,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -578,15 +578,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -596,15 +596,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -614,15 +614,15 @@ // CHECK-LABEL: @test_svld1sh_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -632,17 +632,17 @@ // CHECK-LABEL: @test_svld1sh_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -652,17 +652,17 @@ // CHECK-LABEL: @test_svld1sh_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -672,17 +672,17 @@ // CHECK-LABEL: @test_svld1sh_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -692,17 +692,17 @@ // CHECK-LABEL: @test_svld1sh_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c @@ -16,17 +16,17 @@ // CHECK-LABEL: @test_svld1sw_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sw_s64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -37,17 +37,17 @@ // CHECK-LABEL: @test_svld1sw_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1sw_u64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -58,21 +58,21 @@ // CHECK-LABEL: @test_svld1sw_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sw_vnum_s64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -83,21 +83,21 @@ // CHECK-LABEL: @test_svld1sw_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1sw_vnum_u64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = sext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -108,15 +108,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -126,15 +126,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -144,15 +144,15 @@ // CHECK-LABEL: @test_svld1sw_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -162,15 +162,15 @@ // CHECK-LABEL: @test_svld1sw_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -180,15 +180,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -198,15 +198,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -216,15 +216,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -234,15 +234,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -252,15 +252,15 @@ // CHECK-LABEL: @test_svld1sw_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -270,15 +270,15 @@ // CHECK-LABEL: @test_svld1sw_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -288,15 +288,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -306,15 +306,15 @@ // CHECK-LABEL: @test_svld1sw_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -324,17 +324,17 @@ // CHECK-LABEL: @test_svld1sw_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -344,17 +344,17 @@ // CHECK-LABEL: @test_svld1sw_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c @@ -16,17 +16,17 @@ // CHECK-LABEL: @test_svld1ub_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1ub_s16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -37,17 +37,17 @@ // CHECK-LABEL: @test_svld1ub_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1ub_s32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -58,17 +58,17 @@ // CHECK-LABEL: @test_svld1ub_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1ub_s64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -79,17 +79,17 @@ // CHECK-LABEL: @test_svld1ub_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1ub_u16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -100,17 +100,17 @@ // CHECK-LABEL: @test_svld1ub_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1ub_u32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -121,17 +121,17 @@ // CHECK-LABEL: @test_svld1ub_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1ub_u64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -142,21 +142,21 @@ // CHECK-LABEL: @test_svld1ub_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -167,21 +167,21 @@ // CHECK-LABEL: @test_svld1ub_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -192,21 +192,21 @@ // CHECK-LABEL: @test_svld1ub_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -217,21 +217,21 @@ // CHECK-LABEL: @test_svld1ub_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv8i8.p0nxv8i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -242,21 +242,21 @@ // CHECK-LABEL: @test_svld1ub_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i8.p0nxv4i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -267,21 +267,21 @@ // CHECK-LABEL: @test_svld1ub_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i8.p0nxv2i8(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -292,15 +292,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -310,15 +310,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -328,15 +328,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -346,15 +346,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -364,15 +364,15 @@ // CHECK-LABEL: @test_svld1ub_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -382,15 +382,15 @@ // CHECK-LABEL: @test_svld1ub_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -400,15 +400,15 @@ // CHECK-LABEL: @test_svld1ub_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -418,15 +418,15 @@ // CHECK-LABEL: @test_svld1ub_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -436,15 +436,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -454,15 +454,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -472,15 +472,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -490,15 +490,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -508,15 +508,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -526,15 +526,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -544,15 +544,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -562,15 +562,15 @@ // CHECK-LABEL: @test_svld1ub_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c @@ -16,17 +16,17 @@ // CHECK-LABEL: @test_svld1uh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1uh_s32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -37,17 +37,17 @@ // CHECK-LABEL: @test_svld1uh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1uh_s64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -58,17 +58,17 @@ // CHECK-LABEL: @test_svld1uh_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1uh_u32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -79,17 +79,17 @@ // CHECK-LABEL: @test_svld1uh_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1uh_u64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -100,21 +100,21 @@ // CHECK-LABEL: @test_svld1uh_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_s32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -125,21 +125,21 @@ // CHECK-LABEL: @test_svld1uh_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_s64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -150,21 +150,21 @@ // CHECK-LABEL: @test_svld1uh_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_u32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv4i16.p0nxv4i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -175,21 +175,21 @@ // CHECK-LABEL: @test_svld1uh_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_u64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i16.p0nxv2i16(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -200,15 +200,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -218,15 +218,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -236,15 +236,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -254,15 +254,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -272,15 +272,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -290,15 +290,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -308,15 +308,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -326,15 +326,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -344,15 +344,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -362,15 +362,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -380,15 +380,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -398,15 +398,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -416,15 +416,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -434,15 +434,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -452,15 +452,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -470,15 +470,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -488,15 +488,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -506,15 +506,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -524,15 +524,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -542,15 +542,15 @@ // CHECK-LABEL: @test_svld1uh_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -560,15 +560,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -578,15 +578,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -596,15 +596,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -614,15 +614,15 @@ // CHECK-LABEL: @test_svld1uh_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -632,17 +632,17 @@ // CHECK-LABEL: @test_svld1uh_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -652,17 +652,17 @@ // CHECK-LABEL: @test_svld1uh_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -672,17 +672,17 @@ // CHECK-LABEL: @test_svld1uh_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -692,17 +692,17 @@ // CHECK-LABEL: @test_svld1uh_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c @@ -16,17 +16,17 @@ // CHECK-LABEL: @test_svld1uw_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1uw_s64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -37,17 +37,17 @@ // CHECK-LABEL: @test_svld1uw_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svld1uw_u64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -58,21 +58,21 @@ // CHECK-LABEL: @test_svld1uw_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1uw_vnum_s64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -83,21 +83,21 @@ // CHECK-LABEL: @test_svld1uw_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CHECK-NEXT: ret [[TMP5]] // // CPP-CHECK-LABEL: @_Z21test_svld1uw_vnum_u64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.masked.load.nxv2i32.p0nxv2i32(* [[TMP3]], i32 1, [[TMP0]], zeroinitializer) // CPP-CHECK-NEXT: [[TMP5:%.*]] = zext [[TMP4]] to // CPP-CHECK-NEXT: ret [[TMP5]] // @@ -108,15 +108,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -126,15 +126,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z31test_svld1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -144,15 +144,15 @@ // CHECK-LABEL: @test_svld1uw_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -162,15 +162,15 @@ // CHECK-LABEL: @test_svld1uw_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -180,15 +180,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -198,15 +198,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -216,15 +216,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -234,15 +234,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z38test_svld1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -252,15 +252,15 @@ // CHECK-LABEL: @test_svld1uw_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -270,15 +270,15 @@ // CHECK-LABEL: @test_svld1uw_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -288,15 +288,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -306,15 +306,15 @@ // CHECK-LABEL: @test_svld1uw_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -324,17 +324,17 @@ // CHECK-LABEL: @test_svld1uw_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -344,17 +344,17 @@ // CHECK-LABEL: @test_svld1uw_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z37test_svld1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svld2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svld2_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16x2_t test_svld2_bf16(svbool_t pg, const bfloat16_t *base) @@ -35,18 +35,18 @@ // CHECK-LABEL: @test_svld2_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svld2_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbfloat16x2_t test_svld2_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svld2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svld2_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x2_t test_svld2_s8(svbool_t pg, const int8_t *base) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svld2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16x2_t test_svld2_s16(svbool_t pg, const int16_t *base) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svld2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32x2_t test_svld2_s32(svbool_t pg, const int32_t *base) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svld2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64x2_t test_svld2_s64(svbool_t pg, const int64_t *base) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svld2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svld2_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x2_t test_svld2_u8(svbool_t pg, const uint8_t *base) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svld2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16x2_t test_svld2_u16(svbool_t pg, const uint16_t *base) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svld2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32x2_t test_svld2_u32(svbool_t pg, const uint32_t *base) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svld2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64x2_t test_svld2_u64(svbool_t pg, const uint64_t *base) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svld2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16x2_t test_svld2_f16(svbool_t pg, const float16_t *base) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svld2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32x2_t test_svld2_f32(svbool_t pg, const float32_t *base) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svld2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld2_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64x2_t test_svld2_f64(svbool_t pg, const float64_t *base) @@ -202,14 +202,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svld2_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8x2_t test_svld2_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) @@ -219,18 +219,18 @@ // CHECK-LABEL: @test_svld2_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16x2_t test_svld2_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) @@ -240,18 +240,18 @@ // CHECK-LABEL: @test_svld2_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32x2_t test_svld2_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) @@ -261,18 +261,18 @@ // CHECK-LABEL: @test_svld2_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64x2_t test_svld2_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) @@ -284,14 +284,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svld2_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8x2_t test_svld2_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) @@ -301,18 +301,18 @@ // CHECK-LABEL: @test_svld2_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16x2_t test_svld2_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) @@ -322,18 +322,18 @@ // CHECK-LABEL: @test_svld2_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32x2_t test_svld2_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) @@ -343,18 +343,18 @@ // CHECK-LABEL: @test_svld2_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64x2_t test_svld2_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) @@ -364,18 +364,18 @@ // CHECK-LABEL: @test_svld2_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16x2_t test_svld2_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) @@ -385,18 +385,18 @@ // CHECK-LABEL: @test_svld2_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32x2_t test_svld2_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) @@ -406,18 +406,18 @@ // CHECK-LABEL: @test_svld2_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64x2_t test_svld2_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svld3_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svld3_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16x3_t test_svld3_bf16(svbool_t pg, const bfloat16_t *base) @@ -34,18 +34,18 @@ // CHECK-LABEL: @test_svld3_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svld3_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbfloat16x3_t test_svld3_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svld3_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svld3_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x3_t test_svld3_s8(svbool_t pg, const int8_t *base) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svld3_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16x3_t test_svld3_s16(svbool_t pg, const int16_t *base) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svld3_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32x3_t test_svld3_s32(svbool_t pg, const int32_t *base) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svld3_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64x3_t test_svld3_s64(svbool_t pg, const int64_t *base) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svld3_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svld3_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x3_t test_svld3_u8(svbool_t pg, const uint8_t *base) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svld3_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16x3_t test_svld3_u16(svbool_t pg, const uint16_t *base) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svld3_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32x3_t test_svld3_u32(svbool_t pg, const uint32_t *base) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svld3_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64x3_t test_svld3_u64(svbool_t pg, const uint64_t *base) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svld3_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16x3_t test_svld3_f16(svbool_t pg, const float16_t *base) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svld3_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32x3_t test_svld3_f32(svbool_t pg, const float32_t *base) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svld3_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld3_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64x3_t test_svld3_f64(svbool_t pg, const float64_t *base) @@ -202,14 +202,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svld3_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8x3_t test_svld3_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) @@ -219,18 +219,18 @@ // CHECK-LABEL: @test_svld3_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16x3_t test_svld3_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) @@ -240,18 +240,18 @@ // CHECK-LABEL: @test_svld3_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32x3_t test_svld3_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) @@ -261,18 +261,18 @@ // CHECK-LABEL: @test_svld3_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64x3_t test_svld3_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) @@ -284,14 +284,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svld3_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8x3_t test_svld3_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) @@ -301,18 +301,18 @@ // CHECK-LABEL: @test_svld3_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16x3_t test_svld3_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) @@ -322,18 +322,18 @@ // CHECK-LABEL: @test_svld3_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32x3_t test_svld3_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) @@ -343,18 +343,18 @@ // CHECK-LABEL: @test_svld3_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64x3_t test_svld3_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) @@ -364,18 +364,18 @@ // CHECK-LABEL: @test_svld3_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16x3_t test_svld3_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) @@ -385,18 +385,18 @@ // CHECK-LABEL: @test_svld3_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32x3_t test_svld3_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) @@ -406,18 +406,18 @@ // CHECK-LABEL: @test_svld3_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64x3_t test_svld3_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svld4_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svld4_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16x4_t test_svld4_bf16(svbool_t pg, const bfloat16_t *base) @@ -34,18 +34,18 @@ // CHECK-LABEL: @test_svld4_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svld4_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbfloat16x4_t test_svld4_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svld4_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svld4_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x4_t test_svld4_s8(svbool_t pg, const int8_t *base) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svld4_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16x4_t test_svld4_s16(svbool_t pg, const int16_t *base) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svld4_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32x4_t test_svld4_s32(svbool_t pg, const int32_t *base) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svld4_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64x4_t test_svld4_s64(svbool_t pg, const int64_t *base) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svld4_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svld4_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x4_t test_svld4_u8(svbool_t pg, const uint8_t *base) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svld4_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16x4_t test_svld4_u16(svbool_t pg, const uint16_t *base) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svld4_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32x4_t test_svld4_u32(svbool_t pg, const uint32_t *base) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svld4_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64x4_t test_svld4_u64(svbool_t pg, const uint64_t *base) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svld4_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16x4_t test_svld4_f16(svbool_t pg, const float16_t *base) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svld4_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32x4_t test_svld4_f32(svbool_t pg, const float32_t *base) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svld4_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svld4_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64x4_t test_svld4_f64(svbool_t pg, const float64_t *base) @@ -202,14 +202,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svld4_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8x4_t test_svld4_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) @@ -219,18 +219,18 @@ // CHECK-LABEL: @test_svld4_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16x4_t test_svld4_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) @@ -240,18 +240,18 @@ // CHECK-LABEL: @test_svld4_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32x4_t test_svld4_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) @@ -261,18 +261,18 @@ // CHECK-LABEL: @test_svld4_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64x4_t test_svld4_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) @@ -284,14 +284,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svld4_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8x4_t test_svld4_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) @@ -301,18 +301,18 @@ // CHECK-LABEL: @test_svld4_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16x4_t test_svld4_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) @@ -322,18 +322,18 @@ // CHECK-LABEL: @test_svld4_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32x4_t test_svld4_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) @@ -343,18 +343,18 @@ // CHECK-LABEL: @test_svld4_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64x4_t test_svld4_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) @@ -364,18 +364,18 @@ // CHECK-LABEL: @test_svld4_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16x4_t test_svld4_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) @@ -385,18 +385,18 @@ // CHECK-LABEL: @test_svld4_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32x4_t test_svld4_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) @@ -406,18 +406,18 @@ // CHECK-LABEL: @test_svld4_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64x4_t test_svld4_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svldff1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svldff1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svldff1_bf16(svbool_t pg, const bfloat16_t *base) @@ -34,18 +34,18 @@ // CHECK-LABEL: @test_svldff1_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z22test_svldff1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbfloat16_t test_svldff1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svldff1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svldff1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svldff1_s8(svbool_t pg, const int8_t *base) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svldff1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svldff1_s16(svbool_t pg, const int16_t *base) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svldff1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldff1_s32(svbool_t pg, const int32_t *base) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svldff1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldff1_s64(svbool_t pg, const int64_t *base) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svldff1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svldff1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svldff1_u8(svbool_t pg, const uint8_t *base) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svldff1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svldff1_u16(svbool_t pg, const uint16_t *base) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svldff1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldff1_u32(svbool_t pg, const uint32_t *base) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svldff1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldff1_u64(svbool_t pg, const uint64_t *base) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svldff1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svldff1_f16(svbool_t pg, const float16_t *base) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svldff1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldff1_f32(svbool_t pg, const float32_t *base) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svldff1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldff1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldff1_f64(svbool_t pg, const float64_t *base) @@ -201,14 +201,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svldff1_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svldff1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) @@ -218,18 +218,18 @@ // CHECK-LABEL: @test_svldff1_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svldff1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) @@ -239,18 +239,18 @@ // CHECK-LABEL: @test_svldff1_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svldff1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) @@ -260,18 +260,18 @@ // CHECK-LABEL: @test_svldff1_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svldff1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) @@ -283,14 +283,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svldff1_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svldff1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) @@ -300,18 +300,18 @@ // CHECK-LABEL: @test_svldff1_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svldff1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) @@ -321,18 +321,18 @@ // CHECK-LABEL: @test_svldff1_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svldff1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) @@ -342,18 +342,18 @@ // CHECK-LABEL: @test_svldff1_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svldff1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) @@ -363,18 +363,18 @@ // CHECK-LABEL: @test_svldff1_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svldff1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) @@ -384,18 +384,18 @@ // CHECK-LABEL: @test_svldff1_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svldff1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) @@ -405,18 +405,18 @@ // CHECK-LABEL: @test_svldff1_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svldff1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) @@ -426,14 +426,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldff1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { @@ -442,14 +442,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldff1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { @@ -458,14 +458,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldff1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { @@ -474,14 +474,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldff1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { @@ -490,14 +490,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldff1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { @@ -506,14 +506,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldff1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { @@ -522,14 +522,14 @@ // CHECK-LABEL: @test_svldff1_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldff1_gather_s32offset_s32(svbool_t pg, const int32_t *base, svint32_t offsets) { @@ -538,14 +538,14 @@ // CHECK-LABEL: @test_svldff1_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldff1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) { @@ -554,14 +554,14 @@ // CHECK-LABEL: @test_svldff1_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldff1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, svint32_t offsets) { @@ -570,14 +570,14 @@ // CHECK-LABEL: @test_svldff1_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldff1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) { @@ -586,14 +586,14 @@ // CHECK-LABEL: @test_svldff1_gather_s32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldff1_gather_s32offset_f32(svbool_t pg, const float32_t *base, svint32_t offsets) { @@ -602,14 +602,14 @@ // CHECK-LABEL: @test_svldff1_gather_s64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldff1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) { @@ -618,14 +618,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldff1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) { @@ -634,14 +634,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldff1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) { @@ -650,14 +650,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldff1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) { @@ -666,14 +666,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldff1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) { @@ -682,14 +682,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldff1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) { @@ -698,14 +698,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldff1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) { @@ -714,14 +714,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldff1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -730,14 +730,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldff1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -746,14 +746,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldff1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -762,14 +762,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldff1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -778,14 +778,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldff1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -794,14 +794,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldff1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -810,14 +810,14 @@ // CHECK-LABEL: @test_svldff1_gather_s32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldff1_gather_s32index_s32(svbool_t pg, const int32_t *base, svint32_t indices) { @@ -826,14 +826,14 @@ // CHECK-LABEL: @test_svldff1_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldff1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) { @@ -842,14 +842,14 @@ // CHECK-LABEL: @test_svldff1_gather_s32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldff1_gather_s32index_u32(svbool_t pg, const uint32_t *base, svint32_t indices) { @@ -858,14 +858,14 @@ // CHECK-LABEL: @test_svldff1_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldff1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) { @@ -874,14 +874,14 @@ // CHECK-LABEL: @test_svldff1_gather_s32index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldff1_gather_s32index_f32(svbool_t pg, const float32_t *base, svint32_t indices) { @@ -890,14 +890,14 @@ // CHECK-LABEL: @test_svldff1_gather_s64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldff1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) { @@ -906,14 +906,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldff1_gather_u32index_s32(svbool_t pg, const int32_t *base, svuint32_t indices) { @@ -922,14 +922,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldff1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) { @@ -938,14 +938,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldff1_gather_u32index_u32(svbool_t pg, const uint32_t *base, svuint32_t indices) { @@ -954,14 +954,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldff1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) { @@ -970,14 +970,14 @@ // CHECK-LABEL: @test_svldff1_gather_u32index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldff1_gather_u32index_f32(svbool_t pg, const float32_t *base, svuint32_t indices) { @@ -986,14 +986,14 @@ // CHECK-LABEL: @test_svldff1_gather_u64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldff1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) { @@ -1002,16 +1002,16 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svldff1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -1020,16 +1020,16 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svldff1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { @@ -1038,16 +1038,16 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svldff1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -1056,16 +1056,16 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svldff1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { @@ -1074,16 +1074,16 @@ // CHECK-LABEL: @test_svldff1_gather_u32base_index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svldff1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -1092,16 +1092,16 @@ // CHECK-LABEL: @test_svldff1_gather_u64base_index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svldff1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c @@ -16,15 +16,15 @@ // CHECK-LABEL: @test_svldff1sb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sb_s16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldff1sb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sb_s32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -54,15 +54,15 @@ // CHECK-LABEL: @test_svldff1sb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sb_s64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -73,15 +73,15 @@ // CHECK-LABEL: @test_svldff1sb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sb_u16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -92,15 +92,15 @@ // CHECK-LABEL: @test_svldff1sb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sb_u32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -111,15 +111,15 @@ // CHECK-LABEL: @test_svldff1sb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sb_u64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -130,19 +130,19 @@ // CHECK-LABEL: @test_svldff1sb_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -153,19 +153,19 @@ // CHECK-LABEL: @test_svldff1sb_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -176,19 +176,19 @@ // CHECK-LABEL: @test_svldff1sb_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -199,19 +199,19 @@ // CHECK-LABEL: @test_svldff1sb_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -222,19 +222,19 @@ // CHECK-LABEL: @test_svldff1sb_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -245,19 +245,19 @@ // CHECK-LABEL: @test_svldff1sb_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -268,15 +268,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -286,15 +286,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -304,15 +304,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -322,15 +322,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -340,15 +340,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -358,15 +358,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -376,15 +376,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -394,15 +394,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -412,15 +412,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -430,15 +430,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -448,15 +448,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -466,15 +466,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -484,15 +484,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -502,15 +502,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -520,15 +520,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -538,15 +538,15 @@ // CHECK-LABEL: @test_svldff1sb_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c @@ -16,15 +16,15 @@ // CHECK-LABEL: @test_svldff1sh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sh_s32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldff1sh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sh_s64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -54,15 +54,15 @@ // CHECK-LABEL: @test_svldff1sh_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sh_u32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -73,15 +73,15 @@ // CHECK-LABEL: @test_svldff1sh_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sh_u64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -92,19 +92,19 @@ // CHECK-LABEL: @test_svldff1sh_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_s32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -115,19 +115,19 @@ // CHECK-LABEL: @test_svldff1sh_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_s64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -138,19 +138,19 @@ // CHECK-LABEL: @test_svldff1sh_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_u32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -161,19 +161,19 @@ // CHECK-LABEL: @test_svldff1sh_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_u64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -184,15 +184,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -202,15 +202,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -220,15 +220,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -238,15 +238,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -256,15 +256,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -274,15 +274,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -292,15 +292,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -310,15 +310,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -328,15 +328,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -346,15 +346,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -364,15 +364,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -382,15 +382,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -400,15 +400,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -418,15 +418,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -436,15 +436,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -454,15 +454,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -472,15 +472,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -490,15 +490,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -508,15 +508,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -526,15 +526,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -544,15 +544,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -562,15 +562,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -580,15 +580,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -598,15 +598,15 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -616,17 +616,17 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -636,17 +636,17 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -656,17 +656,17 @@ // CHECK-LABEL: @test_svldff1sh_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -676,17 +676,17 @@ // CHECK-LABEL: @test_svldff1sh_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c @@ -16,15 +16,15 @@ // CHECK-LABEL: @test_svldff1sw_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sw_s64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldff1sw_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1sw_u64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -54,19 +54,19 @@ // CHECK-LABEL: @test_svldff1sw_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sw_vnum_s64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -77,19 +77,19 @@ // CHECK-LABEL: @test_svldff1sw_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1sw_vnum_u64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -100,15 +100,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -118,15 +118,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -136,15 +136,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -154,15 +154,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -172,15 +172,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -190,15 +190,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -208,15 +208,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -226,15 +226,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -244,15 +244,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -262,15 +262,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -280,15 +280,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -298,15 +298,15 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -316,17 +316,17 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -336,17 +336,17 @@ // CHECK-LABEL: @test_svldff1sw_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c @@ -16,15 +16,15 @@ // CHECK-LABEL: @test_svldff1ub_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1ub_s16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldff1ub_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1ub_s32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -54,15 +54,15 @@ // CHECK-LABEL: @test_svldff1ub_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1ub_s64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -73,15 +73,15 @@ // CHECK-LABEL: @test_svldff1ub_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1ub_u16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -92,15 +92,15 @@ // CHECK-LABEL: @test_svldff1ub_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1ub_u32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -111,15 +111,15 @@ // CHECK-LABEL: @test_svldff1ub_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1ub_u64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -130,19 +130,19 @@ // CHECK-LABEL: @test_svldff1ub_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -153,19 +153,19 @@ // CHECK-LABEL: @test_svldff1ub_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -176,19 +176,19 @@ // CHECK-LABEL: @test_svldff1ub_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -199,19 +199,19 @@ // CHECK-LABEL: @test_svldff1ub_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -222,19 +222,19 @@ // CHECK-LABEL: @test_svldff1ub_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -245,19 +245,19 @@ // CHECK-LABEL: @test_svldff1ub_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -268,15 +268,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -286,15 +286,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -304,15 +304,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -322,15 +322,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -340,15 +340,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -358,15 +358,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -376,15 +376,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -394,15 +394,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -412,15 +412,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -430,15 +430,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -448,15 +448,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -466,15 +466,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -484,15 +484,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -502,15 +502,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -520,15 +520,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -538,15 +538,15 @@ // CHECK-LABEL: @test_svldff1ub_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c @@ -16,15 +16,15 @@ // CHECK-LABEL: @test_svldff1uh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1uh_s32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldff1uh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1uh_s64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -54,15 +54,15 @@ // CHECK-LABEL: @test_svldff1uh_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1uh_u32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -73,15 +73,15 @@ // CHECK-LABEL: @test_svldff1uh_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1uh_u64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -92,19 +92,19 @@ // CHECK-LABEL: @test_svldff1uh_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_s32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -115,19 +115,19 @@ // CHECK-LABEL: @test_svldff1uh_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_s64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -138,19 +138,19 @@ // CHECK-LABEL: @test_svldff1uh_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_u32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -161,19 +161,19 @@ // CHECK-LABEL: @test_svldff1uh_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_u64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -184,15 +184,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -202,15 +202,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -220,15 +220,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -238,15 +238,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -256,15 +256,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -274,15 +274,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -292,15 +292,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -310,15 +310,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -328,15 +328,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -346,15 +346,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -364,15 +364,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -382,15 +382,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -400,15 +400,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -418,15 +418,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -436,15 +436,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -454,15 +454,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -472,15 +472,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -490,15 +490,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -508,15 +508,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -526,15 +526,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -544,15 +544,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -562,15 +562,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -580,15 +580,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -598,15 +598,15 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -616,17 +616,17 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -636,17 +636,17 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -656,17 +656,17 @@ // CHECK-LABEL: @test_svldff1uh_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -676,17 +676,17 @@ // CHECK-LABEL: @test_svldff1uh_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c @@ -16,15 +16,15 @@ // CHECK-LABEL: @test_svldff1uw_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1uw_s64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldff1uw_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldff1uw_u64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -54,19 +54,19 @@ // CHECK-LABEL: @test_svldff1uw_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1uw_vnum_s64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -77,19 +77,19 @@ // CHECK-LABEL: @test_svldff1uw_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldff1uw_vnum_u64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -100,15 +100,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -118,15 +118,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldff1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -136,15 +136,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -154,15 +154,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -172,15 +172,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -190,15 +190,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -208,15 +208,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -226,15 +226,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldff1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -244,15 +244,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -262,15 +262,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -280,15 +280,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -298,15 +298,15 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -316,17 +316,17 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -336,17 +336,17 @@ // CHECK-LABEL: @test_svldff1uw_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldff1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svldnf1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svldnf1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svldnf1_bf16(svbool_t pg, const bfloat16_t *base) @@ -33,18 +33,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z22test_svldnf1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbfloat16_t test_svldnf1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svldnf1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svldnf1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svldnf1_s8(svbool_t pg, const int8_t *base) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svldnf1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svldnf1_s16(svbool_t pg, const int16_t *base) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svldnf1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldnf1_s32(svbool_t pg, const int32_t *base) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svldnf1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnf1_s64(svbool_t pg, const int64_t *base) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svldnf1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svldnf1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svldnf1_u8(svbool_t pg, const uint8_t *base) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svldnf1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svldnf1_u16(svbool_t pg, const uint16_t *base) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svldnf1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldnf1_u32(svbool_t pg, const uint32_t *base) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svldnf1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnf1_u64(svbool_t pg, const uint64_t *base) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svldnf1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svldnf1_f16(svbool_t pg, const float16_t *base) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svldnf1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldnf1_f32(svbool_t pg, const float32_t *base) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svldnf1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnf1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnf1_f64(svbool_t pg, const float64_t *base) @@ -201,14 +201,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svldnf1_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svldnf1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) @@ -218,18 +218,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svldnf1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) @@ -239,18 +239,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svldnf1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) @@ -260,18 +260,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svldnf1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) @@ -283,14 +283,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svldnf1_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svldnf1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) @@ -300,18 +300,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svldnf1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) @@ -321,18 +321,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svldnf1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) @@ -342,18 +342,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svldnf1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) @@ -363,18 +363,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svldnf1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) @@ -384,18 +384,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svldnf1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) @@ -405,18 +405,18 @@ // CHECK-LABEL: @test_svldnf1_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svldnf1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c @@ -7,15 +7,15 @@ // CHECK-LABEL: @test_svldnf1sb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -26,15 +26,15 @@ // CHECK-LABEL: @test_svldnf1sb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -45,15 +45,15 @@ // CHECK-LABEL: @test_svldnf1sb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -64,15 +64,15 @@ // CHECK-LABEL: @test_svldnf1sb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -83,15 +83,15 @@ // CHECK-LABEL: @test_svldnf1sb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -102,15 +102,15 @@ // CHECK-LABEL: @test_svldnf1sb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -121,19 +121,19 @@ // CHECK-LABEL: @test_svldnf1sb_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -144,19 +144,19 @@ // CHECK-LABEL: @test_svldnf1sb_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -167,19 +167,19 @@ // CHECK-LABEL: @test_svldnf1sb_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -190,19 +190,19 @@ // CHECK-LABEL: @test_svldnf1sb_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -213,19 +213,19 @@ // CHECK-LABEL: @test_svldnf1sb_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -236,19 +236,19 @@ // CHECK-LABEL: @test_svldnf1sb_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c @@ -7,15 +7,15 @@ // CHECK-LABEL: @test_svldnf1sh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sh_s32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -26,15 +26,15 @@ // CHECK-LABEL: @test_svldnf1sh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sh_s64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -45,15 +45,15 @@ // CHECK-LABEL: @test_svldnf1sh_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sh_u32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -64,15 +64,15 @@ // CHECK-LABEL: @test_svldnf1sh_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sh_u64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -83,19 +83,19 @@ // CHECK-LABEL: @test_svldnf1sh_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_s32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -106,19 +106,19 @@ // CHECK-LABEL: @test_svldnf1sh_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_s64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -129,19 +129,19 @@ // CHECK-LABEL: @test_svldnf1sh_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_u32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -152,19 +152,19 @@ // CHECK-LABEL: @test_svldnf1sh_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_u64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c @@ -7,15 +7,15 @@ // CHECK-LABEL: @test_svldnf1sw_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sw_s64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -26,15 +26,15 @@ // CHECK-LABEL: @test_svldnf1sw_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1sw_u64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -45,19 +45,19 @@ // CHECK-LABEL: @test_svldnf1sw_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sw_vnum_s64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -68,19 +68,19 @@ // CHECK-LABEL: @test_svldnf1sw_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1sw_vnum_u64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c @@ -7,15 +7,15 @@ // CHECK-LABEL: @test_svldnf1ub_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -26,15 +26,15 @@ // CHECK-LABEL: @test_svldnf1ub_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -45,15 +45,15 @@ // CHECK-LABEL: @test_svldnf1ub_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -64,15 +64,15 @@ // CHECK-LABEL: @test_svldnf1ub_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -83,15 +83,15 @@ // CHECK-LABEL: @test_svldnf1ub_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -102,15 +102,15 @@ // CHECK-LABEL: @test_svldnf1ub_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -121,19 +121,19 @@ // CHECK-LABEL: @test_svldnf1ub_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -144,19 +144,19 @@ // CHECK-LABEL: @test_svldnf1ub_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -167,19 +167,19 @@ // CHECK-LABEL: @test_svldnf1ub_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -190,19 +190,19 @@ // CHECK-LABEL: @test_svldnf1ub_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -213,19 +213,19 @@ // CHECK-LABEL: @test_svldnf1ub_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -236,19 +236,19 @@ // CHECK-LABEL: @test_svldnf1ub_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c @@ -7,15 +7,15 @@ // CHECK-LABEL: @test_svldnf1uh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1uh_s32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -26,15 +26,15 @@ // CHECK-LABEL: @test_svldnf1uh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1uh_s64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -45,15 +45,15 @@ // CHECK-LABEL: @test_svldnf1uh_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1uh_u32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -64,15 +64,15 @@ // CHECK-LABEL: @test_svldnf1uh_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1uh_u64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -83,19 +83,19 @@ // CHECK-LABEL: @test_svldnf1uh_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_s32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -106,19 +106,19 @@ // CHECK-LABEL: @test_svldnf1uh_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_s64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -129,19 +129,19 @@ // CHECK-LABEL: @test_svldnf1uh_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_u32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -152,19 +152,19 @@ // CHECK-LABEL: @test_svldnf1uh_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_u64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c @@ -7,15 +7,15 @@ // CHECK-LABEL: @test_svldnf1uw_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1uw_s64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -26,15 +26,15 @@ // CHECK-LABEL: @test_svldnf1uw_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svldnf1uw_u64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -45,19 +45,19 @@ // CHECK-LABEL: @test_svldnf1uw_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1uw_vnum_s64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // @@ -68,19 +68,19 @@ // CHECK-LABEL: @test_svldnf1uw_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CHECK-NEXT: ret [[TMP4]] // // CPP-CHECK-LABEL: @_Z23test_svldnf1uw_vnum_u64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to // CPP-CHECK-NEXT: ret [[TMP4]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svldnt1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svldnt1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svldnt1_bf16(svbool_t pg, const bfloat16_t *base) @@ -34,18 +34,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z22test_svldnt1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbfloat16_t test_svldnt1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svldnt1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svldnt1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svldnt1_s8(svbool_t pg, const int8_t *base) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svldnt1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svldnt1_s16(svbool_t pg, const int16_t *base) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svldnt1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldnt1_s32(svbool_t pg, const int32_t *base) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svldnt1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnt1_s64(svbool_t pg, const int64_t *base) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svldnt1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svldnt1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svldnt1_u8(svbool_t pg, const uint8_t *base) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svldnt1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svldnt1_u16(svbool_t pg, const uint16_t *base) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svldnt1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldnt1_u32(svbool_t pg, const uint32_t *base) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svldnt1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnt1_u64(svbool_t pg, const uint64_t *base) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svldnt1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svldnt1_f16(svbool_t pg, const float16_t *base) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svldnt1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldnt1_f32(svbool_t pg, const float32_t *base) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svldnt1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svldnt1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnt1_f64(svbool_t pg, const float64_t *base) @@ -202,14 +202,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svldnt1_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svldnt1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) @@ -219,18 +219,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svldnt1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) @@ -240,18 +240,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svldnt1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) @@ -261,18 +261,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svldnt1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) @@ -284,14 +284,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svldnt1_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svldnt1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) @@ -301,18 +301,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svldnt1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) @@ -322,18 +322,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svldnt1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) @@ -343,18 +343,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svldnt1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) @@ -364,18 +364,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svldnt1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) @@ -385,18 +385,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svldnt1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) @@ -406,18 +406,18 @@ // CHECK-LABEL: @test_svldnt1_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svldnt1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c @@ -16,13 +16,13 @@ // CHECK-LABEL: @test_svlen_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svlen_bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c @@ -16,13 +16,13 @@ // CHECK-LABEL: @test_svlen_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z13test_svlen_s8u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -33,13 +33,13 @@ // CHECK-LABEL: @test_svlen_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -50,13 +50,13 @@ // CHECK-LABEL: @test_svlen_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -67,13 +67,13 @@ // CHECK-LABEL: @test_svlen_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -84,13 +84,13 @@ // CHECK-LABEL: @test_svlen_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z13test_svlen_u8u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 4 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -101,13 +101,13 @@ // CHECK-LABEL: @test_svlen_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -118,13 +118,13 @@ // CHECK-LABEL: @test_svlen_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -135,13 +135,13 @@ // CHECK-LABEL: @test_svlen_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -152,13 +152,13 @@ // CHECK-LABEL: @test_svlen_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_f16u13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -169,13 +169,13 @@ // CHECK-LABEL: @test_svlen_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_f32u13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 2 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // @@ -186,13 +186,13 @@ // CHECK-LABEL: @test_svlen_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svlen_f64u13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64() +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 // CPP-CHECK-NEXT: ret i64 [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svlsl_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svlsl_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svlsl_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svlsl_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svlsl_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svlsl_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svlsl_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svlsl_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svlsl_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svlsl_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svlsl_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svlsl_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svlsl_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svlsl_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svlsl_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svlsl_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svlsl_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svlsl_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svlsl_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlsl_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svlsl_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlsl_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svlsl_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svlsl_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svlsl_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsl_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svlsl_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsl_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svlsl_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsl_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svlsl_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svlsl_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svlsl_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svlsl_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svlsl_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlsl_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svlsl_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlsl_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svlsl_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svlsl_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svlsl_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsl_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsl_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svlsl_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsl_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svlsl_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsl_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svlsl_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsl_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svlsl_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -429,13 +429,13 @@ // CHECK-LABEL: @test_svlsl_wide_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svlsl_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) @@ -445,16 +445,16 @@ // CHECK-LABEL: @test_svlsl_wide_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svlsl_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) @@ -464,16 +464,16 @@ // CHECK-LABEL: @test_svlsl_wide_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svlsl_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) @@ -484,13 +484,13 @@ // CHECK-LABEL: @test_svlsl_wide_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svlsl_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -500,16 +500,16 @@ // CHECK-LABEL: @test_svlsl_wide_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svlsl_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -519,16 +519,16 @@ // CHECK-LABEL: @test_svlsl_wide_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svlsl_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -538,12 +538,12 @@ // CHECK-LABEL: @test_svlsl_wide_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svlsl_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) @@ -553,14 +553,14 @@ // CHECK-LABEL: @test_svlsl_wide_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlsl_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) @@ -570,14 +570,14 @@ // CHECK-LABEL: @test_svlsl_wide_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlsl_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) @@ -587,12 +587,12 @@ // CHECK-LABEL: @test_svlsl_wide_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsl_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -602,14 +602,14 @@ // CHECK-LABEL: @test_svlsl_wide_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsl_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -619,14 +619,14 @@ // CHECK-LABEL: @test_svlsl_wide_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsl_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -636,12 +636,12 @@ // CHECK-LABEL: @test_svlsl_wide_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svlsl_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) @@ -651,14 +651,14 @@ // CHECK-LABEL: @test_svlsl_wide_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlsl_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) @@ -668,14 +668,14 @@ // CHECK-LABEL: @test_svlsl_wide_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlsl_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) @@ -685,12 +685,12 @@ // CHECK-LABEL: @test_svlsl_wide_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsl_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -700,14 +700,14 @@ // CHECK-LABEL: @test_svlsl_wide_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsl_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -717,14 +717,14 @@ // CHECK-LABEL: @test_svlsl_wide_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsl_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -736,14 +736,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svlsl_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) @@ -753,18 +753,18 @@ // CHECK-LABEL: @test_svlsl_wide_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svlsl_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) @@ -774,18 +774,18 @@ // CHECK-LABEL: @test_svlsl_wide_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svlsl_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) @@ -798,7 +798,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( @@ -806,7 +806,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svlsl_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) @@ -816,20 +816,20 @@ // CHECK-LABEL: @test_svlsl_wide_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svlsl_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) @@ -839,20 +839,20 @@ // CHECK-LABEL: @test_svlsl_wide_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svlsl_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) @@ -864,14 +864,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svlsl_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) @@ -881,18 +881,18 @@ // CHECK-LABEL: @test_svlsl_wide_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svlsl_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) @@ -902,18 +902,18 @@ // CHECK-LABEL: @test_svlsl_wide_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svlsl_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svlsr_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svlsr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svlsr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svlsr_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svlsr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svlsr_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svlsr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svlsr_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svlsr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -90,12 +90,12 @@ // CHECK-LABEL: @test_svlsr_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -105,14 +105,14 @@ // CHECK-LABEL: @test_svlsr_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -122,14 +122,14 @@ // CHECK-LABEL: @test_svlsr_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -139,14 +139,14 @@ // CHECK-LABEL: @test_svlsr_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svlsr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -156,12 +156,12 @@ // CHECK-LABEL: @test_svlsr_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svlsr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -171,14 +171,14 @@ // CHECK-LABEL: @test_svlsr_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -188,14 +188,14 @@ // CHECK-LABEL: @test_svlsr_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -205,14 +205,14 @@ // CHECK-LABEL: @test_svlsr_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svlsr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svlsr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -223,13 +223,13 @@ // CHECK-LABEL: @test_svlsr_wide_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svlsr_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -239,16 +239,16 @@ // CHECK-LABEL: @test_svlsr_wide_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svlsr_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -258,16 +258,16 @@ // CHECK-LABEL: @test_svlsr_wide_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svlsr_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -277,12 +277,12 @@ // CHECK-LABEL: @test_svlsr_wide_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsr_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -292,14 +292,14 @@ // CHECK-LABEL: @test_svlsr_wide_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsr_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -309,14 +309,14 @@ // CHECK-LABEL: @test_svlsr_wide_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsr_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -326,12 +326,12 @@ // CHECK-LABEL: @test_svlsr_wide_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svlsr_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) @@ -341,14 +341,14 @@ // CHECK-LABEL: @test_svlsr_wide_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svlsr_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) @@ -358,14 +358,14 @@ // CHECK-LABEL: @test_svlsr_wide_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svlsr_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) @@ -377,14 +377,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_mu10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svlsr_wide_n_u8_m(svbool_t pg, svuint8_t op1, uint64_t op2) @@ -394,18 +394,18 @@ // CHECK-LABEL: @test_svlsr_wide_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_mu10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svlsr_wide_n_u16_m(svbool_t pg, svuint16_t op1, uint64_t op2) @@ -415,18 +415,18 @@ // CHECK-LABEL: @test_svlsr_wide_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_mu10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svlsr_wide_n_u32_m(svbool_t pg, svuint32_t op1, uint64_t op2) @@ -439,7 +439,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_zu10__SVBool_tu11__SVUint8_tm( @@ -447,7 +447,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svlsr_wide_n_u8_z(svbool_t pg, svuint8_t op1, uint64_t op2) @@ -457,20 +457,20 @@ // CHECK-LABEL: @test_svlsr_wide_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_zu10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svlsr_wide_n_u16_z(svbool_t pg, svuint16_t op1, uint64_t op2) @@ -480,20 +480,20 @@ // CHECK-LABEL: @test_svlsr_wide_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_zu10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svlsr_wide_n_u32_z(svbool_t pg, svuint32_t op1, uint64_t op2) @@ -505,14 +505,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_xu10__SVBool_tu11__SVUint8_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svlsr_wide_n_u8_x(svbool_t pg, svuint8_t op1, uint64_t op2) @@ -522,18 +522,18 @@ // CHECK-LABEL: @test_svlsr_wide_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_xu10__SVBool_tu12__SVUint16_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svlsr_wide_n_u16_x(svbool_t pg, svuint16_t op1, uint64_t op2) @@ -543,18 +543,18 @@ // CHECK-LABEL: @test_svlsr_wide_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_xu10__SVBool_tu12__SVUint32_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svlsr_wide_n_u32_x(svbool_t pg, svuint32_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmad_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmad_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmad_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmad_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmad_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmad_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmad_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmad_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmad_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmad_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmad_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmad_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmad_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmad_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmad_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmad_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmad_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmad_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmad_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmad_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmad_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmad_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmad_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmad_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmad_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmad_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmad_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmad_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmad_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmad_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmad_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmad_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmad_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmad_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmad_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmad_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmad_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmad_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmad_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmad_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmad_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmad_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmad_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmad_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmad_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmad_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmad_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmad_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmad_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmad_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmad_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmad_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmad_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmad_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmad_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmad_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmad_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmad_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmad_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmad_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmad_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmad_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmad_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmad_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmad_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmad_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmad_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmad_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmad_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmad_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmad_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmad_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmad_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmad_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmad_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmad_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmad_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmad_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmad_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmad_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmad_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmad_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmad_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmad_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmad_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmad_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmad_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmad_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmad_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmad_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmad_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmad_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmad_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmad_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmad_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmad_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svmad_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svmad_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svmad_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svmad_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svmad_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svmad_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svmad_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svmad_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svmad_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svmad_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svmad_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svmad_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svmad_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svmad_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svmad_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svmad_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svmad_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svmad_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmmla_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmmla.nxv4f32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv4f32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmmla_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmmla.nxv4f32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv4f32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmmla_f32(svfloat32_t x, svfloat32_t y, svfloat32_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmmla_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmmla.nxv2f64( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv2f64( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmmla_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmmla.nxv2f64( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv2f64( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svmmla_f64(svfloat64_t x, svfloat64_t y, svfloat64_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmax_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmax_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmax_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmax_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmax_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmax_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmax_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmax_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmax_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmax_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmax_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmax_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmax_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmax_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmax_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmax_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmax_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmax_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmax_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmax_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmax_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmax_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmax_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmax_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmax_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmax_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmax_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmax_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmax_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmax_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmax_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmax_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmax_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmax_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmax_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmax_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmax_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmax_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmax_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmax_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmax_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmax_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmax_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmax_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmax_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmax_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmax_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmax_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmax_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmax_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmax_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmax_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmax_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmax_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmax_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmax_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmax_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmax_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmax_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmax_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmax_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmax_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmax_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmax_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmax_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmax_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmax_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmax_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmax_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmax_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmax_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmax_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmax_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmax_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmax_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmax_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmax_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmax_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmax_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmax_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmax_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmax_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmax_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmax_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmax_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmax_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmax_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmax_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmax_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmax_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmax_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmax_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmax_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmax_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmax_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmax_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svmax_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmax_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svmax_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmax_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svmax_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmax_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svmax_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmax_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svmax_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmax_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svmax_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmax_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svmax_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmax_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svmax_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmax_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svmax_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmax_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svmax_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmax_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svmax_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmax_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svmax_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmax_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svmax_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmax_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svmax_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmax_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svmax_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmax_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svmax_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmax_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svmax_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmax_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svmax_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmax_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svmaxnm_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmaxnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svmaxnm_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmaxnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svmaxnm_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmaxnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svmaxnm_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svmaxnm_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svmaxnm_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svmaxnm_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svmaxnm_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svmaxnm_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svmaxnm_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmaxnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svmaxnm_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmaxnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svmaxnm_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmaxnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svmaxnm_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmaxnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svmaxnm_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmaxnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svmaxnm_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmaxnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svmaxnm_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svmaxnm_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svmaxnm_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svmaxnmv_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fmaxnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxnmv_f16u10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fmaxnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svmaxnmv_f16(svbool_t pg, svfloat16_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svmaxnmv_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fmaxnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxnmv_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fmaxnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svmaxnmv_f32(svbool_t pg, svfloat32_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svmaxnmv_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fmaxnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxnmv_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fmaxnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svmaxnmv_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmaxv_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.smaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.smaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svmaxv_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.smaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.smaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svmaxv_s8(svbool_t pg, svint8_t op) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svmaxv_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.smaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.smaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.smaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.smaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // int16_t test_svmaxv_s16(svbool_t pg, svint16_t op) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svmaxv_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.smaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.smaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.smaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.smaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svmaxv_s32(svbool_t pg, svint32_t op) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svmaxv_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.smaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.smaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.smaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.smaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svmaxv_s64(svbool_t pg, svint64_t op) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svmaxv_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.umaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.umaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svmaxv_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.umaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.umaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svmaxv_u8(svbool_t pg, svuint8_t op) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svmaxv_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.umaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.umaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.umaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.umaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // uint16_t test_svmaxv_u16(svbool_t pg, svuint16_t op) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svmaxv_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.umaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.umaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.umaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.umaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svmaxv_u32(svbool_t pg, svuint32_t op) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svmaxv_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.umaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.umaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.umaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.umaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svmaxv_u64(svbool_t pg, svuint64_t op) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svmaxv_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fmaxv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_f16u10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fmaxv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svmaxv_f16(svbool_t pg, svfloat16_t op) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svmaxv_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fmaxv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fmaxv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svmaxv_f32(svbool_t pg, svfloat32_t op) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svmaxv_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fmaxv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmaxv_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fmaxv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svmaxv_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmin_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmin_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmin_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmin_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmin_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmin_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmin_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmin_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmin_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmin_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmin_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmin_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmin_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmin_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmin_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmin_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmin_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmin_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmin_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmin_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmin_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmin_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmin_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmin_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmin_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmin_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmin_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmin_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmin_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmin_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmin_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmin_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmin_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmin_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmin_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmin_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmin_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmin_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmin_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmin_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmin_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmin_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmin_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmin_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmin_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmin_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmin_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmin_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmin_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmin_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmin_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmin_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmin_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmin_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmin_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmin_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmin_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmin_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmin_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmin_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmin_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmin_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmin_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmin_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmin_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmin_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmin_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmin_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmin_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmin_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmin_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmin_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmin_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmin_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmin_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmin_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmin_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmin_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmin_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmin_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmin_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmin_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmin_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmin_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmin_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmin_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmin_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmin_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmin_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmin_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmin_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmin_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmin_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmin_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmin_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmin_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svmin_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmin_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svmin_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmin_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svmin_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmin_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svmin_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmin_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svmin_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmin_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svmin_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmin_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svmin_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmin_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svmin_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmin_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svmin_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmin_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svmin_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmin_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svmin_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmin_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svmin_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmin_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svmin_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmin_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svmin_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmin_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svmin_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmin_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svmin_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmin_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svmin_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmin_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svmin_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmin_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svminnm_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svminnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svminnm_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svminnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svminnm_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svminnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svminnm_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svminnm_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svminnm_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svminnm_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svminnm_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svminnm_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svminnm_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svminnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svminnm_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svminnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svminnm_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svminnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svminnm_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svminnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svminnm_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svminnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svminnm_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svminnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svminnm_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svminnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svminnm_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svminnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svminnm_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svminnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svminnmv_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fminnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminnmv_f16u10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fminnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svminnmv_f16(svbool_t pg, svfloat16_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svminnmv_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fminnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminnmv_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fminnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svminnmv_f32(svbool_t pg, svfloat32_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svminnmv_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fminnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminnmv_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fminnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svminnmv_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svminv_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.sminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.sminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svminv_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.sminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.sminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svminv_s8(svbool_t pg, svint8_t op) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svminv_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.sminv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.sminv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.sminv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.sminv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // int16_t test_svminv_s16(svbool_t pg, svint16_t op) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svminv_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sminv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sminv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sminv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sminv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svminv_s32(svbool_t pg, svint32_t op) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svminv_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sminv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sminv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sminv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sminv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svminv_s64(svbool_t pg, svint64_t op) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svminv_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.uminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.uminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svminv_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.uminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.uminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svminv_u8(svbool_t pg, svuint8_t op) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svminv_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.uminv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.uminv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.uminv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.uminv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // uint16_t test_svminv_u16(svbool_t pg, svuint16_t op) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svminv_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uminv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uminv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uminv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uminv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svminv_u32(svbool_t pg, svuint32_t op) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svminv_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uminv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uminv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uminv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uminv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svminv_u64(svbool_t pg, svuint64_t op) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svminv_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fminv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret half [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_f16u10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call half @llvm.aarch64.sve.fminv.nxv8f16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminv.nxv8f16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret half [[TMP1]] // float16_t test_svminv_f16(svbool_t pg, svfloat16_t op) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svminv_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fminv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret float [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_f32u10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call float @llvm.aarch64.sve.fminv.nxv4f32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminv.nxv4f32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret float [[TMP1]] // float32_t test_svminv_f32(svbool_t pg, svfloat32_t op) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svminv_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fminv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret double [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svminv_f64u10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call double @llvm.aarch64.sve.fminv.nxv2f64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminv.nxv2f64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret double [[TMP1]] // float64_t test_svminv_f64(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmla_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmla_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmla_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmla_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmla_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmla_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmla_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmla_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmla_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmla_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmla_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmla_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmla_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmla_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmla_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmla_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmla_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmla_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmla_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmla_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmla_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmla_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmla_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmla_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmla_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmla_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmla_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmla_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmla_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmla_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmla_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmla_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmla_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmla_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmla_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmla_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmla_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmla_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmla_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmla_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmla_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmla_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmla_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmla_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmla_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmla_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmla_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmla_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmla_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmla_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmla_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmla_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmla_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmla_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmla_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmla_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmla_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmla_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmla_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmla_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmla_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmla_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmla_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmla_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmla_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmla_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmla_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmla_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmla_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmla_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmla_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmla_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmla_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmla_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmla_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmla_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmla_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmla_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmla_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmla_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmla_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmla_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmla_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmla_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmla_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmla_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmla_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmla_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmla_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmla_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmla_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmla_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmla_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmla_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmla_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmla_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svmla_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svmla_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svmla_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svmla_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svmla_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svmla_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svmla_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svmla_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svmla_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svmla_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svmla_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svmla_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svmla_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svmla_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svmla_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svmla_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svmla_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svmla_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1290,12 +1290,12 @@ // CHECK-LABEL: @test_svmla_lane_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1305,12 +1305,12 @@ // CHECK-LABEL: @test_svmla_lane_f16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svmla_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1320,12 +1320,12 @@ // CHECK-LABEL: @test_svmla_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmla_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1335,12 +1335,12 @@ // CHECK-LABEL: @test_svmla_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmla_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1350,12 +1350,12 @@ // CHECK-LABEL: @test_svmla_lane_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svmla_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1365,12 +1365,12 @@ // CHECK-LABEL: @test_svmla_lane_f64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svmla_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmls_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmls_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmls_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmls_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmls_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmls_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmls_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmls_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmls_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmls_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmls_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmls_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmls_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmls_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmls_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmls_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmls_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmls_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmls_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmls_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmls_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmls_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmls_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmls_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmls_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmls_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmls_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmls_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmls_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmls_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmls_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmls_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmls_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmls_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmls_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmls_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmls_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmls_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmls_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmls_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmls_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmls_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmls_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmls_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmls_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmls_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmls_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmls_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmls_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmls_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmls_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmls_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmls_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmls_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmls_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmls_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmls_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmls_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmls_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmls_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmls_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmls_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmls_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmls_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmls_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmls_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmls_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmls_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmls_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmls_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmls_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmls_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmls_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmls_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmls_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmls_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmls_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmls_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmls_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmls_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmls_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmls_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmls_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmls_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmls_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmls_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmls_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmls_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmls_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmls_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmls_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmls_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmls_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmls_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmls_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmls_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svmls_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svmls_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svmls_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svmls_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svmls_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svmls_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svmls_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svmls_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svmls_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svmls_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svmls_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svmls_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svmls_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svmls_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svmls_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svmls_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svmls_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svmls_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1290,12 +1290,12 @@ // CHECK-LABEL: @test_svmls_lane_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svmls_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1305,12 +1305,12 @@ // CHECK-LABEL: @test_svmls_lane_f16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svmls_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1320,12 +1320,12 @@ // CHECK-LABEL: @test_svmls_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmls_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1335,12 +1335,12 @@ // CHECK-LABEL: @test_svmls_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmls_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1350,12 +1350,12 @@ // CHECK-LABEL: @test_svmls_lane_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svmls_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1365,12 +1365,12 @@ // CHECK-LABEL: @test_svmls_lane_f64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svmls_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmmla_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmmla_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmmla_s32(svint32_t x, svint8_t y, svint8_t z) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svmmla_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ummla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ummla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmmla_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ummla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ummla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmmla_u32(svuint32_t x, svuint8_t y, svuint8_t z) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_svusmmla_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usmmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usmmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svusmmla_s32u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usmmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usmmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svusmmla_s32(svint32_t x, svuint8_t y, svint8_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svmov_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[OP]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[OP]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svmov_b_zu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[OP]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[OP]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svmov_b_z(svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmsb_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmsb_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmsb_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmsb_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmsb_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmsb_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmsb_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmsb_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmsb_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmsb_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmsb_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmsb_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmsb_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmsb_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmsb_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmsb_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmsb_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmsb_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmsb_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmsb_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmsb_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmsb_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmsb_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmsb_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmsb_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmsb_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmsb_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmsb_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmsb_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmsb_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmsb_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmsb_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmsb_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmsb_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmsb_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmsb_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmsb_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmsb_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmsb_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmsb_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmsb_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmsb_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmsb_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmsb_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmsb_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmsb_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmsb_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmsb_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmsb_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmsb_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmsb_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmsb_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmsb_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmsb_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmsb_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmsb_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmsb_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmsb_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmsb_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmsb_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmsb_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmsb_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmsb_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmsb_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmsb_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmsb_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmsb_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmsb_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmsb_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmsb_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmsb_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmsb_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmsb_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmsb_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmsb_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmsb_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmsb_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmsb_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmsb_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmsb_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmsb_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmsb_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmsb_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmsb_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmsb_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmsb_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmsb_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmsb_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmsb_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmsb_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svmsb_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svmsb_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svmsb_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svmsb_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svmsb_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svmsb_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svmsb_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svmsb_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svmsb_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svmsb_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svmsb_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svmsb_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svmsb_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svmsb_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svmsb_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svmsb_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svmsb_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svmsb_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmul_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmul_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmul_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmul_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmul_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmul_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmul_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmul_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmul_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmul_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svmul_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmul_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmul_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmul_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmul_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmul_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmul_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmul_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmul_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmul_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmul_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmul_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmul_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmul_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmul_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmul_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmul_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmul_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmul_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmul_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmul_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmul_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmul_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmul_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmul_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmul_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmul_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmul_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmul_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmul_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmul_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmul_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmul_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmul_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmul_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmul_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmul_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmul_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmul_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmul_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmul_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmul_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmul_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmul_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmul_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmul_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmul_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmul_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmul_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmul_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmul_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmul_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmul_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmul_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmul_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmul_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmul_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmul_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmul_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmul_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmul_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmul_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmul_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmul_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmul_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmul_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmul_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmul_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmul_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmul_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmul_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmul_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmul_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmul_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmul_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmul_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmul_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmul_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmul_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmul_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmul_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmul_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmul_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmul_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmul_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmul_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svmul_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmul_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svmul_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmul_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svmul_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmul_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svmul_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmul_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svmul_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmul_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svmul_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmul_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svmul_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmul_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svmul_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmul_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svmul_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmul_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svmul_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmul_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svmul_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmul_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svmul_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmul_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svmul_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmul_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svmul_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmul_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svmul_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmul_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svmul_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmul_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svmul_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmul_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svmul_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmul_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1290,12 +1290,12 @@ // CHECK-LABEL: @test_svmul_lane_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svmul_lane_f16(svfloat16_t op1, svfloat16_t op2) @@ -1305,12 +1305,12 @@ // CHECK-LABEL: @test_svmul_lane_f16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_f16_1u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svmul_lane_f16_1(svfloat16_t op1, svfloat16_t op2) @@ -1320,12 +1320,12 @@ // CHECK-LABEL: @test_svmul_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmul_lane_f32(svfloat32_t op1, svfloat32_t op2) @@ -1335,12 +1335,12 @@ // CHECK-LABEL: @test_svmul_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_f32_1u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmul_lane_f32_1(svfloat32_t op1, svfloat32_t op2) @@ -1350,12 +1350,12 @@ // CHECK-LABEL: @test_svmul_lane_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svmul_lane_f64(svfloat64_t op1, svfloat64_t op2) @@ -1365,12 +1365,12 @@ // CHECK-LABEL: @test_svmul_lane_f64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_f64_1u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svmul_lane_f64_1(svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svmulh_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmulh_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svmulh_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmulh_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svmulh_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmulh_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svmulh_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmulh_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svmulh_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmulh_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svmulh_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmulh_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svmulh_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmulh_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svmulh_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmulh_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svmulh_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmulh_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svmulh_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmulh_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svmulh_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmulh_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svmulh_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmulh_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svmulh_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmulh_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svmulh_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmulh_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svmulh_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmulh_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svmulh_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmulh_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmulh_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmulh_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svmulh_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmulh_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svmulh_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmulh_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svmulh_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmulh_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmulh_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmulh_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmulh_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svmulh_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmulh_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svmulh_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmulh_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svmulh_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulh_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmulh_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svmulh_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svmulh_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svmulh_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svmulh_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svmulh_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svmulh_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svmulh_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svmulh_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svmulh_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svmulh_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svmulh_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svmulh_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svmulh_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svmulh_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmulh_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svmulh_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmulh_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svmulh_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmulh_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svmulh_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmulh_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmulh_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svmulh_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmulh_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svmulh_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmulh_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svmulh_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmulh_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svmulh_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svmulh_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svmulh_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svmulh_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svmulh_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svmulh_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svmulh_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svmulh_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svmulh_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svmulh_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svmulh_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svmulh_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svmulh_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svmulh_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svmulx_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmulx_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svmulx_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmulx_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svmulx_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmulx_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svmulx_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmulx_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svmulx_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmulx_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svmulx_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmulx_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svmulx_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmulx_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svmulx_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmulx_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svmulx_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmulx_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svmulx_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svmulx_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svmulx_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svmulx_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svmulx_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svmulx_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svmulx_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmulx_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svmulx_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmulx_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svmulx_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmulx_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svmulx_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svmulx_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svmulx_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svmulx_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svmulx_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svmulx_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svnand_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nand.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nand.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnand_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nand.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nand.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svnand_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svneg_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.neg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svneg_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.neg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svneg_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svneg_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svneg_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svneg_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svneg_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svneg_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svneg_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svneg_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.neg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svneg_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.neg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svneg_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svneg_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svneg_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svneg_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svneg_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svneg_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svneg_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svneg_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.neg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svneg_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.neg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svneg_s8_x(svbool_t pg, svint8_t op) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svneg_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svneg_s16_x(svbool_t pg, svint16_t op) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svneg_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svneg_s32_x(svbool_t pg, svint32_t op) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svneg_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.neg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svneg_s64_x(svbool_t pg, svint64_t op) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svneg_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svneg_f16_z(svbool_t pg, svfloat16_t op) @@ -231,14 +231,14 @@ // CHECK-LABEL: @test_svneg_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svneg_f32_z(svbool_t pg, svfloat32_t op) @@ -248,14 +248,14 @@ // CHECK-LABEL: @test_svneg_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svneg_f64_z(svbool_t pg, svfloat64_t op) @@ -265,14 +265,14 @@ // CHECK-LABEL: @test_svneg_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svneg_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -282,14 +282,14 @@ // CHECK-LABEL: @test_svneg_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svneg_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -299,14 +299,14 @@ // CHECK-LABEL: @test_svneg_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svneg_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -316,14 +316,14 @@ // CHECK-LABEL: @test_svneg_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svneg_f16_x(svbool_t pg, svfloat16_t op) @@ -333,14 +333,14 @@ // CHECK-LABEL: @test_svneg_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svneg_f32_x(svbool_t pg, svfloat32_t op) @@ -350,14 +350,14 @@ // CHECK-LABEL: @test_svneg_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svneg_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fneg.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svneg_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svnmad_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svnmad_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svnmad_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svnmad_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svnmad_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svnmad_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svnmad_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svnmad_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svnmad_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svnmad_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svnmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svnmad_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svnmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svnmad_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svnmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svnmad_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svnmad_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svnmad_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svnmad_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svnmad_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svnmad_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svnmla_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svnmla_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svnmla_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svnmla_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svnmla_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svnmla_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svnmla_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svnmla_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svnmla_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svnmla_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svnmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svnmla_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svnmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svnmla_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svnmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svnmla_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svnmla_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svnmla_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svnmla_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svnmla_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svnmla_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svnmls_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svnmls_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svnmls_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svnmls_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svnmls_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svnmls_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svnmls_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svnmls_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svnmls_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svnmls_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svnmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svnmls_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svnmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svnmls_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svnmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svnmls_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svnmls_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svnmls_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svnmls_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svnmls_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svnmls_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svnmsb_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svnmsb_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svnmsb_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svnmsb_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svnmsb_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svnmsb_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svnmsb_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svnmsb_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svnmsb_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svnmsb_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svnmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svnmsb_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svnmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svnmsb_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svnmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svnmsb_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svnmsb_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svnmsb_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svnmsb_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svnmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svnmsb_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svnmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svnmsb_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svnmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svnor_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svnor_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svnor_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svnot_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnot_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svnot_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svnot_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svnot_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svnot_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svnot_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svnot_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svnot_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svnot_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnot_u8_zu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svnot_u8_z(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svnot_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svnot_u16_z(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svnot_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svnot_u32_z(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svnot_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svnot_u64_z(svbool_t pg, svuint64_t op) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svnot_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnot_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svnot_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svnot_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svnot_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svnot_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svnot_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svnot_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svnot_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svnot_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnot_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svnot_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svnot_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svnot_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svnot_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svnot_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svnot_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svnot_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -280,12 +280,12 @@ // CHECK-LABEL: @test_svnot_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnot_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svnot_s8_x(svbool_t pg, svint8_t op) @@ -295,14 +295,14 @@ // CHECK-LABEL: @test_svnot_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svnot_s16_x(svbool_t pg, svint16_t op) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svnot_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svnot_s32_x(svbool_t pg, svint32_t op) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svnot_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svnot_s64_x(svbool_t pg, svint64_t op) @@ -346,12 +346,12 @@ // CHECK-LABEL: @test_svnot_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnot_u8_xu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svnot_u8_x(svbool_t pg, svuint8_t op) @@ -361,14 +361,14 @@ // CHECK-LABEL: @test_svnot_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svnot_u16_x(svbool_t pg, svuint16_t op) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svnot_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svnot_u32_x(svbool_t pg, svuint32_t op) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svnot_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnot_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svnot_u64_x(svbool_t pg, svuint64_t op) @@ -412,12 +412,12 @@ // CHECK-LABEL: @test_svnot_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[PG]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[PG]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svnot_b_zu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[PG]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[PG]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svnot_b_z(svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svorn_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svorn_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svorn_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svorr_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svorr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svorr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svorr_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svorr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svorr_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svorr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svorr_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svorr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svorr_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svorr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svorr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svorr_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svorr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svorr_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svorr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svorr_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svorr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svorr_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svorr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svorr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svorr_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svorr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svorr_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svorr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svorr_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svorr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svorr_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svorr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svorr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svorr_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svorr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svorr_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svorr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svorr_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svorr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svorr_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svorr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svorr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svorr_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svorr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svorr_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svorr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svorr_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svorr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svorr_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svorr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svorr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svorr_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svorr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svorr_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svorr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svorr_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svorr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svorr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svorr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svorr_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svorr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svorr_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svorr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svorr_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svorr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svorr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svorr_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svorr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svorr_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svorr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svorr_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svorr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svorr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svorr_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svorr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svorr_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svorr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svorr_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svorr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svorr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svorr_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svorr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svorr_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svorr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svorr_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svorr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svorr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svorr_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svorr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svorr_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svorr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svorr_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svorr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svorr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svorr_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svorr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svorr_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svorr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svorr_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svorr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,12 +936,12 @@ // CHECK-LABEL: @test_svorr_b_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svorr_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svorr_b_z(svbool_t pg, svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svorv_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svorv_s8u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // int8_t test_svorv_s8(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svorv_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svorv_s16u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // int16_t test_svorv_s16(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svorv_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svorv_s32u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svorv_s32(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svorv_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svorv_s64u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svorv_s64(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svorv_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i8 [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svorv_u8u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i8 [[TMP0]] // uint8_t test_svorv_u8(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svorv_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i16 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svorv_u16u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i16 [[TMP1]] // uint16_t test_svorv_u16(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svorv_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svorv_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svorv_u32(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svorv_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svorv_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svorv_u64(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svpfirst_b( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pfirst.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pfirst.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svpfirst_bu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pfirst.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pfirst.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svpfirst_b(svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svpnext_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pnext.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svpnext_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pnext.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svpnext_b8(svbool_t pg, svbool_t op) @@ -22,18 +22,18 @@ // CHECK-LABEL: @test_svpnext_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svpnext_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svpnext_b16(svbool_t pg, svbool_t op) @@ -43,18 +43,18 @@ // CHECK-LABEL: @test_svpnext_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svpnext_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svpnext_b32(svbool_t pg, svbool_t op) @@ -64,18 +64,18 @@ // CHECK-LABEL: @test_svpnext_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z16test_svpnext_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.pnext.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svpnext_b64(svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svprfb( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z11test_svprfbu10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb(svbool_t pg, const void *base) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svprfb_1( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 1) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_1u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 1) // CPP-CHECK-NEXT: ret void // void test_svprfb_1(svbool_t pg, const void *base) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svprfb_2( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 2) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_2u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 2) // CPP-CHECK-NEXT: ret void // void test_svprfb_2(svbool_t pg, const void *base) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svprfb_3( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 3) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_3u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 3) // CPP-CHECK-NEXT: ret void // void test_svprfb_3(svbool_t pg, const void *base) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svprfb_4( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 4) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 4) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_4u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 4) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 4) // CPP-CHECK-NEXT: ret void // void test_svprfb_4(svbool_t pg, const void *base) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svprfb_5( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 5) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 5) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_5u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 5) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 5) // CPP-CHECK-NEXT: ret void // void test_svprfb_5(svbool_t pg, const void *base) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svprfb_6( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 8) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 8) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_6u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 8) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 8) // CPP-CHECK-NEXT: ret void // void test_svprfb_6(svbool_t pg, const void *base) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svprfb_7( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 9) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 9) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_7u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 9) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 9) // CPP-CHECK-NEXT: ret void // void test_svprfb_7(svbool_t pg, const void *base) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svprfb_8( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 10) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 10) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_8u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 10) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 10) // CPP-CHECK-NEXT: ret void // void test_svprfb_8(svbool_t pg, const void *base) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svprfb_9( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 11) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 11) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfb_9u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 11) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 11) // CPP-CHECK-NEXT: ret void // void test_svprfb_9(svbool_t pg, const void *base) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svprfb_10( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 12) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 12) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfb_10u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 12) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 12) // CPP-CHECK-NEXT: ret void // void test_svprfb_10(svbool_t pg, const void *base) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svprfb_11( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 13) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 13) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfb_11u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 13) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 13) // CPP-CHECK-NEXT: ret void // void test_svprfb_11(svbool_t pg, const void *base) @@ -198,14 +198,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[TMP1]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svprfb_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[TMP1]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_vnum(svbool_t pg, const void *base, int64_t vnum) @@ -215,14 +215,14 @@ // CHECK-LABEL: @test_svprfb_gather_u32base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfb_gather_u32baseu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_u32base(svbool_t pg, svuint32_t bases) @@ -232,14 +232,14 @@ // CHECK-LABEL: @test_svprfb_gather_u64base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfb_gather_u64baseu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_u64base(svbool_t pg, svuint64_t bases) @@ -249,14 +249,14 @@ // CHECK-LABEL: @test_svprfb_gather_s32offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z28test_svprfb_gather_s32offsetu10__SVBool_tPKvu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_s32offset(svbool_t pg, const void *base, svint32_t offsets) @@ -266,14 +266,14 @@ // CHECK-LABEL: @test_svprfb_gather_s64offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z28test_svprfb_gather_s64offsetu10__SVBool_tPKvu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_s64offset(svbool_t pg, const void *base, svint64_t offsets) @@ -283,14 +283,14 @@ // CHECK-LABEL: @test_svprfb_gather_u32offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z28test_svprfb_gather_u32offsetu10__SVBool_tPKvu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_u32offset(svbool_t pg, const void *base, svuint32_t offsets) @@ -300,14 +300,14 @@ // CHECK-LABEL: @test_svprfb_gather_u64offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z28test_svprfb_gather_u64offsetu10__SVBool_tPKvu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_u64offset(svbool_t pg, const void *base, svuint64_t offsets) @@ -317,14 +317,14 @@ // CHECK-LABEL: @test_svprfb_gather_u32base_offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svprfb_gather_u32base_offsetu10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_u32base_offset(svbool_t pg, svuint32_t bases, int64_t offset) @@ -335,14 +335,14 @@ // CHECK-LABEL: @test_svprfb_gather_u64base_offset( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svprfb_gather_u64base_offsetu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfb_gather_u64base_offset(svbool_t pg, svuint64_t bases, int64_t offset) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svprfd( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z11test_svprfdu10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd(svbool_t pg, const void *base) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svprfd_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_1u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) // CPP-CHECK-NEXT: ret void // void test_svprfd_1(svbool_t pg, const void *base) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svprfd_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_2u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) // CPP-CHECK-NEXT: ret void // void test_svprfd_2(svbool_t pg, const void *base) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svprfd_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_3u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) // CPP-CHECK-NEXT: ret void // void test_svprfd_3(svbool_t pg, const void *base) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svprfd_4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_4u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) // CPP-CHECK-NEXT: ret void // void test_svprfd_4(svbool_t pg, const void *base) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svprfd_5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_5u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) // CPP-CHECK-NEXT: ret void // void test_svprfd_5(svbool_t pg, const void *base) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svprfd_6( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_6u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) // CPP-CHECK-NEXT: ret void // void test_svprfd_6(svbool_t pg, const void *base) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svprfd_7( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_7u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) // CPP-CHECK-NEXT: ret void // void test_svprfd_7(svbool_t pg, const void *base) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svprfd_8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_8u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) // CPP-CHECK-NEXT: ret void // void test_svprfd_8(svbool_t pg, const void *base) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svprfd_9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfd_9u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) // CPP-CHECK-NEXT: ret void // void test_svprfd_9(svbool_t pg, const void *base) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svprfd_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfd_10u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) // CPP-CHECK-NEXT: ret void // void test_svprfd_10(svbool_t pg, const void *base) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svprfd_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfd_11u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) // CPP-CHECK-NEXT: ret void // void test_svprfd_11(svbool_t pg, const void *base) @@ -220,20 +220,20 @@ // CHECK-LABEL: @test_svprfd_vnum( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[TMP3]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[TMP3]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svprfd_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[TMP3]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[TMP3]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_vnum(svbool_t pg, const void *base, int64_t vnum) @@ -243,14 +243,14 @@ // CHECK-LABEL: @test_svprfd_gather_u32base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfd_gather_u32baseu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_u32base(svbool_t pg, svuint32_t bases) @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svprfd_gather_u64base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfd_gather_u64baseu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_u64base(svbool_t pg, svuint64_t bases) @@ -277,14 +277,14 @@ // CHECK-LABEL: @test_svprfd_gather_s32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfd_gather_s32indexu10__SVBool_tPKvu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_s32index(svbool_t pg, const void *base, svint32_t indices) @@ -294,14 +294,14 @@ // CHECK-LABEL: @test_svprfd_gather_s64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfd_gather_s64indexu10__SVBool_tPKvu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_s64index(svbool_t pg, const void *base, svint64_t indices) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svprfd_gather_u32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfd_gather_u32indexu10__SVBool_tPKvu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_u32index(svbool_t pg, const void *base, svuint32_t indices) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svprfd_gather_u64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfd_gather_u64indexu10__SVBool_tPKvu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_u64index(svbool_t pg, const void *base, svuint64_t indices) @@ -345,16 +345,16 @@ // CHECK-LABEL: @test_svprfd_gather_u32base_index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svprfd_gather_u32base_indexu10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index) @@ -364,16 +364,16 @@ // CHECK-LABEL: @test_svprfd_gather_u64base_index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svprfd_gather_u64base_indexu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svprfh( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z11test_svprfhu10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh(svbool_t pg, const void *base) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svprfh_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_1u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) // CPP-CHECK-NEXT: ret void // void test_svprfh_1(svbool_t pg, const void *base) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svprfh_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_2u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) // CPP-CHECK-NEXT: ret void // void test_svprfh_2(svbool_t pg, const void *base) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svprfh_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_3u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) // CPP-CHECK-NEXT: ret void // void test_svprfh_3(svbool_t pg, const void *base) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svprfh_4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_4u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) // CPP-CHECK-NEXT: ret void // void test_svprfh_4(svbool_t pg, const void *base) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svprfh_5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_5u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) // CPP-CHECK-NEXT: ret void // void test_svprfh_5(svbool_t pg, const void *base) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svprfh_6( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_6u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) // CPP-CHECK-NEXT: ret void // void test_svprfh_6(svbool_t pg, const void *base) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svprfh_7( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_7u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) // CPP-CHECK-NEXT: ret void // void test_svprfh_7(svbool_t pg, const void *base) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svprfh_8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_8u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) // CPP-CHECK-NEXT: ret void // void test_svprfh_8(svbool_t pg, const void *base) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svprfh_9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfh_9u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) // CPP-CHECK-NEXT: ret void // void test_svprfh_9(svbool_t pg, const void *base) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svprfh_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfh_10u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) // CPP-CHECK-NEXT: ret void // void test_svprfh_10(svbool_t pg, const void *base) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svprfh_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfh_11u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) // CPP-CHECK-NEXT: ret void // void test_svprfh_11(svbool_t pg, const void *base) @@ -220,20 +220,20 @@ // CHECK-LABEL: @test_svprfh_vnum( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[TMP3]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[TMP3]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svprfh_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[TMP3]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[TMP3]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_vnum(svbool_t pg, const void *base, int64_t vnum) @@ -243,14 +243,14 @@ // CHECK-LABEL: @test_svprfh_gather_u32base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfh_gather_u32baseu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_u32base(svbool_t pg, svuint32_t bases) @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svprfh_gather_u64base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfh_gather_u64baseu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_u64base(svbool_t pg, svuint64_t bases) @@ -277,14 +277,14 @@ // CHECK-LABEL: @test_svprfh_gather_s32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfh_gather_s32indexu10__SVBool_tPKvu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_s32index(svbool_t pg, const void *base, svint32_t indices) @@ -294,14 +294,14 @@ // CHECK-LABEL: @test_svprfh_gather_s64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfh_gather_s64indexu10__SVBool_tPKvu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_s64index(svbool_t pg, const void *base, svint64_t indices) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svprfh_gather_u32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfh_gather_u32indexu10__SVBool_tPKvu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_u32index(svbool_t pg, const void *base, svuint32_t indices) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svprfh_gather_u64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfh_gather_u64indexu10__SVBool_tPKvu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_u64index(svbool_t pg, const void *base, svuint64_t indices) @@ -345,16 +345,16 @@ // CHECK-LABEL: @test_svprfh_gather_u32base_index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svprfh_gather_u32base_indexu10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index) @@ -364,16 +364,16 @@ // CHECK-LABEL: @test_svprfh_gather_u64base_index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svprfh_gather_u64base_indexu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svprfw( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z11test_svprfwu10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw(svbool_t pg, const void *base) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svprfw_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_1u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) // CPP-CHECK-NEXT: ret void // void test_svprfw_1(svbool_t pg, const void *base) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svprfw_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_2u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) // CPP-CHECK-NEXT: ret void // void test_svprfw_2(svbool_t pg, const void *base) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svprfw_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_3u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) // CPP-CHECK-NEXT: ret void // void test_svprfw_3(svbool_t pg, const void *base) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svprfw_4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_4u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) // CPP-CHECK-NEXT: ret void // void test_svprfw_4(svbool_t pg, const void *base) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svprfw_5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_5u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) // CPP-CHECK-NEXT: ret void // void test_svprfw_5(svbool_t pg, const void *base) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svprfw_6( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_6u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) // CPP-CHECK-NEXT: ret void // void test_svprfw_6(svbool_t pg, const void *base) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svprfw_7( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_7u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) // CPP-CHECK-NEXT: ret void // void test_svprfw_7(svbool_t pg, const void *base) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svprfw_8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_8u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) // CPP-CHECK-NEXT: ret void // void test_svprfw_8(svbool_t pg, const void *base) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svprfw_9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svprfw_9u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) // CPP-CHECK-NEXT: ret void // void test_svprfw_9(svbool_t pg, const void *base) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svprfw_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfw_10u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) // CPP-CHECK-NEXT: ret void // void test_svprfw_10(svbool_t pg, const void *base) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svprfw_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svprfw_11u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) // CPP-CHECK-NEXT: ret void // void test_svprfw_11(svbool_t pg, const void *base) @@ -220,20 +220,20 @@ // CHECK-LABEL: @test_svprfw_vnum( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[TMP3]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[TMP3]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svprfw_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[TMP3]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[TMP3]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_vnum(svbool_t pg, const void *base, int64_t vnum) @@ -243,14 +243,14 @@ // CHECK-LABEL: @test_svprfw_gather_u32base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfw_gather_u32baseu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_u32base(svbool_t pg, svuint32_t bases) @@ -260,14 +260,14 @@ // CHECK-LABEL: @test_svprfw_gather_u64base( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z26test_svprfw_gather_u64baseu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_u64base(svbool_t pg, svuint64_t bases) @@ -277,14 +277,14 @@ // CHECK-LABEL: @test_svprfw_gather_s32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfw_gather_s32indexu10__SVBool_tPKvu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_s32index(svbool_t pg, const void *base, svint32_t indices) @@ -294,14 +294,14 @@ // CHECK-LABEL: @test_svprfw_gather_s64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfw_gather_s64indexu10__SVBool_tPKvu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_s64index(svbool_t pg, const void *base, svint64_t indices) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svprfw_gather_u32index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfw_gather_u32indexu10__SVBool_tPKvu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_u32index(svbool_t pg, const void *base, svuint32_t indices) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svprfw_gather_u64index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z27test_svprfw_gather_u64indexu10__SVBool_tPKvu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_u64index(svbool_t pg, const void *base, svuint64_t indices) @@ -345,16 +345,16 @@ // CHECK-LABEL: @test_svprfw_gather_u32base_index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svprfw_gather_u32base_indexu10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index) @@ -364,16 +364,16 @@ // CHECK-LABEL: @test_svprfw_gather_u64base_index( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svprfw_gather_u64base_indexu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svptest_any( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.any.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.any.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i1 [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svptest_anyu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.any.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.any.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i1 [[TMP0]] // bool test_svptest_any(svbool_t pg, svbool_t op) @@ -22,12 +22,12 @@ // CHECK-LABEL: @test_svptest_first( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.first.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.first.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i1 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svptest_firstu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.first.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.first.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i1 [[TMP0]] // bool test_svptest_first(svbool_t pg, svbool_t op) @@ -37,12 +37,12 @@ // CHECK-LABEL: @test_svptest_last( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.last.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.last.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret i1 [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svptest_lastu10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.last.nxv16i1( [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.last.nxv16i1( [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret i1 [[TMP0]] // bool test_svptest_last(svbool_t pg, svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svptrue_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svptrue_b8v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_b8() @@ -22,14 +22,14 @@ // CHECK-LABEL: @test_svptrue_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svptrue_b16v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svptrue_b16() @@ -39,14 +39,14 @@ // CHECK-LABEL: @test_svptrue_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svptrue_b32v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svptrue_b32() @@ -56,14 +56,14 @@ // CHECK-LABEL: @test_svptrue_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svptrue_b64v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svptrue_b64() @@ -73,12 +73,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svptrue_pat_b8v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8() @@ -88,12 +88,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_1v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_1() @@ -103,12 +103,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_2v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_2() @@ -118,12 +118,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_3v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_3() @@ -133,12 +133,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 4) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 4) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_4v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 4) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 4) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_4() @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 5) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 5) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_5v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 5) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 5) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_5() @@ -163,12 +163,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_6( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 6) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 6) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_6v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 6) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 6) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_6() @@ -178,12 +178,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_7( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_7v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_7() @@ -193,12 +193,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_8v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_8() @@ -208,12 +208,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 9) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 9) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_9v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 9) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 9) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_9() @@ -223,12 +223,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_10( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 10) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 10) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_10v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 10) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 10) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_10() @@ -238,12 +238,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_11( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 11) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 11) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_11v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 11) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 11) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_11() @@ -253,12 +253,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_12( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 12) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 12) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_12v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 12) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 12) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_12() @@ -268,12 +268,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_13( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 13) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 13) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_13v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 13) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 13) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_13() @@ -283,12 +283,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_14( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 29) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 29) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_14v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 29) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 29) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_14() @@ -298,12 +298,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_15( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 30) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 30) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_15v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 30) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 30) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_15() @@ -313,12 +313,12 @@ // CHECK-LABEL: @test_svptrue_pat_b8_16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_16v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svptrue_pat_b8_16() @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svptrue_pat_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv8i1(i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svptrue_pat_b16v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv8i1(i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svptrue_pat_b16() @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svptrue_pat_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv4i1(i32 1) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 1) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svptrue_pat_b32v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv4i1(i32 1) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 1) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svptrue_pat_b32() @@ -362,14 +362,14 @@ // CHECK-LABEL: @test_svptrue_pat_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv2i1(i32 2) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 2) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svptrue_pat_b64v( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv2i1(i32 2) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 2) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svptrue_pat_b64() diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqadd_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svqadd_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqadd_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqadd_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqadd_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqadd_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqadd_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqadd_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqadd_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqadd_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqadd_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqadd_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqadd_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svqadd_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqadd_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqadd_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqadd_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqadd_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqadd_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqadd_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqadd_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqadd_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqadd_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svqadd_u64(svuint64_t op1, svuint64_t op2) @@ -138,14 +138,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqadd_n_s8(svint8_t op1, int8_t op2) @@ -157,14 +157,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqadd_n_s16(svint16_t op1, int16_t op2) @@ -176,14 +176,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqadd_n_s32(svint32_t op1, int32_t op2) @@ -195,14 +195,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqadd_n_s64(svint64_t op1, int64_t op2) @@ -214,14 +214,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqadd_n_u8(svuint8_t op1, uint8_t op2) @@ -233,14 +233,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqadd_n_u16(svuint16_t op1, uint16_t op2) @@ -252,14 +252,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqadd_n_u32(svuint32_t op1, uint32_t op2) @@ -271,14 +271,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqadd_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqdecb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecb_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqdecb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdecb_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecb_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqdecb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdecb_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqdecb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdecb_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqdecb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecb_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdecb_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqdecb_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecb_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqdecb_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdecb_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqdecb_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdecb_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqdecb_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdecb_pat_n_u64(uint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqdecd_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecd_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecd_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqdecd_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdecd_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecd_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqdecd_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecd_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdecd_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqdecd_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecd_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdecd_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqdecd_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecd_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdecd_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqdecd_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 4, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 4, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 4, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 4, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecd_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqdecd_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 5, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 5, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 5, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 5, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdecd_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqdecd_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 6, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 6, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 6, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 6, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdecd_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqdecd_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 7, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 7, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 7, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 7, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdecd_pat_n_u64(uint64_t op) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svqdecd_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqdecd_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdecd_s64(svint64_t op) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svqdecd_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqdecd_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svqdecd_u64(svuint64_t op) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svqdecd_pat_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 8, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 8, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdecd_pat_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 8, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 8, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdecd_pat_s64(svint64_t op) @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svqdecd_pat_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 9, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 9, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdecd_pat_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 9, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 9, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svqdecd_pat_u64(svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqdech_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdech_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdech_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqdech_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdech_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdech_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqdech_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdech_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdech_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqdech_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdech_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdech_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqdech_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdech_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdech_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqdech_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 10, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 10, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 10, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 10, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdech_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqdech_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 11, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 11, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 11, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 11, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdech_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqdech_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 12, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 12, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 12, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 12, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdech_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqdech_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 13, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 13, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 13, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 13, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdech_pat_n_u64(uint64_t op) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svqdech_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqdech_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdech_s16(svint16_t op) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svqdech_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqdech_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqdech_u16(svuint16_t op) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svqdech_pat_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 29, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 29, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdech_pat_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 29, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 29, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdech_pat_s16(svint16_t op) @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svqdech_pat_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 30, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 30, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdech_pat_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 30, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 30, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqdech_pat_u16(svuint16_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqdecp_n_s32_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqdecp_n_s32_b8iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecp_n_s32_b8(int32_t op, svbool_t pg) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svqdecp_n_s32_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b16iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svqdecp_n_s32_b16(int32_t op, svbool_t pg) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svqdecp_n_s32_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b32iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svqdecp_n_s32_b32(int32_t op, svbool_t pg) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svqdecp_n_s32_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b64iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svqdecp_n_s32_b64(int32_t op, svbool_t pg) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svqdecp_n_s64_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqdecp_n_s64_b8lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdecp_n_s64_b8(int64_t op, svbool_t pg) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svqdecp_n_s64_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b16lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svqdecp_n_s64_b16(int64_t op, svbool_t pg) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svqdecp_n_s64_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b32lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svqdecp_n_s64_b32(int64_t op, svbool_t pg) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svqdecp_n_s64_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b64lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svqdecp_n_s64_b64(int64_t op, svbool_t pg) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svqdecp_n_u32_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqdecp_n_u32_b8ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdecp_n_u32_b8(uint32_t op, svbool_t pg) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svqdecp_n_u32_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b16ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svqdecp_n_u32_b16(uint32_t op, svbool_t pg) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svqdecp_n_u32_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b32ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svqdecp_n_u32_b32(uint32_t op, svbool_t pg) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svqdecp_n_u32_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b64ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svqdecp_n_u32_b64(uint32_t op, svbool_t pg) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svqdecp_n_u64_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqdecp_n_u64_b8mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdecp_n_u64_b8(uint64_t op, svbool_t pg) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svqdecp_n_u64_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b16mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svqdecp_n_u64_b16(uint64_t op, svbool_t pg) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svqdecp_n_u64_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b32mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svqdecp_n_u64_b32(uint64_t op, svbool_t pg) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svqdecp_n_u64_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b64mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svqdecp_n_u64_b64(uint64_t op, svbool_t pg) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svqdecp_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqdecp_s16u11__SVInt16_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdecp_s16(svint16_t op, svbool_t pg) @@ -297,14 +297,14 @@ // CHECK-LABEL: @test_svqdecp_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqdecp_s32u11__SVInt32_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdecp_s32(svint32_t op, svbool_t pg) @@ -314,14 +314,14 @@ // CHECK-LABEL: @test_svqdecp_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqdecp_s64u11__SVInt64_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdecp_s64(svint64_t op, svbool_t pg) @@ -331,14 +331,14 @@ // CHECK-LABEL: @test_svqdecp_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqdecp_u16u12__SVUint16_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqdecp_u16(svuint16_t op, svbool_t pg) @@ -348,14 +348,14 @@ // CHECK-LABEL: @test_svqdecp_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqdecp_u32u12__SVUint32_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqdecp_u32(svuint32_t op, svbool_t pg) @@ -365,14 +365,14 @@ // CHECK-LABEL: @test_svqdecp_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqdecp_u64u12__SVUint64_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqdecp_u64(svuint64_t op, svbool_t pg) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqdecw_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecw_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecw_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqdecw_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdecw_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecw_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqdecw_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecw_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdecw_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqdecw_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecw_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdecw_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqdecw_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdecw_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdecw_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqdecw_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqdecw_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqdecw_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 0, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 0, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 0, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 0, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqdecw_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqdecw_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 1, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 1, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 1, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 1, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqdecw_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqdecw_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 2, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 2, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 2, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 2, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqdecw_pat_n_u64(uint64_t op) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svqdecw_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqdecw_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdecw_s32(svint32_t op) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svqdecw_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqdecw_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqdecw_u32(svuint32_t op) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svqdecw_pat_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 3, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 3, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdecw_pat_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 3, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 3, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdecw_pat_s32(svint32_t op) @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svqdecw_pat_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 4, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 4, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqdecw_pat_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 4, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 4, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqdecw_pat_u32(svuint32_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqincb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincb_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincb_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqincb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqincb_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincb_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqincb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincb_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqincb_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqincb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincb_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqincb_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqincb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincb_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqincb_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqincb_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 5, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 5, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 5, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 5, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincb_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqincb_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 6, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 6, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 6, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 6, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqincb_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqincb_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 7, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 7, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 7, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 7, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqincb_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqincb_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 8, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 8, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 8, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 8, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqincb_pat_n_u64(uint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqincd_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincd_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincd_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqincd_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqincd_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincd_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqincd_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincd_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqincd_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqincd_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincd_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqincd_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqincd_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincd_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqincd_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqincd_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 9, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 9, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 9, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 9, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincd_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqincd_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 10, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 10, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 10, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 10, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqincd_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqincd_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 11, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 11, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 11, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 11, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqincd_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqincd_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 12, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 12, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 12, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 12, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqincd_pat_n_u64(uint64_t op) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svqincd_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqincd_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqincd_s64(svint64_t op) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svqincd_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqincd_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svqincd_u64(svuint64_t op) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svqincd_pat_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 13, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 13, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqincd_pat_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 13, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 13, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqincd_pat_s64(svint64_t op) @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svqincd_pat_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 29, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 29, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqincd_pat_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 29, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 29, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svqincd_pat_u64(svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqinch_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqinch_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqinch_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqinch_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqinch_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqinch_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqinch_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqinch_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqinch_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqinch_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqinch_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqinch_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqinch_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqinch_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqinch_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqinch_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 30, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 30, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 30, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 30, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqinch_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqinch_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqinch_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqinch_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 0, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 0, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 0, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 0, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqinch_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqinch_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 1, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 1, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 1, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 1, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqinch_pat_n_u64(uint64_t op) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svqinch_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqinch_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqinch_s16(svint16_t op) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svqinch_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqinch_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqinch_u16(svuint16_t op) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svqinch_pat_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 2, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 2, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqinch_pat_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 2, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 2, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqinch_pat_s16(svint16_t op) @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svqinch_pat_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 3, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 3, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqinch_pat_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 3, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 3, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqinch_pat_u16(svuint16_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqincp_n_s32_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqincp_n_s32_b8iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincp_n_s32_b8(int32_t op, svbool_t pg) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svqincp_n_s32_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_s32_b16iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svqincp_n_s32_b16(int32_t op, svbool_t pg) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svqincp_n_s32_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_s32_b32iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svqincp_n_s32_b32(int32_t op, svbool_t pg) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svqincp_n_s32_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_s32_b64iu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // int32_t test_svqincp_n_s32_b64(int32_t op, svbool_t pg) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svqincp_n_s64_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqincp_n_s64_b8lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqincp_n_s64_b8(int64_t op, svbool_t pg) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svqincp_n_s64_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_s64_b16lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svqincp_n_s64_b16(int64_t op, svbool_t pg) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svqincp_n_s64_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_s64_b32lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svqincp_n_s64_b32(int64_t op, svbool_t pg) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svqincp_n_s64_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_s64_b64lu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // int64_t test_svqincp_n_s64_b64(int64_t op, svbool_t pg) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svqincp_n_u32_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqincp_n_u32_b8ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqincp_n_u32_b8(uint32_t op, svbool_t pg) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svqincp_n_u32_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_u32_b16ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svqincp_n_u32_b16(uint32_t op, svbool_t pg) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svqincp_n_u32_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_u32_b32ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svqincp_n_u32_b32(uint32_t op, svbool_t pg) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svqincp_n_u32_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i32 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_u32_b64ju10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i32 [[TMP1]] // uint32_t test_svqincp_n_u32_b64(uint32_t op, svbool_t pg) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svqincp_n_u64_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqincp_n_u64_b8mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqincp_n_u64_b8(uint64_t op, svbool_t pg) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svqincp_n_u64_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_u64_b16mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svqincp_n_u64_b16(uint64_t op, svbool_t pg) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svqincp_n_u64_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_u64_b32mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svqincp_n_u64_b32(uint64_t op, svbool_t pg) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svqincp_n_u64_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret i64 [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqincp_n_u64_b64mu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret i64 [[TMP1]] // uint64_t test_svqincp_n_u64_b64(uint64_t op, svbool_t pg) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svqincp_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqincp_s16u11__SVInt16_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqincp_s16(svint16_t op, svbool_t pg) @@ -297,14 +297,14 @@ // CHECK-LABEL: @test_svqincp_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqincp_s32u11__SVInt32_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqincp_s32(svint32_t op, svbool_t pg) @@ -314,14 +314,14 @@ // CHECK-LABEL: @test_svqincp_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqincp_s64u11__SVInt64_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqincp_s64(svint64_t op, svbool_t pg) @@ -331,14 +331,14 @@ // CHECK-LABEL: @test_svqincp_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqincp_u16u12__SVUint16_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqincp_u16(svuint16_t op, svbool_t pg) @@ -348,14 +348,14 @@ // CHECK-LABEL: @test_svqincp_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqincp_u32u12__SVUint32_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqincp_u32(svuint32_t op, svbool_t pg) @@ -365,14 +365,14 @@ // CHECK-LABEL: @test_svqincp_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqincp_u64u12__SVUint64_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqincp_u64(svuint64_t op, svbool_t pg) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqincw_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincw_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincw_n_s32(int32_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqincw_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqincw_n_s32_1i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincw_n_s32_1(int32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqincw_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincw_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqincw_n_s64(int64_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqincw_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincw_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqincw_n_u32(uint32_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqincw_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqincw_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqincw_n_u64(uint64_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqincw_pat_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 4, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 4, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_s32i( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 4, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 4, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // int32_t test_svqincw_pat_n_s32(int32_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqincw_pat_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 5, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 5, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_s64l( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 5, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 5, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // int64_t test_svqincw_pat_n_s64(int64_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqincw_pat_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 6, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 6, i32 16) // CHECK-NEXT: ret i32 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_u32j( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 6, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 6, i32 16) // CPP-CHECK-NEXT: ret i32 [[TMP0]] // uint32_t test_svqincw_pat_n_u32(uint32_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svqincw_pat_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 7, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 7, i32 1) // CHECK-NEXT: ret i64 [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_u64m( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 7, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 7, i32 1) // CPP-CHECK-NEXT: ret i64 [[TMP0]] // uint64_t test_svqincw_pat_n_u64(uint64_t op) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svqincw_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 31, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 31, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqincw_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 31, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 31, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqincw_s32(svint32_t op) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svqincw_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 31, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 31, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqincw_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 31, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 31, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqincw_u32(svuint32_t op) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svqincw_pat_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 8, i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 8, i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqincw_pat_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 8, i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 8, i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqincw_pat_s32(svint32_t op) @@ -196,12 +196,12 @@ // CHECK-LABEL: @test_svqincw_pat_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 9, i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 9, i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqincw_pat_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 9, i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 9, i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqincw_pat_u32(svuint32_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svqsub_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svqsub_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqsub_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svqsub_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqsub_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqsub_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svqsub_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqsub_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqsub_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svqsub_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqsub_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqsub_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svqsub_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svqsub_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqsub_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svqsub_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqsub_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqsub_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svqsub_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqsub_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqsub_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svqsub_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqsub_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svqsub_u64(svuint64_t op1, svuint64_t op2) @@ -138,14 +138,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqsub_n_s8(svint8_t op1, int8_t op2) @@ -157,14 +157,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqsub_n_s16(svint16_t op1, int16_t op2) @@ -176,14 +176,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqsub_n_s32(svint32_t op1, int32_t op2) @@ -195,14 +195,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqsub_n_s64(svint64_t op1, int64_t op2) @@ -214,14 +214,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqsub_n_u8(svuint8_t op1, uint8_t op2) @@ -233,14 +233,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqsub_n_u16(svuint16_t op1, uint16_t op2) @@ -252,14 +252,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqsub_n_u32(svuint32_t op1, uint32_t op2) @@ -271,14 +271,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqsub_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svrbit_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrbit_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrbit_s8_z(svbool_t pg, svint8_t op) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svrbit_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrbit_s16_z(svbool_t pg, svint16_t op) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svrbit_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrbit_s32_z(svbool_t pg, svint32_t op) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svrbit_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrbit_s64_z(svbool_t pg, svint64_t op) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svrbit_u8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrbit_u8_zu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrbit_u8_z(svbool_t pg, svuint8_t op) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svrbit_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrbit_u16_z(svbool_t pg, svuint16_t op) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svrbit_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrbit_u32_z(svbool_t pg, svuint32_t op) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svrbit_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrbit_u64_z(svbool_t pg, svuint64_t op) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svrbit_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrbit_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrbit_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svrbit_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrbit_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svrbit_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrbit_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svrbit_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrbit_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svrbit_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrbit_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrbit_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svrbit_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrbit_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svrbit_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrbit_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svrbit_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrbit_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -280,12 +280,12 @@ // CHECK-LABEL: @test_svrbit_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrbit_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrbit_s8_x(svbool_t pg, svint8_t op) @@ -295,14 +295,14 @@ // CHECK-LABEL: @test_svrbit_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrbit_s16_x(svbool_t pg, svint16_t op) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svrbit_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrbit_s32_x(svbool_t pg, svint32_t op) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svrbit_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrbit_s64_x(svbool_t pg, svint64_t op) @@ -346,12 +346,12 @@ // CHECK-LABEL: @test_svrbit_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrbit_u8_xu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrbit_u8_x(svbool_t pg, svuint8_t op) @@ -361,14 +361,14 @@ // CHECK-LABEL: @test_svrbit_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrbit_u16_x(svbool_t pg, svuint16_t op) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svrbit_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrbit_u32_x(svbool_t pg, svuint32_t op) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svrbit_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrbit_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrbit_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c @@ -7,14 +7,14 @@ // CHECK-LABEL: @test_svrdffr( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rdffr.z( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z12test_svrdffrv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rdffr.z( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svrdffr() @@ -24,12 +24,12 @@ // CHECK-LABEL: @test_svrdffr_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rdffr.z( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[PG:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrdffr_zu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rdffr.z( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[PG:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svrdffr_z(svbool_t pg) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svrecpe_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecpe.x.nxv8f16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv8f16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrecpe_f16u13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecpe.x.nxv8f16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv8f16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svrecpe_f16(svfloat16_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svrecpe_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecpe.x.nxv4f32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv4f32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrecpe_f32u13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecpe.x.nxv4f32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv4f32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svrecpe_f32(svfloat32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svrecpe_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecpe.x.nxv2f64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv2f64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrecpe_f64u13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecpe.x.nxv2f64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv2f64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svrecpe_f64(svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svrecps_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecps.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrecps_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecps.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svrecps_f16(svfloat16_t op1, svfloat16_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svrecps_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecps.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrecps_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecps.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svrecps_f32(svfloat32_t op1, svfloat32_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svrecps_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecps.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrecps_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frecps.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svrecps_f64(svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrecpx_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrecpx_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrecpx_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrecpx_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrecpx_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrecpx_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrecpx_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrecpx_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrecpx_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrecpx_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrecpx_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrecpx_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrecpx_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrecpx_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrecpx_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrecpx_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrecpx_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpx_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frecpx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrecpx_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c @@ -498,7 +498,6 @@ return SVE_ACLE_FUNC(svreinterpret_s32,_f64,,)(op); } -// // CHECK-LABEL: @test_svreinterpret_s64_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to @@ -1349,6 +1348,7 @@ return SVE_ACLE_FUNC(svreinterpret_f16,_s32,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_f16_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to @@ -1364,6 +1364,7 @@ return SVE_ACLE_FUNC(svreinterpret_f16,_s64,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_f16_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to @@ -1379,6 +1380,7 @@ return SVE_ACLE_FUNC(svreinterpret_f16,_u8,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_f16_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to @@ -1394,6 +1396,7 @@ return SVE_ACLE_FUNC(svreinterpret_f16,_u16,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_f16_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to @@ -1409,6 +1412,7 @@ return SVE_ACLE_FUNC(svreinterpret_f16,_u32,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_f16_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to @@ -1615,6 +1619,7 @@ return SVE_ACLE_FUNC(svreinterpret_f32,_f32,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_f32_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to @@ -1750,6 +1755,7 @@ return SVE_ACLE_FUNC(svreinterpret_f64,_u64,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_f64_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svrev_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8bf16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8bf16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svrev_bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8bf16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8bf16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svrev_bf16(svbfloat16_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svrev_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svrev_s8u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrev_s8(svint8_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svrev_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrev_s16(svint16_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svrev_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrev_s32(svint32_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svrev_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svrev_s64(svint64_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svrev_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svrev_u8u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrev_u8(svuint8_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svrev_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrev_u16(svuint16_t op) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svrev_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrev_u32(svuint32_t op) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svrev_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svrev_u64(svuint64_t op) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svrev_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8f16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8f16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_f16u13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8f16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8f16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svrev_f16(svfloat16_t op) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svrev_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4f32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4f32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_f32u13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4f32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4f32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svrev_f32(svfloat32_t op) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svrev_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2f64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2f64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svrev_f64u13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2f64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2f64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svrev_f64(svfloat64_t op) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svrev_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv16i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i1( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svrev_b8u10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rev.nxv16i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i1( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svrev_b8(svbool_t op) @@ -196,16 +196,16 @@ // CHECK-LABEL: @test_svrev_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8i1( [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svrev_b16u10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rev.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svrev_b16(svbool_t op) @@ -215,16 +215,16 @@ // CHECK-LABEL: @test_svrev_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4i1( [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svrev_b32u10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rev.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svrev_b32(svbool_t op) @@ -234,16 +234,16 @@ // CHECK-LABEL: @test_svrev_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2i1( [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svrev_b64u10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rev.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svrev_b64(svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrevb_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrevb_s16_z(svbool_t pg, svint16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrevb_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrevb_s32_z(svbool_t pg, svint32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrevb_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevb_s64_z(svbool_t pg, svint64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrevb_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrevb_u16_z(svbool_t pg, svuint16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrevb_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrevb_u32_z(svbool_t pg, svuint32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrevb_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevb_u64_z(svbool_t pg, svuint64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrevb_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrevb_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrevb_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrevb_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrevb_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevb_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svrevb_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrevb_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svrevb_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrevb_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svrevb_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevb_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -220,14 +220,14 @@ // CHECK-LABEL: @test_svrevb_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrevb_s16_x(svbool_t pg, svint16_t op) @@ -237,14 +237,14 @@ // CHECK-LABEL: @test_svrevb_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrevb_s32_x(svbool_t pg, svint32_t op) @@ -254,14 +254,14 @@ // CHECK-LABEL: @test_svrevb_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevb_s64_x(svbool_t pg, svint64_t op) @@ -271,14 +271,14 @@ // CHECK-LABEL: @test_svrevb_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrevb_u16_x(svbool_t pg, svuint16_t op) @@ -288,14 +288,14 @@ // CHECK-LABEL: @test_svrevb_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrevb_u32_x(svbool_t pg, svuint32_t op) @@ -305,14 +305,14 @@ // CHECK-LABEL: @test_svrevb_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevb_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevb_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrevh_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrevh_s32_z(svbool_t pg, svint32_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrevh_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevh_s64_z(svbool_t pg, svint64_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrevh_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrevh_u32_z(svbool_t pg, svuint32_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrevh_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevh_u64_z(svbool_t pg, svuint64_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrevh_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrevh_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrevh_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevh_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrevh_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrevh_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrevh_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevh_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrevh_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrevh_s32_x(svbool_t pg, svint32_t op) @@ -169,14 +169,14 @@ // CHECK-LABEL: @test_svrevh_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevh_s64_x(svbool_t pg, svint64_t op) @@ -186,14 +186,14 @@ // CHECK-LABEL: @test_svrevh_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrevh_u32_x(svbool_t pg, svuint32_t op) @@ -203,14 +203,14 @@ // CHECK-LABEL: @test_svrevh_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevh_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevh_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrevw_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevw_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevw_s64_z(svbool_t pg, svint64_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrevw_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevw_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevw_u64_z(svbool_t pg, svuint64_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrevw_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevw_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevw_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrevw_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevw_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevw_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrevw_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevw_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrevw_s64_x(svbool_t pg, svint64_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrevw_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrevw_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrevw_u64_x(svbool_t pg, svuint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrinta_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrinta_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrinta_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrinta_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrinta_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrinta_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrinta_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrinta_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrinta_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrinta_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrinta_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrinta_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrinta_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrinta_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrinta_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrinta_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrinta_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinta_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinta.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrinta_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrinti_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrinti_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrinti_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrinti_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrinti_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrinti_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrinti_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrinti_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrinti_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrinti_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrinti_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrinti_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrinti_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrinti_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrinti_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrinti_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrinti_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrinti_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frinti.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrinti_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrintm_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintm_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrintm_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintm_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrintm_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintm_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrintm_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintm_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrintm_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintm_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrintm_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintm_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrintm_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintm_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrintm_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintm_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrintm_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintm_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintm.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintm_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrintn_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintn_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrintn_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintn_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrintn_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintn_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrintn_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintn_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrintn_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintn_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrintn_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintn_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrintn_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintn_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrintn_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintn_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrintn_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintn_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintn.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintn_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrintp_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintp_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrintp_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintp_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrintp_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintp_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrintp_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintp_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrintp_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintp_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrintp_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintp_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrintp_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintp_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrintp_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintp_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrintp_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintp_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintp.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintp_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrintx_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintx_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrintx_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintx_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrintx_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintx_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrintx_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintx_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrintx_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintx_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrintx_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintx_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrintx_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintx_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrintx_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintx_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrintx_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintx_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintx_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svrintz_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintz_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svrintz_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintz_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svrintz_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintz_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svrintz_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintz_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svrintz_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintz_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svrintz_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintz_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svrintz_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svrintz_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svrintz_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svrintz_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svrintz_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrintz_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.frintz.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svrintz_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svrsqrte_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrte.x.nxv8f16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv8f16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsqrte_f16u13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrte.x.nxv8f16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv8f16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svrsqrte_f16(svfloat16_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svrsqrte_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrte.x.nxv4f32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv4f32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsqrte_f32u13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrte.x.nxv4f32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv4f32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svrsqrte_f32(svfloat32_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svrsqrte_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrte.x.nxv2f64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv2f64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsqrte_f64u13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrte.x.nxv2f64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv2f64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svrsqrte_f64(svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svrsqrts_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrts.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsqrts_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrts.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svrsqrts_f16(svfloat16_t op1, svfloat16_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svrsqrts_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrts.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsqrts_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrts.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svrsqrts_f32(svfloat32_t op1, svfloat32_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svrsqrts_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrts.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsqrts_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.frsqrts.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svrsqrts_f64(svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svscale_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f16_zu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svscale_f16_z(svbool_t pg, svfloat16_t op1, svint16_t op2) @@ -35,16 +35,16 @@ // CHECK-LABEL: @test_svscale_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f32_zu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svscale_f32_z(svbool_t pg, svfloat32_t op1, svint32_t op2) @@ -54,16 +54,16 @@ // CHECK-LABEL: @test_svscale_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f64_zu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svscale_f64_z(svbool_t pg, svfloat64_t op1, svint64_t op2) @@ -73,14 +73,14 @@ // CHECK-LABEL: @test_svscale_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f16_mu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svscale_f16_m(svbool_t pg, svfloat16_t op1, svint16_t op2) @@ -90,14 +90,14 @@ // CHECK-LABEL: @test_svscale_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f32_mu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svscale_f32_m(svbool_t pg, svfloat32_t op1, svint32_t op2) @@ -107,14 +107,14 @@ // CHECK-LABEL: @test_svscale_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f64_mu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svscale_f64_m(svbool_t pg, svfloat64_t op1, svint64_t op2) @@ -124,14 +124,14 @@ // CHECK-LABEL: @test_svscale_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f16_xu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svscale_f16_x(svbool_t pg, svfloat16_t op1, svint16_t op2) @@ -141,14 +141,14 @@ // CHECK-LABEL: @test_svscale_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f32_xu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svscale_f32_x(svbool_t pg, svfloat32_t op1, svint32_t op2) @@ -158,14 +158,14 @@ // CHECK-LABEL: @test_svscale_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svscale_f64_xu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svscale_f64_x(svbool_t pg, svfloat64_t op1, svint64_t op2) @@ -175,20 +175,20 @@ // CHECK-LABEL: @test_svscale_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_zu10__SVBool_tu13__SVFloat16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svscale_n_f16_z(svbool_t pg, svfloat16_t op1, int16_t op2) @@ -198,20 +198,20 @@ // CHECK-LABEL: @test_svscale_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_zu10__SVBool_tu13__SVFloat32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svscale_n_f32_z(svbool_t pg, svfloat32_t op1, int32_t op2) @@ -221,20 +221,20 @@ // CHECK-LABEL: @test_svscale_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_zu10__SVBool_tu13__SVFloat64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svscale_n_f64_z(svbool_t pg, svfloat64_t op1, int64_t op2) @@ -244,18 +244,18 @@ // CHECK-LABEL: @test_svscale_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_mu10__SVBool_tu13__SVFloat16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svscale_n_f16_m(svbool_t pg, svfloat16_t op1, int16_t op2) @@ -265,18 +265,18 @@ // CHECK-LABEL: @test_svscale_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_mu10__SVBool_tu13__SVFloat32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svscale_n_f32_m(svbool_t pg, svfloat32_t op1, int32_t op2) @@ -286,18 +286,18 @@ // CHECK-LABEL: @test_svscale_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_mu10__SVBool_tu13__SVFloat64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svscale_n_f64_m(svbool_t pg, svfloat64_t op1, int64_t op2) @@ -307,18 +307,18 @@ // CHECK-LABEL: @test_svscale_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_xu10__SVBool_tu13__SVFloat16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svscale_n_f16_x(svbool_t pg, svfloat16_t op1, int16_t op2) @@ -328,18 +328,18 @@ // CHECK-LABEL: @test_svscale_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_xu10__SVBool_tu13__SVFloat32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svscale_n_f32_x(svbool_t pg, svfloat32_t op1, int32_t op2) @@ -349,18 +349,18 @@ // CHECK-LABEL: @test_svscale_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_xu10__SVBool_tu13__SVFloat64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svscale_n_f64_x(svbool_t pg, svfloat64_t op1, int64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c @@ -16,13 +16,13 @@ // CHECK-LABEL: @test_svsel_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svsel_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c @@ -31,13 +31,13 @@ // CHECK-LABEL: @test_svsel_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -48,13 +48,13 @@ // CHECK-LABEL: @test_svsel_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -65,13 +65,13 @@ // CHECK-LABEL: @test_svsel_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -97,13 +97,13 @@ // CHECK-LABEL: @test_svsel_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -114,13 +114,13 @@ // CHECK-LABEL: @test_svsel_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -131,13 +131,13 @@ // CHECK-LABEL: @test_svsel_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -148,13 +148,13 @@ // CHECK-LABEL: @test_svsel_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -165,13 +165,13 @@ // CHECK-LABEL: @test_svsel_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -182,13 +182,13 @@ // CHECK-LABEL: @test_svsel_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z14test_svsel_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CPP-CHECK-NEXT: ret [[TMP1]] // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svset2_bf16_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset2_bf16_014svbfloat16x2_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x2_t test_svset2_bf16_0(svbfloat16x2_t tuple, svbfloat16_t x) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svset2_bf16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset2_bf16_114svbfloat16x2_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x2_t test_svset2_bf16_1(svbfloat16x2_t tuple, svbfloat16_t x) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svset2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svset2_s810svint8x2_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x2_t test_svset2_s8(svint8x2_t tuple, svint8_t x) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svset2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_s1611svint16x2_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16x2_t test_svset2_s16(svint16x2_t tuple, svint16_t x) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svset2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_s3211svint32x2_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32x2_t test_svset2_s32(svint32x2_t tuple, svint32_t x) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svset2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_s6411svint64x2_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64x2_t test_svset2_s64(svint64x2_t tuple, svint64_t x) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svset2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svset2_u811svuint8x2_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x2_t test_svset2_u8(svuint8x2_t tuple, svuint8_t x) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svset2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_u1612svuint16x2_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16x2_t test_svset2_u16(svuint16x2_t tuple, svuint16_t x) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svset2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_u3212svuint32x2_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32x2_t test_svset2_u32(svuint32x2_t tuple, svuint32_t x) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svset2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_u6412svuint64x2_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64x2_t test_svset2_u64(svuint64x2_t tuple, svuint64_t x) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svset2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_f1613svfloat16x2_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16x2_t test_svset2_f16(svfloat16x2_t tuple, svfloat16_t x) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svset2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8f32.nxv4f32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f32.nxv4f32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_f3213svfloat32x2_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8f32.nxv4f32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f32.nxv4f32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32x2_t test_svset2_f32(svfloat32x2_t tuple, svfloat32_t x) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svset2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv4f64.nxv2f64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4f64.nxv2f64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset2_f6413svfloat64x2_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv4f64.nxv2f64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4f64.nxv2f64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64x2_t test_svset2_f64(svfloat64x2_t tuple, svfloat64_t x) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c @@ -18,12 +18,12 @@ // CHECK-LABEL: @test_svset3_bf16_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset3_bf16_014svbfloat16x3_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x3_t test_svset3_bf16_0(svbfloat16x3_t tuple, svbfloat16_t x) @@ -33,12 +33,12 @@ // CHECK-LABEL: @test_svset3_bf16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset3_bf16_114svbfloat16x3_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x3_t test_svset3_bf16_1(svbfloat16x3_t tuple, svbfloat16_t x) @@ -48,12 +48,12 @@ // CHECK-LABEL: @test_svset3_bf16_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset3_bf16_214svbfloat16x3_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x3_t test_svset3_bf16_2(svbfloat16x3_t tuple, svbfloat16_t x) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c @@ -20,12 +20,12 @@ // several parameters, one for each member of the original struct. // CHECK-LABEL: @test_svset3_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svset3_s810svint8x3_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x3_t test_svset3_s8(svint8x3_t tuple, svint8_t x) @@ -35,12 +35,12 @@ // CHECK-LABEL: @test_svset3_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_s1611svint16x3_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16x3_t test_svset3_s16(svint16x3_t tuple, svint16_t x) @@ -50,12 +50,12 @@ // CHECK-LABEL: @test_svset3_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_s3211svint32x3_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32x3_t test_svset3_s32(svint32x3_t tuple, svint32_t x) @@ -65,12 +65,12 @@ // CHECK-LABEL: @test_svset3_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_s6411svint64x3_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64x3_t test_svset3_s64(svint64x3_t tuple, svint64_t x) @@ -80,12 +80,12 @@ // CHECK-LABEL: @test_svset3_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svset3_u811svuint8x3_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x3_t test_svset3_u8(svuint8x3_t tuple, svuint8_t x) @@ -95,12 +95,12 @@ // CHECK-LABEL: @test_svset3_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_u1612svuint16x3_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16x3_t test_svset3_u16(svuint16x3_t tuple, svuint16_t x) @@ -110,12 +110,12 @@ // CHECK-LABEL: @test_svset3_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_u3212svuint32x3_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32x3_t test_svset3_u32(svuint32x3_t tuple, svuint32_t x) @@ -125,12 +125,12 @@ // CHECK-LABEL: @test_svset3_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_u6412svuint64x3_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64x3_t test_svset3_u64(svuint64x3_t tuple, svuint64_t x) @@ -140,12 +140,12 @@ // CHECK-LABEL: @test_svset3_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24f16.nxv8f16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24f16.nxv8f16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_f1613svfloat16x3_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv24f16.nxv8f16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24f16.nxv8f16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16x3_t test_svset3_f16(svfloat16x3_t tuple, svfloat16_t x) @@ -155,12 +155,12 @@ // CHECK-LABEL: @test_svset3_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv12f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_f3213svfloat32x3_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv12f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32x3_t test_svset3_f32(svfloat32x3_t tuple, svfloat32_t x) @@ -170,12 +170,12 @@ // CHECK-LABEL: @test_svset3_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv6f64.nxv2f64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6f64.nxv2f64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset3_f6413svfloat64x3_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv6f64.nxv2f64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6f64.nxv2f64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64x3_t test_svset3_f64(svfloat64x3_t tuple, svfloat64_t x) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c @@ -18,12 +18,12 @@ // CHECK-LABEL: @test_svset4_bf16_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset4_bf16_014svbfloat16x4_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x4_t test_svset4_bf16_0(svbfloat16x4_t tuple, svbfloat16_t x) @@ -33,12 +33,12 @@ // CHECK-LABEL: @test_svset4_bf16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset4_bf16_114svbfloat16x4_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x4_t test_svset4_bf16_1(svbfloat16x4_t tuple, svbfloat16_t x) @@ -48,12 +48,12 @@ // CHECK-LABEL: @test_svset4_bf16_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset4_bf16_214svbfloat16x4_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x4_t test_svset4_bf16_2(svbfloat16x4_t tuple, svbfloat16_t x) @@ -63,12 +63,12 @@ // CHECK-LABEL: @test_svset4_bf16_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svset4_bf16_314svbfloat16x4_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16x4_t test_svset4_bf16_3(svbfloat16x4_t tuple, svbfloat16_t x) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c @@ -18,12 +18,12 @@ // CHECK-LABEL: @test_svset4_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svset4_s810svint8x4_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8x4_t test_svset4_s8(svint8x4_t tuple, svint8_t x) @@ -33,12 +33,12 @@ // CHECK-LABEL: @test_svset4_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_s1611svint16x4_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16x4_t test_svset4_s16(svint16x4_t tuple, svint16_t x) @@ -48,12 +48,12 @@ // CHECK-LABEL: @test_svset4_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_s3211svint32x4_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32x4_t test_svset4_s32(svint32x4_t tuple, svint32_t x) @@ -63,12 +63,12 @@ // CHECK-LABEL: @test_svset4_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_s6411svint64x4_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64x4_t test_svset4_s64(svint64x4_t tuple, svint64_t x) @@ -78,12 +78,12 @@ // CHECK-LABEL: @test_svset4_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svset4_u811svuint8x4_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8x4_t test_svset4_u8(svuint8x4_t tuple, svuint8_t x) @@ -93,12 +93,12 @@ // CHECK-LABEL: @test_svset4_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_u1612svuint16x4_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16x4_t test_svset4_u16(svuint16x4_t tuple, svuint16_t x) @@ -108,12 +108,12 @@ // CHECK-LABEL: @test_svset4_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_u3212svuint32x4_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32x4_t test_svset4_u32(svuint32x4_t tuple, svuint32_t x) @@ -123,12 +123,12 @@ // CHECK-LABEL: @test_svset4_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_u6412svuint64x4_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64x4_t test_svset4_u64(svuint64x4_t tuple, svuint64_t x) @@ -138,12 +138,12 @@ // CHECK-LABEL: @test_svset4_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_f1613svfloat16x4_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv32f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16x4_t test_svset4_f16(svfloat16x4_t tuple, svfloat16_t x) @@ -153,12 +153,12 @@ // CHECK-LABEL: @test_svset4_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_f3213svfloat32x4_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv16f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32x4_t test_svset4_f32(svfloat32x4_t tuple, svfloat32_t x) @@ -168,12 +168,12 @@ // CHECK-LABEL: @test_svset4_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8f64.nxv2f64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f64.nxv2f64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svset4_f6413svfloat64x4_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.set.nxv8f64.nxv2f64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f64.nxv2f64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64x4_t test_svset4_f64(svfloat64x4_t tuple, svfloat64_t x) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svsetffr( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.setffr() +// CHECK-NEXT: call void @llvm.aarch64.sve.setffr() // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svsetffrv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.setffr() +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.setffr() // CPP-CHECK-NEXT: ret void // void test_svsetffr() diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svsplice_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsplice_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svsplice_bf16(svbool_t pg, svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svsplice_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsplice_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsplice_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svsplice_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsplice_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svsplice_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsplice_s32(svbool_t pg, svint32_t op1, svint32_t op2) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svsplice_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsplice_s64(svbool_t pg, svint64_t op1, svint64_t op2) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svsplice_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsplice_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsplice_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svsplice_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsplice_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svsplice_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsplice_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svsplice_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsplice_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svsplice_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsplice_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svsplice_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsplice_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svsplice_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsplice_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.splice.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsplice_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svsqrt_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsqrt_f16_z(svbool_t pg, svfloat16_t op) @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svsqrt_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsqrt_f32_z(svbool_t pg, svfloat32_t op) @@ -50,14 +50,14 @@ // CHECK-LABEL: @test_svsqrt_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsqrt_f64_z(svbool_t pg, svfloat64_t op) @@ -67,14 +67,14 @@ // CHECK-LABEL: @test_svsqrt_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsqrt_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) @@ -84,14 +84,14 @@ // CHECK-LABEL: @test_svsqrt_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsqrt_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) @@ -101,14 +101,14 @@ // CHECK-LABEL: @test_svsqrt_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsqrt_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) @@ -118,14 +118,14 @@ // CHECK-LABEL: @test_svsqrt_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsqrt_f16_x(svbool_t pg, svfloat16_t op) @@ -135,14 +135,14 @@ // CHECK-LABEL: @test_svsqrt_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsqrt_f32_x(svbool_t pg, svfloat32_t op) @@ -152,14 +152,14 @@ // CHECK-LABEL: @test_svsqrt_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqrt_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsqrt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsqrt_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c @@ -17,16 +17,16 @@ // CHECK-LABEL: @test_svst1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z15test_svst1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_bf16(svbool_t pg, bfloat16_t *base, svbfloat16_t data) @@ -36,20 +36,20 @@ // CHECK-LABEL: @test_svst1_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z20test_svst1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8bf16.p0nxv8bf16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svst1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst1_s8u10__SVBool_tPau10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_s8(svbool_t pg, int8_t *base, svint8_t data) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svst1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA9:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_s16u10__SVBool_tPsu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA9:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_s16(svbool_t pg, int16_t *base, svint16_t data) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svst1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA11:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_s32u10__SVBool_tPiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA11:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_s32(svbool_t pg, int32_t *base, svint32_t data) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svst1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA13:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_s64u10__SVBool_tPlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA13:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_s64(svbool_t pg, int64_t *base, svint64_t data) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svst1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst1_u8u10__SVBool_tPhu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP0]], i32 1, [[PG:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_u8(svbool_t pg, uint8_t *base, svuint8_t data) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svst1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA9]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_u16u10__SVBool_tPtu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_u16(svbool_t pg, uint16_t *base, svuint16_t data) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svst1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA11]] +// CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_u32u10__SVBool_tPju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_u32(svbool_t pg, uint32_t *base, svuint32_t data) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svst1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA13]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_u64u10__SVBool_tPmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_u64(svbool_t pg, uint64_t *base, svuint64_t data) @@ -164,16 +164,16 @@ // CHECK-LABEL: @test_svst1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA15:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_f16u10__SVBool_tPDhu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA15:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_f16(svbool_t pg, float16_t *base, svfloat16_t data) @@ -183,16 +183,16 @@ // CHECK-LABEL: @test_svst1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA17:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_f32u10__SVBool_tPfu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA17:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_f32(svbool_t pg, float32_t *base, svfloat32_t data) @@ -202,16 +202,16 @@ // CHECK-LABEL: @test_svst1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA19:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst1_f64u10__SVBool_tPdu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]), !tbaa [[TBAA19:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP1]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_f64(svbool_t pg, float64_t *base, svfloat64_t data) @@ -224,7 +224,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( @@ -232,7 +232,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8_t data) @@ -242,20 +242,20 @@ // CHECK-LABEL: @test_svst1_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA9]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16_t data) @@ -265,20 +265,20 @@ // CHECK-LABEL: @test_svst1_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA11]] +// CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32_t data) @@ -288,20 +288,20 @@ // CHECK-LABEL: @test_svst1_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA13]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64_t data) @@ -314,7 +314,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( @@ -322,7 +322,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv16i8.p0nxv16i8( [[DATA:%.*]], * [[TMP2]], i32 1, [[PG:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8_t data) @@ -332,20 +332,20 @@ // CHECK-LABEL: @test_svst1_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA9]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i16* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8i16.p0nxv8i16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16_t data) @@ -355,20 +355,20 @@ // CHECK-LABEL: @test_svst1_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA11]] +// CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32_t data) @@ -378,20 +378,20 @@ // CHECK-LABEL: @test_svst1_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA13]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast i64* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv2i64.p0nxv2i64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64_t data) @@ -401,20 +401,20 @@ // CHECK-LABEL: @test_svst1_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast half* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA15]] +// CHECK-NEXT: call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast half* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA15]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv8f16.p0nxv8f16( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16_t data) @@ -424,20 +424,20 @@ // CHECK-LABEL: @test_svst1_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA17]] +// CHECK-NEXT: call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA17]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv4f32.p0nxv4f32( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32_t data) @@ -447,20 +447,20 @@ // CHECK-LABEL: @test_svst1_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA19]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[TMP2]] to * -// CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]), !tbaa [[TBAA19]] +// CPP-CHECK-NEXT: call void @llvm.masked.store.nxv2f64.p0nxv2f64( [[DATA:%.*]], * [[TMP3]], i32 1, [[TMP0]]) // CPP-CHECK-NEXT: ret void // void test_svst1_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64_t data) @@ -470,14 +470,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) @@ -487,14 +487,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) @@ -504,14 +504,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) @@ -521,14 +521,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) @@ -538,14 +538,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_f32u10__SVBool_tu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_f32(svbool_t pg, svuint32_t bases, svfloat32_t data) @@ -555,14 +555,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_f64u10__SVBool_tu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_f64(svbool_t pg, svuint64_t bases, svfloat64_t data) @@ -572,14 +572,14 @@ // CHECK-LABEL: @test_svst1_scatter_s32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s32offset_s32(svbool_t pg, int32_t *base, svint32_t offsets, svint32_t data) @@ -589,14 +589,14 @@ // CHECK-LABEL: @test_svst1_scatter_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s64offset_s64(svbool_t pg, int64_t *base, svint64_t offsets, svint64_t data) @@ -606,14 +606,14 @@ // CHECK-LABEL: @test_svst1_scatter_s32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s32offset_u32(svbool_t pg, uint32_t *base, svint32_t offsets, svuint32_t data) @@ -623,14 +623,14 @@ // CHECK-LABEL: @test_svst1_scatter_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s64offset_u64(svbool_t pg, uint64_t *base, svint64_t offsets, svuint64_t data) @@ -640,14 +640,14 @@ // CHECK-LABEL: @test_svst1_scatter_s32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s32offset_f32(svbool_t pg, float32_t *base, svint32_t offsets, svfloat32_t data) @@ -657,14 +657,14 @@ // CHECK-LABEL: @test_svst1_scatter_s64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s64offset_f64(svbool_t pg, float64_t *base, svint64_t offsets, svfloat64_t data) @@ -674,14 +674,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32offset_s32(svbool_t pg, int32_t *base, svuint32_t offsets, svint32_t data) @@ -691,14 +691,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64offset_s64(svbool_t pg, int64_t *base, svuint64_t offsets, svint64_t data) @@ -708,14 +708,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32offset_u32(svbool_t pg, uint32_t *base, svuint32_t offsets, svuint32_t data) @@ -725,14 +725,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64offset_u64(svbool_t pg, uint64_t *base, svuint64_t offsets, svuint64_t data) @@ -742,14 +742,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32offset_f32(svbool_t pg, float32_t *base, svuint32_t offsets, svfloat32_t data) @@ -759,14 +759,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64offset_f64(svbool_t pg, float64_t *base, svuint64_t offsets, svfloat64_t data) @@ -776,14 +776,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) @@ -793,14 +793,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) @@ -810,14 +810,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) @@ -827,14 +827,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) @@ -844,14 +844,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset, svfloat32_t data) @@ -861,14 +861,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset, svfloat64_t data) @@ -878,14 +878,14 @@ // CHECK-LABEL: @test_svst1_scatter_s32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s32index_s32(svbool_t pg, int32_t *base, svint32_t indices, svint32_t data) @@ -895,14 +895,14 @@ // CHECK-LABEL: @test_svst1_scatter_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s64index_s64(svbool_t pg, int64_t *base, svint64_t indices, svint64_t data) @@ -912,14 +912,14 @@ // CHECK-LABEL: @test_svst1_scatter_s32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s32index_u32(svbool_t pg, uint32_t *base, svint32_t indices, svuint32_t data) @@ -929,14 +929,14 @@ // CHECK-LABEL: @test_svst1_scatter_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s64index_u64(svbool_t pg, uint64_t *base, svint64_t indices, svuint64_t data) @@ -946,14 +946,14 @@ // CHECK-LABEL: @test_svst1_scatter_s32index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s32index_f32(svbool_t pg, float32_t *base, svint32_t indices, svfloat32_t data) @@ -963,14 +963,14 @@ // CHECK-LABEL: @test_svst1_scatter_s64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_s64index_f64(svbool_t pg, float64_t *base, svint64_t indices, svfloat64_t data) @@ -980,14 +980,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32index_s32(svbool_t pg, int32_t *base, svuint32_t indices, svint32_t data) @@ -997,14 +997,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64index_s64(svbool_t pg, int64_t *base, svuint64_t indices, svint64_t data) @@ -1014,14 +1014,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32index_u32(svbool_t pg, uint32_t *base, svuint32_t indices, svuint32_t data) @@ -1031,14 +1031,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64index_u64(svbool_t pg, uint64_t *base, svuint64_t indices, svuint64_t data) @@ -1048,14 +1048,14 @@ // CHECK-LABEL: @test_svst1_scatter_u32index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32index_f32(svbool_t pg, float32_t *base, svuint32_t indices, svfloat32_t data) @@ -1065,14 +1065,14 @@ // CHECK-LABEL: @test_svst1_scatter_u64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64index_f64(svbool_t pg, float64_t *base, svuint64_t indices, svfloat64_t data) @@ -1082,16 +1082,16 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) @@ -1101,16 +1101,16 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) @@ -1120,16 +1120,16 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) @@ -1139,16 +1139,16 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) @@ -1158,16 +1158,16 @@ // CHECK-LABEL: @test_svst1_scatter_u32base_index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index, svfloat32_t data) @@ -1177,16 +1177,16 @@ // CHECK-LABEL: @test_svst1_scatter_u64base_index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst1_scatter_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index, svfloat64_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c @@ -14,7 +14,7 @@ // CHECK-LABEL: @test_svst1b_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv8i8.p0nxv8i8( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -27,7 +27,7 @@ // CHECK-LABEL: @test_svst1b_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv4i8.p0nxv4i8( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -40,7 +40,7 @@ // CHECK-LABEL: @test_svst1b_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv2i8.p0nxv2i8( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -53,7 +53,7 @@ // CHECK-LABEL: @test_svst1b_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv8i8.p0nxv8i8( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -66,7 +66,7 @@ // CHECK-LABEL: @test_svst1b_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv4i8.p0nxv4i8( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -79,7 +79,7 @@ // CHECK-LABEL: @test_svst1b_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv2i8.p0nxv2i8( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -92,7 +92,7 @@ // CHECK-LABEL: @test_svst1b_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -107,7 +107,7 @@ // CHECK-LABEL: @test_svst1b_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -122,7 +122,7 @@ // CHECK-LABEL: @test_svst1b_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -137,7 +137,7 @@ // CHECK-LABEL: @test_svst1b_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -152,7 +152,7 @@ // CHECK-LABEL: @test_svst1b_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -167,7 +167,7 @@ // CHECK-LABEL: @test_svst1b_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -183,7 +183,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -195,7 +195,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -207,7 +207,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -219,7 +219,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -231,7 +231,7 @@ // CHECK-LABEL: @test_svst1b_scatter_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -243,7 +243,7 @@ // CHECK-LABEL: @test_svst1b_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -255,7 +255,7 @@ // CHECK-LABEL: @test_svst1b_scatter_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -267,7 +267,7 @@ // CHECK-LABEL: @test_svst1b_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -279,7 +279,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -291,7 +291,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -303,7 +303,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -315,7 +315,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -327,7 +327,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // @@ -339,7 +339,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // @@ -351,7 +351,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // @@ -363,7 +363,7 @@ // CHECK-LABEL: @test_svst1b_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c @@ -14,7 +14,7 @@ // CHECK-LABEL: @test_svst1h_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv4i16.p0nxv4i16( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -27,7 +27,7 @@ // CHECK-LABEL: @test_svst1h_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv2i16.p0nxv2i16( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -40,7 +40,7 @@ // CHECK-LABEL: @test_svst1h_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv4i16.p0nxv4i16( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -53,7 +53,7 @@ // CHECK-LABEL: @test_svst1h_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: call void @llvm.masked.store.nxv2i16.p0nxv2i16( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) @@ -66,7 +66,7 @@ // CHECK-LABEL: @test_svst1h_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -81,7 +81,7 @@ // CHECK-LABEL: @test_svst1h_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -96,7 +96,7 @@ // CHECK-LABEL: @test_svst1h_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -111,7 +111,7 @@ // CHECK-LABEL: @test_svst1h_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 @@ -127,7 +127,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -139,7 +139,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -151,7 +151,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -163,7 +163,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // @@ -175,7 +175,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -187,7 +187,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -199,7 +199,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -211,7 +211,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -223,7 +223,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -235,7 +235,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -247,7 +247,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -259,7 +259,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // @@ -271,7 +271,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // @@ -283,7 +283,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // @@ -295,7 +295,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // @@ -307,7 +307,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // @@ -319,7 +319,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -331,7 +331,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -343,7 +343,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -355,7 +355,7 @@ // CHECK-LABEL: @test_svst1h_scatter_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -367,7 +367,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -379,7 +379,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -391,7 +391,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -403,7 +403,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // @@ -415,7 +415,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void @@ -428,7 +428,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void @@ -441,7 +441,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void @@ -454,7 +454,7 @@ // CHECK-LABEL: @test_svst1h_scatter_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 // CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c @@ -14,10 +14,10 @@ // CHECK-LABEL: @test_svst1w_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // void test_svst1w_s64(svbool_t pg, int32_t *base, svint64_t data) @@ -27,10 +27,10 @@ // CHECK-LABEL: @test_svst1w_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP1]], * [[TMP2]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // void test_svst1w_u64(svbool_t pg, uint32_t *base, svuint64_t data) @@ -40,12 +40,12 @@ // CHECK-LABEL: @test_svst1w_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP2]], * [[TMP4]], i32 1, [[TMP0]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP2]], * [[TMP4]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // void test_svst1w_vnum_s64(svbool_t pg, int32_t *base, int64_t vnum, svint64_t data) @@ -55,12 +55,12 @@ // CHECK-LABEL: @test_svst1w_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP3:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 // CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to * -// CHECK-NEXT: tail call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP2]], * [[TMP4]], i32 1, [[TMP0]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.masked.store.nxv2i32.p0nxv2i32( [[TMP2]], * [[TMP4]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // void test_svst1w_vnum_u64(svbool_t pg, uint32_t *base, int64_t vnum, svuint64_t data) @@ -71,8 +71,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) @@ -83,8 +83,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) @@ -95,8 +95,8 @@ // CHECK-LABEL: @test_svst1w_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_s64offset_s64(svbool_t pg, int32_t *base, svint64_t offsets, svint64_t data) @@ -107,8 +107,8 @@ // CHECK-LABEL: @test_svst1w_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_s64offset_u64(svbool_t pg, uint32_t *base, svint64_t offsets, svuint64_t data) @@ -119,8 +119,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64offset_s64(svbool_t pg, int32_t *base, svuint64_t offsets, svint64_t data) @@ -131,8 +131,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64offset_u64(svbool_t pg, uint32_t *base, svuint64_t offsets, svuint64_t data) @@ -143,8 +143,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) @@ -155,8 +155,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) @@ -167,8 +167,8 @@ // CHECK-LABEL: @test_svst1w_scatter_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_s64index_s64(svbool_t pg, int32_t *base, svint64_t indices, svint64_t data) @@ -179,8 +179,8 @@ // CHECK-LABEL: @test_svst1w_scatter_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_s64index_u64(svbool_t pg, uint32_t *base, svint64_t indices, svuint64_t data) @@ -191,8 +191,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64index_s64(svbool_t pg, int32_t *base, svuint64_t indices, svint64_t data) @@ -203,8 +203,8 @@ // CHECK-LABEL: @test_svst1w_scatter_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64index_u64(svbool_t pg, uint32_t *base, svuint64_t indices, svuint64_t data) @@ -215,9 +215,9 @@ // CHECK-LABEL: @test_svst1w_scatter_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) @@ -228,9 +228,9 @@ // CHECK-LABEL: @test_svst1w_scatter_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // void test_svst1w_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c @@ -16,18 +16,18 @@ #endif // CHECK-LABEL: @test_svst2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z15test_svst2_bf16u10__SVBool_tPu6__bf1614svbfloat16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x2_t data) @@ -37,22 +37,22 @@ // CHECK-LABEL: @test_svst2_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z20test_svst2_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16x2_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svst2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst2_s8u10__SVBool_tPa10svint8x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_s8(svbool_t pg, int8_t *base, svint8x2_t data) @@ -35,18 +35,18 @@ // CHECK-LABEL: @test_svst2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_s16u10__SVBool_tPs11svint16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_s16(svbool_t pg, int16_t *base, svint16x2_t data) @@ -56,18 +56,18 @@ // CHECK-LABEL: @test_svst2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_s32u10__SVBool_tPi11svint32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_s32(svbool_t pg, int32_t *base, svint32x2_t data) @@ -77,18 +77,18 @@ // CHECK-LABEL: @test_svst2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_s64u10__SVBool_tPl11svint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_s64(svbool_t pg, int64_t *base, svint64x2_t data) @@ -98,16 +98,16 @@ // CHECK-LABEL: @test_svst2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst2_u8u10__SVBool_tPh11svuint8x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_u8(svbool_t pg, uint8_t *base, svuint8x2_t data) @@ -117,18 +117,18 @@ // CHECK-LABEL: @test_svst2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_u16u10__SVBool_tPt12svuint16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_u16(svbool_t pg, uint16_t *base, svuint16x2_t data) @@ -138,18 +138,18 @@ // CHECK-LABEL: @test_svst2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_u32u10__SVBool_tPj12svuint32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_u32(svbool_t pg, uint32_t *base, svuint32x2_t data) @@ -159,18 +159,18 @@ // CHECK-LABEL: @test_svst2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_u64u10__SVBool_tPm12svuint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_u64(svbool_t pg, uint64_t *base, svuint64x2_t data) @@ -180,18 +180,18 @@ // CHECK-LABEL: @test_svst2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP1]], [[TMP2]], [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP1]], [[TMP2]], [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_f16u10__SVBool_tPDh13svfloat16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP1]], [[TMP2]], [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP1]], [[TMP2]], [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_f16(svbool_t pg, float16_t *base, svfloat16x2_t data) @@ -201,18 +201,18 @@ // CHECK-LABEL: @test_svst2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP1]], [[TMP2]], [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP1]], [[TMP2]], [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_f32u10__SVBool_tPf13svfloat32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP1]], [[TMP2]], [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP1]], [[TMP2]], [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_f32(svbool_t pg, float32_t *base, svfloat32x2_t data) @@ -222,18 +222,18 @@ // CHECK-LABEL: @test_svst2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP1]], [[TMP2]], [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP1]], [[TMP2]], [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst2_f64u10__SVBool_tPd13svfloat64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP1]], [[TMP2]], [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP1]], [[TMP2]], [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst2_f64(svbool_t pg, float64_t *base, svfloat64x2_t data) @@ -245,18 +245,18 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst2_vnum_s8u10__SVBool_tPal10svint8x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x2_t data) @@ -266,22 +266,22 @@ // CHECK-LABEL: @test_svst2_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s16u10__SVBool_tPsl11svint16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x2_t data) @@ -291,22 +291,22 @@ // CHECK-LABEL: @test_svst2_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s32u10__SVBool_tPil11svint32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x2_t data) @@ -316,22 +316,22 @@ // CHECK-LABEL: @test_svst2_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s64u10__SVBool_tPll11svint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x2_t data) @@ -343,18 +343,18 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst2_vnum_u8u10__SVBool_tPhl11svuint8x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x2_t data) @@ -364,22 +364,22 @@ // CHECK-LABEL: @test_svst2_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u16u10__SVBool_tPtl12svuint16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x2_t data) @@ -389,22 +389,22 @@ // CHECK-LABEL: @test_svst2_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u32u10__SVBool_tPjl12svuint32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x2_t data) @@ -414,22 +414,22 @@ // CHECK-LABEL: @test_svst2_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u64u10__SVBool_tPml12svuint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x2_t data) @@ -439,22 +439,22 @@ // CHECK-LABEL: @test_svst2_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP3]], [[TMP4]], [[TMP0]], half* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP3]], [[TMP4]], [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f16u10__SVBool_tPDhl13svfloat16x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP3]], [[TMP4]], [[TMP0]], half* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP3]], [[TMP4]], [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x2_t data) @@ -464,22 +464,22 @@ // CHECK-LABEL: @test_svst2_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP3]], [[TMP4]], [[TMP0]], float* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP3]], [[TMP4]], [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f32u10__SVBool_tPfl13svfloat32x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP3]], [[TMP4]], [[TMP0]], float* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP3]], [[TMP4]], [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x2_t data) @@ -489,22 +489,22 @@ // CHECK-LABEL: @test_svst2_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP3]], [[TMP4]], [[TMP0]], double* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) +// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP3]], [[TMP4]], [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f64u10__SVBool_tPdl13svfloat64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP3]], [[TMP4]], [[TMP0]], double* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP3]], [[TMP4]], [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst2_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64x2_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c @@ -17,20 +17,20 @@ // CHECK-LABEL: @test_svst3_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z15test_svst3_bf16u10__SVBool_tPu6__bf1614svbfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x3_t data) @@ -40,24 +40,24 @@ // CHECK-LABEL: @test_svst3_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], bfloat* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z20test_svst3_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], bfloat* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16x3_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c @@ -16,18 +16,18 @@ // CHECK-LABEL: @test_svst3_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst3_s8u10__SVBool_tPa10svint8x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_s8(svbool_t pg, int8_t *base, svint8x3_t data) @@ -37,20 +37,20 @@ // CHECK-LABEL: @test_svst3_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_s16u10__SVBool_tPs11svint16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_s16(svbool_t pg, int16_t *base, svint16x3_t data) @@ -60,20 +60,20 @@ // CHECK-LABEL: @test_svst3_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_s32u10__SVBool_tPi11svint32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_s32(svbool_t pg, int32_t *base, svint32x3_t data) @@ -83,20 +83,20 @@ // CHECK-LABEL: @test_svst3_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_s64u10__SVBool_tPl11svint64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_s64(svbool_t pg, int64_t *base, svint64x3_t data) @@ -106,18 +106,18 @@ // CHECK-LABEL: @test_svst3_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst3_u8u10__SVBool_tPh11svuint8x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_u8(svbool_t pg, uint8_t *base, svuint8x3_t data) @@ -127,20 +127,20 @@ // CHECK-LABEL: @test_svst3_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_u16u10__SVBool_tPt12svuint16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_u16(svbool_t pg, uint16_t *base, svuint16x3_t data) @@ -150,20 +150,20 @@ // CHECK-LABEL: @test_svst3_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_u32u10__SVBool_tPj12svuint32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_u32(svbool_t pg, uint32_t *base, svuint32x3_t data) @@ -173,20 +173,20 @@ // CHECK-LABEL: @test_svst3_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_u64u10__SVBool_tPm12svuint64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_u64(svbool_t pg, uint64_t *base, svuint64x3_t data) @@ -196,20 +196,20 @@ // CHECK-LABEL: @test_svst3_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_f16u10__SVBool_tPDh13svfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_f16(svbool_t pg, float16_t *base, svfloat16x3_t data) @@ -219,20 +219,20 @@ // CHECK-LABEL: @test_svst3_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_f32u10__SVBool_tPf13svfloat32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_f32(svbool_t pg, float32_t *base, svfloat32x3_t data) @@ -242,20 +242,20 @@ // CHECK-LABEL: @test_svst3_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst3_f64u10__SVBool_tPd13svfloat64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst3_f64(svbool_t pg, float64_t *base, svfloat64x3_t data) @@ -267,20 +267,20 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst3_vnum_s8u10__SVBool_tPal10svint8x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x3_t data) @@ -290,24 +290,24 @@ // CHECK-LABEL: @test_svst3_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s16u10__SVBool_tPsl11svint16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x3_t data) @@ -317,24 +317,24 @@ // CHECK-LABEL: @test_svst3_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s32u10__SVBool_tPil11svint32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x3_t data) @@ -344,24 +344,24 @@ // CHECK-LABEL: @test_svst3_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s64u10__SVBool_tPll11svint64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x3_t data) @@ -373,20 +373,20 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst3_vnum_u8u10__SVBool_tPhl11svuint8x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x3_t data) @@ -396,24 +396,24 @@ // CHECK-LABEL: @test_svst3_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u16u10__SVBool_tPtl12svuint16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x3_t data) @@ -423,24 +423,24 @@ // CHECK-LABEL: @test_svst3_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u32u10__SVBool_tPjl12svuint32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x3_t data) @@ -450,24 +450,24 @@ // CHECK-LABEL: @test_svst3_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u64u10__SVBool_tPml12svuint64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x3_t data) @@ -477,24 +477,24 @@ // CHECK-LABEL: @test_svst3_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], half* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f16u10__SVBool_tPDhl13svfloat16x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], half* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x3_t data) @@ -504,24 +504,24 @@ // CHECK-LABEL: @test_svst3_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], float* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f32u10__SVBool_tPfl13svfloat32x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], float* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x3_t data) @@ -531,24 +531,24 @@ // CHECK-LABEL: @test_svst3_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], double* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) +// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f64u10__SVBool_tPdl13svfloat64x3_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], double* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst3_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64x3_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c @@ -17,22 +17,22 @@ // CHECK-LABEL: @test_svst4_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z15test_svst4_bf16u10__SVBool_tPu6__bf1614svbfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x4_t data) @@ -42,26 +42,26 @@ // CHECK-LABEL: @test_svst4_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], bfloat* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z20test_svst4_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], bfloat* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16x4_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c @@ -16,20 +16,20 @@ // CHECK-LABEL: @test_svst4_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst4_s8u10__SVBool_tPa10svint8x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_s8(svbool_t pg, int8_t *base, svint8x4_t data) @@ -39,22 +39,22 @@ // CHECK-LABEL: @test_svst4_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_s16u10__SVBool_tPs11svint16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_s16(svbool_t pg, int16_t *base, svint16x4_t data) @@ -64,22 +64,22 @@ // CHECK-LABEL: @test_svst4_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_s32u10__SVBool_tPi11svint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_s32(svbool_t pg, int32_t *base, svint32x4_t data) @@ -89,22 +89,22 @@ // CHECK-LABEL: @test_svst4_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_s64u10__SVBool_tPl11svint64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_s64(svbool_t pg, int64_t *base, svint64x4_t data) @@ -114,20 +114,20 @@ // CHECK-LABEL: @test_svst4_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svst4_u8u10__SVBool_tPh11svuint8x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_u8(svbool_t pg, uint8_t *base, svuint8x4_t data) @@ -137,22 +137,22 @@ // CHECK-LABEL: @test_svst4_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_u16u10__SVBool_tPt12svuint16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_u16(svbool_t pg, uint16_t *base, svuint16x4_t data) @@ -162,22 +162,22 @@ // CHECK-LABEL: @test_svst4_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_u32u10__SVBool_tPj12svuint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_u32(svbool_t pg, uint32_t *base, svuint32x4_t data) @@ -187,22 +187,22 @@ // CHECK-LABEL: @test_svst4_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_u64u10__SVBool_tPm12svuint64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_u64(svbool_t pg, uint64_t *base, svuint64x4_t data) @@ -212,22 +212,22 @@ // CHECK-LABEL: @test_svst4_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], half* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_f16u10__SVBool_tPDh13svfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], half* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_f16(svbool_t pg, float16_t *base, svfloat16x4_t data) @@ -237,22 +237,22 @@ // CHECK-LABEL: @test_svst4_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], float* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_f32u10__SVBool_tPf13svfloat32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], float* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_f32(svbool_t pg, float32_t *base, svfloat32x4_t data) @@ -262,22 +262,22 @@ // CHECK-LABEL: @test_svst4_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], double* [[BASE:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z14test_svst4_f64u10__SVBool_tPd13svfloat64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], double* [[BASE:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svst4_f64(svbool_t pg, float64_t *base, svfloat64x4_t data) @@ -289,22 +289,22 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst4_vnum_s8u10__SVBool_tPal10svint8x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x4_t data) @@ -314,26 +314,26 @@ // CHECK-LABEL: @test_svst4_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s16u10__SVBool_tPsl11svint16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x4_t data) @@ -343,26 +343,26 @@ // CHECK-LABEL: @test_svst4_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s32u10__SVBool_tPil11svint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x4_t data) @@ -372,26 +372,26 @@ // CHECK-LABEL: @test_svst4_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s64u10__SVBool_tPll11svint64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x4_t data) @@ -403,22 +403,22 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z18test_svst4_vnum_u8u10__SVBool_tPhl11svuint8x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x4_t data) @@ -428,26 +428,26 @@ // CHECK-LABEL: @test_svst4_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u16u10__SVBool_tPtl12svuint16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x4_t data) @@ -457,26 +457,26 @@ // CHECK-LABEL: @test_svst4_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u32u10__SVBool_tPjl12svuint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x4_t data) @@ -486,26 +486,26 @@ // CHECK-LABEL: @test_svst4_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u64u10__SVBool_tPml12svuint64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x4_t data) @@ -515,26 +515,26 @@ // CHECK-LABEL: @test_svst4_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], half* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f16u10__SVBool_tPDhl13svfloat16x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], half* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x4_t data) @@ -544,26 +544,26 @@ // CHECK-LABEL: @test_svst4_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], float* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f32u10__SVBool_tPfl13svfloat32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], float* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x4_t data) @@ -573,26 +573,26 @@ // CHECK-LABEL: @test_svst4_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], double* [[TMP2]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) +// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f64u10__SVBool_tPdl13svfloat64x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], double* [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svst4_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64x4_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svstnt1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z17test_svstnt1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_bf16(svbool_t pg, bfloat16_t *base, svbfloat16_t data) @@ -34,18 +34,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z22test_svstnt1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svstnt1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z15test_svstnt1_s8u10__SVBool_tPau10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6:![0-9]+]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_s8(svbool_t pg, int8_t *base, svint8_t data) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svstnt1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_s16u10__SVBool_tPsu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_s16(svbool_t pg, int16_t *base, svint16_t data) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svstnt1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_s32u10__SVBool_tPiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_s32(svbool_t pg, int32_t *base, svint32_t data) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svstnt1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_s64u10__SVBool_tPlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_s64(svbool_t pg, int64_t *base, svint64_t data) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svstnt1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z15test_svstnt1_u8u10__SVBool_tPhu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_u8(svbool_t pg, uint8_t *base, svuint8_t data) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svstnt1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_u16u10__SVBool_tPtu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_u16(svbool_t pg, uint16_t *base, svuint16_t data) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svstnt1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_u32u10__SVBool_tPju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_u32(svbool_t pg, uint32_t *base, svuint32_t data) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svstnt1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_u64u10__SVBool_tPmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_u64(svbool_t pg, uint64_t *base, svuint64_t data) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svstnt1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_f16u10__SVBool_tPDhu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]), !tbaa [[TBAA15:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_f16(svbool_t pg, float16_t *base, svfloat16_t data) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svstnt1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_f32u10__SVBool_tPfu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]), !tbaa [[TBAA17:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_f32(svbool_t pg, float32_t *base, svfloat32_t data) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svstnt1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svstnt1_f64u10__SVBool_tPdu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]), !tbaa [[TBAA19:![0-9]+]] +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_f64(svbool_t pg, float64_t *base, svfloat64_t data) @@ -202,14 +202,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z20test_svstnt1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8_t data) @@ -219,18 +219,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16_t data) @@ -240,18 +240,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32_t data) @@ -261,18 +261,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64_t data) @@ -284,14 +284,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z20test_svstnt1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]), !tbaa [[TBAA6]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8_t data) @@ -301,18 +301,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]), !tbaa [[TBAA9]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16_t data) @@ -322,18 +322,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]), !tbaa [[TBAA11]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32_t data) @@ -343,18 +343,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]), !tbaa [[TBAA13]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64_t data) @@ -364,18 +364,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]), !tbaa [[TBAA15]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16_t data) @@ -385,18 +385,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]), !tbaa [[TBAA17]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32_t data) @@ -406,18 +406,18 @@ // CHECK-LABEL: @test_svstnt1_vnum_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * // CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]), !tbaa [[TBAA19]] +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64_t data) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svsub_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svsub_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svsub_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svsub_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svsub_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svsub_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svsub_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svsub_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svsub_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svsub_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svsub_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svsub_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svsub_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svsub_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svsub_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svsub_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svsub_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svsub_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svsub_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svsub_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svsub_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svsub_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svsub_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svsub_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svsub_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svsub_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svsub_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svsub_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svsub_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svsub_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svsub_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svsub_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svsub_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svsub_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svsub_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svsub_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svsub_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svsub_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svsub_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svsub_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svsub_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svsub_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svsub_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svsub_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svsub_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svsub_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svsub_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svsub_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svsub_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsub_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svsub_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsub_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svsub_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsub_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svsub_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsub_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svsub_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsub_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svsub_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsub_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svsub_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svsub_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svsub_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svsub_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svsub_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svsub_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svsub_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svsub_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svsub_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svsub_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svsub_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svsub_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svsub_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svsub_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svsub_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svsub_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svsub_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svsub_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c @@ -17,13 +17,13 @@ // CHECK-LABEL: @test_svsubr_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -33,16 +33,16 @@ // CHECK-LABEL: @test_svsubr_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -52,16 +52,16 @@ // CHECK-LABEL: @test_svsubr_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -71,16 +71,16 @@ // CHECK-LABEL: @test_svsubr_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -91,13 +91,13 @@ // CHECK-LABEL: @test_svsubr_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -107,16 +107,16 @@ // CHECK-LABEL: @test_svsubr_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -126,16 +126,16 @@ // CHECK-LABEL: @test_svsubr_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -145,16 +145,16 @@ // CHECK-LABEL: @test_svsubr_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svsubr_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svsubr_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -196,14 +196,14 @@ // CHECK-LABEL: @test_svsubr_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -213,14 +213,14 @@ // CHECK-LABEL: @test_svsubr_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -230,12 +230,12 @@ // CHECK-LABEL: @test_svsubr_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -245,14 +245,14 @@ // CHECK-LABEL: @test_svsubr_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -262,14 +262,14 @@ // CHECK-LABEL: @test_svsubr_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -279,14 +279,14 @@ // CHECK-LABEL: @test_svsubr_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svsubr_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -311,14 +311,14 @@ // CHECK-LABEL: @test_svsubr_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -328,14 +328,14 @@ // CHECK-LABEL: @test_svsubr_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -345,14 +345,14 @@ // CHECK-LABEL: @test_svsubr_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svsubr_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svsubr_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svsubr_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svsubr_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -431,7 +431,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -439,7 +439,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -449,20 +449,20 @@ // CHECK-LABEL: @test_svsubr_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -472,20 +472,20 @@ // CHECK-LABEL: @test_svsubr_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -495,20 +495,20 @@ // CHECK-LABEL: @test_svsubr_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -521,7 +521,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -529,7 +529,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -539,20 +539,20 @@ // CHECK-LABEL: @test_svsubr_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -562,20 +562,20 @@ // CHECK-LABEL: @test_svsubr_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -585,20 +585,20 @@ // CHECK-LABEL: @test_svsubr_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -610,14 +610,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -627,18 +627,18 @@ // CHECK-LABEL: @test_svsubr_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -648,18 +648,18 @@ // CHECK-LABEL: @test_svsubr_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -669,18 +669,18 @@ // CHECK-LABEL: @test_svsubr_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -692,14 +692,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -709,18 +709,18 @@ // CHECK-LABEL: @test_svsubr_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -730,18 +730,18 @@ // CHECK-LABEL: @test_svsubr_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -751,18 +751,18 @@ // CHECK-LABEL: @test_svsubr_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -791,18 +791,18 @@ // CHECK-LABEL: @test_svsubr_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -812,18 +812,18 @@ // CHECK-LABEL: @test_svsubr_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -833,18 +833,18 @@ // CHECK-LABEL: @test_svsubr_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -873,18 +873,18 @@ // CHECK-LABEL: @test_svsubr_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -894,18 +894,18 @@ // CHECK-LABEL: @test_svsubr_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -915,18 +915,18 @@ // CHECK-LABEL: @test_svsubr_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -936,16 +936,16 @@ // CHECK-LABEL: @test_svsubr_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svsubr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -955,16 +955,16 @@ // CHECK-LABEL: @test_svsubr_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svsubr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -974,16 +974,16 @@ // CHECK-LABEL: @test_svsubr_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svsubr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -993,14 +993,14 @@ // CHECK-LABEL: @test_svsubr_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsubr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1010,14 +1010,14 @@ // CHECK-LABEL: @test_svsubr_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsubr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1027,14 +1027,14 @@ // CHECK-LABEL: @test_svsubr_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsubr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1044,14 +1044,14 @@ // CHECK-LABEL: @test_svsubr_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsubr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1061,14 +1061,14 @@ // CHECK-LABEL: @test_svsubr_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsubr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1078,14 +1078,14 @@ // CHECK-LABEL: @test_svsubr_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsubr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1095,20 +1095,20 @@ // CHECK-LABEL: @test_svsubr_n_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat16_t test_svsubr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1118,20 +1118,20 @@ // CHECK-LABEL: @test_svsubr_n_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat32_t test_svsubr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1141,20 +1141,20 @@ // CHECK-LABEL: @test_svsubr_n_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_zu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svfloat64_t test_svsubr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1164,18 +1164,18 @@ // CHECK-LABEL: @test_svsubr_n_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svsubr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1185,18 +1185,18 @@ // CHECK-LABEL: @test_svsubr_n_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svsubr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1206,18 +1206,18 @@ // CHECK-LABEL: @test_svsubr_n_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_mu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svsubr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) @@ -1227,18 +1227,18 @@ // CHECK-LABEL: @test_svsubr_n_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svsubr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1248,18 +1248,18 @@ // CHECK-LABEL: @test_svsubr_n_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svsubr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1269,18 +1269,18 @@ // CHECK-LABEL: @test_svsubr_n_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_xu10__SVBool_tu13__SVFloat64_td( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svsubr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsudot_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsudot_s32u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsudot_s32(svint32_t x, svint8_t y, svuint8_t z) { @@ -33,14 +33,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsudot_n_s32u11__SVInt32_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsudot_n_s32(svint32_t x, svint8_t y, uint8_t z) { @@ -49,12 +49,12 @@ // CHECK-LABEL: @test_svsudot_lane_s32_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_0u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsudot_lane_s32_0(svint32_t x, svint8_t y, svuint8_t z) { @@ -63,12 +63,12 @@ // CHECK-LABEL: @test_svsudot_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsudot_lane_s32_1(svint32_t x, svint8_t y, svuint8_t z) { @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsudot_lane_s32_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_2u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsudot_lane_s32_2(svint32_t x, svint8_t y, svuint8_t z) { @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svsudot_lane_s32_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_3u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsudot_lane_s32_3(svint32_t x, svint8_t y, svuint8_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtbl_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtbl_bf16u14__SVBFloat16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svtbl_bf16(svbfloat16_t data, svuint16_t indices) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svtbl_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svtbl_s8u10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svtbl_s8(svint8_t data, svuint8_t indices) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtbl_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_s16u11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svtbl_s16(svint16_t data, svuint16_t indices) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svtbl_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_s32u11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svtbl_s32(svint32_t data, svuint32_t indices) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svtbl_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_s64u11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svtbl_s64(svint64_t data, svuint64_t indices) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svtbl_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svtbl_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svtbl_u8(svuint8_t data, svuint8_t indices) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svtbl_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svtbl_u16(svuint16_t data, svuint16_t indices) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svtbl_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svtbl_u32(svuint32_t data, svuint32_t indices) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svtbl_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svtbl_u64(svuint64_t data, svuint64_t indices) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svtbl_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_f16u13__SVFloat16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtbl_f16(svfloat16_t data, svuint16_t indices) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svtbl_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_f32u13__SVFloat32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtbl_f32(svfloat32_t data, svuint32_t indices) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svtbl_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbl_f64u13__SVFloat64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtbl_f64(svfloat64_t data, svuint64_t indices) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svtmad_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtmad_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtmad_f16(svfloat16_t op1, svfloat16_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtmad_f16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svtmad_f16_1u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtmad_f16_1(svfloat16_t op1, svfloat16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svtmad_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtmad_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtmad_f32(svfloat32_t op1, svfloat32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svtmad_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtmad_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftmad.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtmad_f64(svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtrn1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtrn1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svtrn1_bf16(svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtrn1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtrn1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svtrn1_bf16(svbfloat16_t op1, svbfloat16_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtrn1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn1_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svtrn1_s8(svint8_t op1, svint8_t op2) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtrn1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svtrn1_s16(svint16_t op1, svint16_t op2) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_svtrn1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svtrn1_s32(svint32_t op1, svint32_t op2) { @@ -59,12 +59,12 @@ // CHECK-LABEL: @test_svtrn1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svtrn1_s64(svint64_t op1, svint64_t op2) { @@ -73,12 +73,12 @@ // CHECK-LABEL: @test_svtrn1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn1_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svtrn1_u8(svuint8_t op1, svuint8_t op2) { @@ -87,12 +87,12 @@ // CHECK-LABEL: @test_svtrn1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svtrn1_u16(svuint16_t op1, svuint16_t op2) { @@ -101,12 +101,12 @@ // CHECK-LABEL: @test_svtrn1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svtrn1_u32(svuint32_t op1, svuint32_t op2) { @@ -115,12 +115,12 @@ // CHECK-LABEL: @test_svtrn1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svtrn1_u64(svuint64_t op1, svuint64_t op2) { @@ -129,12 +129,12 @@ // CHECK-LABEL: @test_svtrn1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtrn1_f16(svfloat16_t op1, svfloat16_t op2) { @@ -143,12 +143,12 @@ // CHECK-LABEL: @test_svtrn1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtrn1_f32(svfloat32_t op1, svfloat32_t op2) { @@ -157,12 +157,12 @@ // CHECK-LABEL: @test_svtrn1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtrn1_f64(svfloat64_t op1, svfloat64_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svtrn1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn1_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svtrn1_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtrn1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svtrn1_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svtrn1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svtrn1_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svtrn1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svtrn1_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svtrn1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn1_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svtrn1_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svtrn1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svtrn1_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svtrn1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svtrn1_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svtrn1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svtrn1_u64(svuint64_t op1, svuint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svtrn1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtrn1_f16(svfloat16_t op1, svfloat16_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svtrn1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtrn1_f32(svfloat32_t op1, svfloat32_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svtrn1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtrn1_f64(svfloat64_t op1, svfloat64_t op2) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svtrn1_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn1_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svtrn1_b8(svbool_t op1, svbool_t op2) @@ -196,18 +196,18 @@ // CHECK-LABEL: @test_svtrn1_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svtrn1_b16(svbool_t op1, svbool_t op2) @@ -217,18 +217,18 @@ // CHECK-LABEL: @test_svtrn1_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svtrn1_b32(svbool_t op1, svbool_t op2) @@ -238,18 +238,18 @@ // CHECK-LABEL: @test_svtrn1_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svtrn1_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn1.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svtrn1_b64(svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtrn2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtrn2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svtrn2_bf16(svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtrn2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtrn2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svtrn2_bf16(svbfloat16_t op1, svbfloat16_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtrn2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn2_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svtrn2_s8(svint8_t op1, svint8_t op2) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtrn2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svtrn2_s16(svint16_t op1, svint16_t op2) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_svtrn2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svtrn2_s32(svint32_t op1, svint32_t op2) { @@ -59,12 +59,12 @@ // CHECK-LABEL: @test_svtrn2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svtrn2_s64(svint64_t op1, svint64_t op2) { @@ -73,12 +73,12 @@ // CHECK-LABEL: @test_svtrn2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn2_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svtrn2_u8(svuint8_t op1, svuint8_t op2) { @@ -87,12 +87,12 @@ // CHECK-LABEL: @test_svtrn2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svtrn2_u16(svuint16_t op1, svuint16_t op2) { @@ -101,12 +101,12 @@ // CHECK-LABEL: @test_svtrn2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svtrn2_u32(svuint32_t op1, svuint32_t op2) { @@ -115,12 +115,12 @@ // CHECK-LABEL: @test_svtrn2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svtrn2_u64(svuint64_t op1, svuint64_t op2) { @@ -129,12 +129,12 @@ // CHECK-LABEL: @test_svtrn2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtrn2_f16(svfloat16_t op1, svfloat16_t op2) { @@ -143,12 +143,12 @@ // CHECK-LABEL: @test_svtrn2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtrn2_f32(svfloat32_t op1, svfloat32_t op2) { @@ -157,12 +157,12 @@ // CHECK-LABEL: @test_svtrn2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtrn2_f64(svfloat64_t op1, svfloat64_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svtrn2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn2_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svtrn2_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtrn2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svtrn2_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svtrn2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svtrn2_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svtrn2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svtrn2_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svtrn2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn2_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svtrn2_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svtrn2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svtrn2_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svtrn2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svtrn2_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svtrn2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svtrn2_u64(svuint64_t op1, svuint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svtrn2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtrn2_f16(svfloat16_t op1, svfloat16_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svtrn2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtrn2_f32(svfloat32_t op1, svfloat32_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svtrn2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtrn2_f64(svfloat64_t op1, svfloat64_t op2) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svtrn2_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtrn2_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svtrn2_b8(svbool_t op1, svbool_t op2) @@ -196,18 +196,18 @@ // CHECK-LABEL: @test_svtrn2_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svtrn2_b16(svbool_t op1, svbool_t op2) @@ -217,18 +217,18 @@ // CHECK-LABEL: @test_svtrn2_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svtrn2_b32(svbool_t op1, svbool_t op2) @@ -238,18 +238,18 @@ // CHECK-LABEL: @test_svtrn2_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svtrn2_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.trn2.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svtrn2_b64(svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svtsmul_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftsmul.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtsmul_f16u13__SVFloat16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftsmul.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtsmul_f16(svfloat16_t op1, svuint16_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtsmul_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftsmul.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtsmul_f32u13__SVFloat32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftsmul.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtsmul_f32(svfloat32_t op1, svuint32_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svtsmul_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftsmul.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtsmul_f64u13__SVFloat64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftsmul.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtsmul_f64(svfloat64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svtssel_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftssel.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtssel_f16u13__SVFloat16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftssel.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtssel_f16(svfloat16_t op1, svuint16_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svtssel_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftssel.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtssel_f32u13__SVFloat32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftssel.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtssel_f32(svfloat32_t op1, svuint32_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svtssel_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftssel.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svtssel_f64u13__SVFloat64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ftssel.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtssel_f64(svfloat64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svunpkhi_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpkhi.nxv8i16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv8i16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpkhi_s16u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpkhi.nxv8i16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv8i16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svunpkhi_s16(svint8_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svunpkhi_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpkhi.nxv4i32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv4i32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpkhi_s32u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpkhi.nxv4i32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv4i32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svunpkhi_s32(svint16_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svunpkhi_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpkhi.nxv2i64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv2i64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpkhi_s64u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpkhi.nxv2i64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv2i64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svunpkhi_s64(svint32_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svunpkhi_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpkhi.nxv8i16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv8i16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpkhi_u16u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpkhi.nxv8i16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv8i16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svunpkhi_u16(svuint8_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svunpkhi_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpkhi.nxv4i32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv4i32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpkhi_u32u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpkhi.nxv4i32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv4i32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svunpkhi_u32(svuint16_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svunpkhi_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpkhi.nxv2i64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv2i64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpkhi_u64u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpkhi.nxv2i64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv2i64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svunpkhi_u64(svuint32_t op) @@ -106,14 +106,14 @@ // CHECK-LABEL: @test_svunpkhi_b( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.punpkhi.nxv16i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpkhi.nxv16i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svunpkhi_bu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.punpkhi.nxv16i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpkhi.nxv16i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svunpkhi_b(svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svunpklo_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpklo.nxv8i16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv8i16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpklo_s16u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpklo.nxv8i16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv8i16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svunpklo_s16(svint8_t op) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svunpklo_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpklo.nxv4i32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv4i32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpklo_s32u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpklo.nxv4i32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv4i32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svunpklo_s32(svint16_t op) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svunpklo_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpklo.nxv2i64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv2i64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpklo_s64u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sunpklo.nxv2i64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv2i64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svunpklo_s64(svint32_t op) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svunpklo_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpklo.nxv8i16( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv8i16( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpklo_u16u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpklo.nxv8i16( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv8i16( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svunpklo_u16(svuint8_t op) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svunpklo_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpklo.nxv4i32( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv4i32( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpklo_u32u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpklo.nxv4i32( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv4i32( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svunpklo_u32(svuint16_t op) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svunpklo_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpklo.nxv2i64( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv2i64( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svunpklo_u64u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uunpklo.nxv2i64( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv2i64( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svunpklo_u64(svuint32_t op) @@ -106,14 +106,14 @@ // CHECK-LABEL: @test_svunpklo_b( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.punpklo.nxv16i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpklo.nxv16i1( [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svunpklo_bu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.punpklo.nxv16i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpklo.nxv16i1( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svunpklo_b(svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svusdot_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svusdot_s32u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svusdot_s32(svint32_t x, svuint8_t y, svint8_t z) { @@ -33,14 +33,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svusdot_n_s32u11__SVInt32_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[Z:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svusdot_n_s32(svint32_t x, svuint8_t y, int8_t z) { @@ -49,12 +49,12 @@ // CHECK-LABEL: @test_svusdot_lane_s32_0( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_0u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svusdot_lane_s32_0(svint32_t x, svuint8_t y, svint8_t z) { @@ -63,12 +63,12 @@ // CHECK-LABEL: @test_svusdot_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_1u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svusdot_lane_s32_1(svint32_t x, svuint8_t y, svint8_t z) { @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svusdot_lane_s32_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_2u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svusdot_lane_s32_2(svint32_t x, svuint8_t y, svint8_t z) { @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svusdot_lane_s32_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_3u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svusdot_lane_s32_3(svint32_t x, svuint8_t y, svint8_t z) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svuzp1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svuzp1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svuzp1_bf16(svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svuzp1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svuzp1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svuzp1_bf16(svbfloat16_t op1, svbfloat16_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svuzp1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp1_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svuzp1_s8(svint8_t op1, svint8_t op2) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svuzp1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svuzp1_s16(svint16_t op1, svint16_t op2) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_svuzp1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svuzp1_s32(svint32_t op1, svint32_t op2) { @@ -59,12 +59,12 @@ // CHECK-LABEL: @test_svuzp1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svuzp1_s64(svint64_t op1, svint64_t op2) { @@ -73,12 +73,12 @@ // CHECK-LABEL: @test_svuzp1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp1_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svuzp1_u8(svuint8_t op1, svuint8_t op2) { @@ -87,12 +87,12 @@ // CHECK-LABEL: @test_svuzp1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svuzp1_u16(svuint16_t op1, svuint16_t op2) { @@ -101,12 +101,12 @@ // CHECK-LABEL: @test_svuzp1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svuzp1_u32(svuint32_t op1, svuint32_t op2) { @@ -115,12 +115,12 @@ // CHECK-LABEL: @test_svuzp1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svuzp1_u64(svuint64_t op1, svuint64_t op2) { @@ -129,12 +129,12 @@ // CHECK-LABEL: @test_svuzp1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svuzp1_f16(svfloat16_t op1, svfloat16_t op2) { @@ -143,12 +143,12 @@ // CHECK-LABEL: @test_svuzp1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svuzp1_f32(svfloat32_t op1, svfloat32_t op2) { @@ -157,12 +157,12 @@ // CHECK-LABEL: @test_svuzp1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svuzp1_f64(svfloat64_t op1, svfloat64_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svuzp1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp1_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svuzp1_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svuzp1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svuzp1_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svuzp1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svuzp1_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svuzp1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svuzp1_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svuzp1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp1_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svuzp1_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svuzp1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svuzp1_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svuzp1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svuzp1_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svuzp1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svuzp1_u64(svuint64_t op1, svuint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svuzp1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svuzp1_f16(svfloat16_t op1, svfloat16_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svuzp1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svuzp1_f32(svfloat32_t op1, svfloat32_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svuzp1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svuzp1_f64(svfloat64_t op1, svfloat64_t op2) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svuzp1_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp1_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svuzp1_b8(svbool_t op1, svbool_t op2) @@ -196,18 +196,18 @@ // CHECK-LABEL: @test_svuzp1_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svuzp1_b16(svbool_t op1, svbool_t op2) @@ -217,18 +217,18 @@ // CHECK-LABEL: @test_svuzp1_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svuzp1_b32(svbool_t op1, svbool_t op2) @@ -238,18 +238,18 @@ // CHECK-LABEL: @test_svuzp1_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svuzp1_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp1.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svuzp1_b64(svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svuzp2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svuzp2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svuzp2_bf16(svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svuzp2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svuzp2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svuzp2_bf16(svbfloat16_t op1, svbfloat16_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svuzp2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp2_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svuzp2_s8(svint8_t op1, svint8_t op2) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svuzp2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svuzp2_s16(svint16_t op1, svint16_t op2) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_svuzp2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svuzp2_s32(svint32_t op1, svint32_t op2) { @@ -59,12 +59,12 @@ // CHECK-LABEL: @test_svuzp2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svuzp2_s64(svint64_t op1, svint64_t op2) { @@ -73,12 +73,12 @@ // CHECK-LABEL: @test_svuzp2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp2_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svuzp2_u8(svuint8_t op1, svuint8_t op2) { @@ -87,12 +87,12 @@ // CHECK-LABEL: @test_svuzp2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svuzp2_u16(svuint16_t op1, svuint16_t op2) { @@ -101,12 +101,12 @@ // CHECK-LABEL: @test_svuzp2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svuzp2_u32(svuint32_t op1, svuint32_t op2) { @@ -115,12 +115,12 @@ // CHECK-LABEL: @test_svuzp2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svuzp2_u64(svuint64_t op1, svuint64_t op2) { @@ -129,12 +129,12 @@ // CHECK-LABEL: @test_svuzp2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svuzp2_f16(svfloat16_t op1, svfloat16_t op2) { @@ -143,12 +143,12 @@ // CHECK-LABEL: @test_svuzp2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svuzp2_f32(svfloat32_t op1, svfloat32_t op2) { @@ -157,12 +157,12 @@ // CHECK-LABEL: @test_svuzp2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svuzp2_f64(svfloat64_t op1, svfloat64_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svuzp2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp2_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svuzp2_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svuzp2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svuzp2_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svuzp2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svuzp2_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svuzp2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svuzp2_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svuzp2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp2_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svuzp2_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svuzp2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svuzp2_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svuzp2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svuzp2_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svuzp2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svuzp2_u64(svuint64_t op1, svuint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svuzp2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svuzp2_f16(svfloat16_t op1, svfloat16_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svuzp2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svuzp2_f32(svfloat32_t op1, svfloat32_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svuzp2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svuzp2_f64(svfloat64_t op1, svfloat64_t op2) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svuzp2_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svuzp2_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svuzp2_b8(svbool_t op1, svbool_t op2) @@ -196,18 +196,18 @@ // CHECK-LABEL: @test_svuzp2_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svuzp2_b16(svbool_t op1, svbool_t op2) @@ -217,18 +217,18 @@ // CHECK-LABEL: @test_svuzp2_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svuzp2_b32(svbool_t op1, svbool_t op2) @@ -238,18 +238,18 @@ // CHECK-LABEL: @test_svuzp2_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svuzp2_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uzp2.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svuzp2_b64(svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svwhilele_b8_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilele_b8_s32(int32_t op1, int32_t op2) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svwhilele_b16_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b16_s32(int32_t op1, int32_t op2) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svwhilele_b32_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b32_s32(int32_t op1, int32_t op2) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svwhilele_b64_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b64_s32(int32_t op1, int32_t op2) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svwhilele_b8_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilele_b8_u32(uint32_t op1, uint32_t op2) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svwhilele_b16_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b16_u32(uint32_t op1, uint32_t op2) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svwhilele_b32_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b32_u32(uint32_t op1, uint32_t op2) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svwhilele_b64_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b64_u32(uint32_t op1, uint32_t op2) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svwhilele_b8_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilele_b8_s64(int64_t op1, int64_t op2) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svwhilele_b16_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b16_s64(int64_t op1, int64_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svwhilele_b32_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b32_s64(int64_t op1, int64_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svwhilele_b64_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b64_s64(int64_t op1, int64_t op2) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svwhilele_b8_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilele_b8_u64(uint64_t op1, uint64_t op2) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svwhilele_b16_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b16_u64(uint64_t op1, uint64_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svwhilele_b32_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b32_u64(uint64_t op1, uint64_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svwhilele_b64_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilele_b64_u64(uint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svwhilelt_b8_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilelt_b8_s32(int32_t op1, int32_t op2) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svwhilelt_b16_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b16_s32(int32_t op1, int32_t op2) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svwhilelt_b32_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b32_s32(int32_t op1, int32_t op2) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svwhilelt_b64_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b64_s32(int32_t op1, int32_t op2) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svwhilelt_b8_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilelt_b8_u32(uint32_t op1, uint32_t op2) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svwhilelt_b16_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b16_u32(uint32_t op1, uint32_t op2) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svwhilelt_b32_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b32_u32(uint32_t op1, uint32_t op2) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svwhilelt_b64_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b64_u32(uint32_t op1, uint32_t op2) @@ -148,12 +148,12 @@ // CHECK-LABEL: @test_svwhilelt_b8_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilelt_b8_s64(int64_t op1, int64_t op2) @@ -163,14 +163,14 @@ // CHECK-LABEL: @test_svwhilelt_b16_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b16_s64(int64_t op1, int64_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svwhilelt_b32_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b32_s64(int64_t op1, int64_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svwhilelt_b64_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b64_s64(int64_t op1, int64_t op2) @@ -214,12 +214,12 @@ // CHECK-LABEL: @test_svwhilelt_b8_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilelt_b8_u64(uint64_t op1, uint64_t op2) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svwhilelt_b16_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b16_u64(uint64_t op1, uint64_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svwhilelt_b32_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b32_u64(uint64_t op1, uint64_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svwhilelt_b64_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilelt_b64_u64(uint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svwrffr( // CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z12test_svwrffru10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svwrffr(svbool_t op) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svzip1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svzip1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svzip1_bf16(svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svzip1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svzip1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svzip1_bf16(svbfloat16_t op1, svbfloat16_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svzip1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip1_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svzip1_s8(svint8_t op1, svint8_t op2) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svzip1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svzip1_s16(svint16_t op1, svint16_t op2) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_svzip1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svzip1_s32(svint32_t op1, svint32_t op2) { @@ -59,12 +59,12 @@ // CHECK-LABEL: @test_svzip1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svzip1_s64(svint64_t op1, svint64_t op2) { @@ -73,12 +73,12 @@ // CHECK-LABEL: @test_svzip1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip1_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svzip1_u8(svuint8_t op1, svuint8_t op2) { @@ -87,12 +87,12 @@ // CHECK-LABEL: @test_svzip1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svzip1_u16(svuint16_t op1, svuint16_t op2) { @@ -101,12 +101,12 @@ // CHECK-LABEL: @test_svzip1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svzip1_u32(svuint32_t op1, svuint32_t op2) { @@ -115,12 +115,12 @@ // CHECK-LABEL: @test_svzip1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svzip1_u64(svuint64_t op1, svuint64_t op2) { @@ -129,12 +129,12 @@ // CHECK-LABEL: @test_svzip1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svzip1_f16(svfloat16_t op1, svfloat16_t op2) { @@ -143,12 +143,12 @@ // CHECK-LABEL: @test_svzip1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svzip1_f32(svfloat32_t op1, svfloat32_t op2) { @@ -157,12 +157,12 @@ // CHECK-LABEL: @test_svzip1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svzip1_f64(svfloat64_t op1, svfloat64_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svzip1_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip1_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svzip1_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svzip1_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svzip1_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svzip1_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svzip1_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svzip1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svzip1_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svzip1_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip1_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svzip1_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svzip1_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svzip1_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svzip1_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svzip1_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svzip1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svzip1_u64(svuint64_t op1, svuint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svzip1_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svzip1_f16(svfloat16_t op1, svfloat16_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svzip1_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svzip1_f32(svfloat32_t op1, svfloat32_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svzip1_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svzip1_f64(svfloat64_t op1, svfloat64_t op2) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svzip1_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip1_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svzip1_b8(svbool_t op1, svbool_t op2) @@ -196,18 +196,18 @@ // CHECK-LABEL: @test_svzip1_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svzip1_b16(svbool_t op1, svbool_t op2) @@ -217,18 +217,18 @@ // CHECK-LABEL: @test_svzip1_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svzip1_b32(svbool_t op1, svbool_t op2) @@ -238,18 +238,18 @@ // CHECK-LABEL: @test_svzip1_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svzip1_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip1.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svzip1_b64(svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svzip2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svzip2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svzip2_bf16(svbfloat16_t op1, svbfloat16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svzip2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svzip2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svzip2_bf16(svbfloat16_t op1, svbfloat16_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svzip2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip2_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svzip2_s8(svint8_t op1, svint8_t op2) { @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svzip2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svzip2_s16(svint16_t op1, svint16_t op2) { @@ -45,12 +45,12 @@ // CHECK-LABEL: @test_svzip2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svzip2_s32(svint32_t op1, svint32_t op2) { @@ -59,12 +59,12 @@ // CHECK-LABEL: @test_svzip2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svzip2_s64(svint64_t op1, svint64_t op2) { @@ -73,12 +73,12 @@ // CHECK-LABEL: @test_svzip2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip2_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svzip2_u8(svuint8_t op1, svuint8_t op2) { @@ -87,12 +87,12 @@ // CHECK-LABEL: @test_svzip2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svzip2_u16(svuint16_t op1, svuint16_t op2) { @@ -101,12 +101,12 @@ // CHECK-LABEL: @test_svzip2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svzip2_u32(svuint32_t op1, svuint32_t op2) { @@ -115,12 +115,12 @@ // CHECK-LABEL: @test_svzip2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svzip2_u64(svuint64_t op1, svuint64_t op2) { @@ -129,12 +129,12 @@ // CHECK-LABEL: @test_svzip2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svzip2_f16(svfloat16_t op1, svfloat16_t op2) { @@ -143,12 +143,12 @@ // CHECK-LABEL: @test_svzip2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svzip2_f32(svfloat32_t op1, svfloat32_t op2) { @@ -157,12 +157,12 @@ // CHECK-LABEL: @test_svzip2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svzip2_f64(svfloat64_t op1, svfloat64_t op2) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svzip2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip2_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svzip2_s8(svint8_t op1, svint8_t op2) @@ -31,12 +31,12 @@ // CHECK-LABEL: @test_svzip2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svzip2_s16(svint16_t op1, svint16_t op2) @@ -46,12 +46,12 @@ // CHECK-LABEL: @test_svzip2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svzip2_s32(svint32_t op1, svint32_t op2) @@ -61,12 +61,12 @@ // CHECK-LABEL: @test_svzip2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svzip2_s64(svint64_t op1, svint64_t op2) @@ -76,12 +76,12 @@ // CHECK-LABEL: @test_svzip2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip2_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svzip2_u8(svuint8_t op1, svuint8_t op2) @@ -91,12 +91,12 @@ // CHECK-LABEL: @test_svzip2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svzip2_u16(svuint16_t op1, svuint16_t op2) @@ -106,12 +106,12 @@ // CHECK-LABEL: @test_svzip2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svzip2_u32(svuint32_t op1, svuint32_t op2) @@ -121,12 +121,12 @@ // CHECK-LABEL: @test_svzip2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svzip2_u64(svuint64_t op1, svuint64_t op2) @@ -136,12 +136,12 @@ // CHECK-LABEL: @test_svzip2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_f16u13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svzip2_f16(svfloat16_t op1, svfloat16_t op2) @@ -151,12 +151,12 @@ // CHECK-LABEL: @test_svzip2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_f32u13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svzip2_f32(svfloat32_t op1, svfloat32_t op2) @@ -166,12 +166,12 @@ // CHECK-LABEL: @test_svzip2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_f64u13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svzip2_f64(svfloat64_t op1, svfloat64_t op2) @@ -181,12 +181,12 @@ // CHECK-LABEL: @test_svzip2_b8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svzip2_b8u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svzip2_b8(svbool_t op1, svbool_t op2) @@ -196,18 +196,18 @@ // CHECK-LABEL: @test_svzip2_b16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_b16u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svzip2_b16(svbool_t op1, svbool_t op2) @@ -217,18 +217,18 @@ // CHECK-LABEL: @test_svzip2_b32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_b32u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svzip2_b32(svbool_t op1, svbool_t op2) @@ -238,18 +238,18 @@ // CHECK-LABEL: @test_svzip2_b64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i1( [[TMP0]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z15test_svzip2_b64u10__SVBool_tu10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.zip2.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i1( [[TMP0]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svbool_t test_svzip2_b64(svbool_t op1, svbool_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaba_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svaba_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svaba_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaba_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaba_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaba_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaba_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaba_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaba_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svaba_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaba_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svaba_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svaba_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svaba_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaba_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svaba_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaba_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svaba_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svaba_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaba_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svaba_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svaba_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaba_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svaba_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaba_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svaba_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaba_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaba_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaba_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svaba_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svaba_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaba_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaba_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svaba_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svaba_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svabalb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svabalb_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svabalb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svabalb_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svabalb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svabalb_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svabalb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalb_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svabalb_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svabalb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalb_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svabalb_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svabalb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalb_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svabalb_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabalb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabalb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabalb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabalb_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabalb_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalb_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabalb_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svabalt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svabalt_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svabalt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svabalt_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svabalt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svabalt_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svabalt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalt_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svabalt_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svabalt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalt_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svabalt_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svabalt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabalt_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svabalt_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabalt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabalt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabalt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabalt_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabalt_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabalt_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabalt_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svabdlb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlb_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svabdlb_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svabdlb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlb_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svabdlb_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svabdlb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlb_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svabdlb_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svabdlb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlb_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svabdlb_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svabdlb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlb_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svabdlb_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svabdlb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlb_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svabdlb_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabdlb_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabdlb_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabdlb_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabdlb_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabdlb_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabdlb_n_u64(svuint32_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svabdlt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlt_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svabdlt_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svabdlt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlt_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svabdlt_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svabdlt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlt_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svabdlt_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svabdlt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlt_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svabdlt_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svabdlt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlt_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svabdlt_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svabdlt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svabdlt_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svabdlt_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svabdlt_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svabdlt_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svabdlt_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svabdlt_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svabdlt_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svabdlt_n_u64(svuint32_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c @@ -17,16 +17,16 @@ // CHECK-LABEL: @test_svadalp_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s16_zu10__SVBool_tu11__SVInt16_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svadalp_s16_z(svbool_t pg, svint16_t op1, svint8_t op2) @@ -36,16 +36,16 @@ // CHECK-LABEL: @test_svadalp_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svadalp_s32_z(svbool_t pg, svint32_t op1, svint16_t op2) @@ -55,16 +55,16 @@ // CHECK-LABEL: @test_svadalp_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svadalp_s64_z(svbool_t pg, svint64_t op1, svint32_t op2) @@ -74,16 +74,16 @@ // CHECK-LABEL: @test_svadalp_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u16_zu10__SVBool_tu12__SVUint16_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svadalp_u16_z(svbool_t pg, svuint16_t op1, svuint8_t op2) @@ -93,16 +93,16 @@ // CHECK-LABEL: @test_svadalp_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svadalp_u32_z(svbool_t pg, svuint32_t op1, svuint16_t op2) @@ -112,16 +112,16 @@ // CHECK-LABEL: @test_svadalp_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svadalp_u64_z(svbool_t pg, svuint64_t op1, svuint32_t op2) @@ -131,14 +131,14 @@ // CHECK-LABEL: @test_svadalp_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s16_mu10__SVBool_tu11__SVInt16_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svadalp_s16_m(svbool_t pg, svint16_t op1, svint8_t op2) @@ -148,14 +148,14 @@ // CHECK-LABEL: @test_svadalp_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svadalp_s32_m(svbool_t pg, svint32_t op1, svint16_t op2) @@ -165,14 +165,14 @@ // CHECK-LABEL: @test_svadalp_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svadalp_s64_m(svbool_t pg, svint64_t op1, svint32_t op2) @@ -182,14 +182,14 @@ // CHECK-LABEL: @test_svadalp_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u16_mu10__SVBool_tu12__SVUint16_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svadalp_u16_m(svbool_t pg, svuint16_t op1, svuint8_t op2) @@ -199,14 +199,14 @@ // CHECK-LABEL: @test_svadalp_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadalp_u32_m(svbool_t pg, svuint32_t op1, svuint16_t op2) @@ -216,14 +216,14 @@ // CHECK-LABEL: @test_svadalp_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadalp_u64_m(svbool_t pg, svuint64_t op1, svuint32_t op2) @@ -233,14 +233,14 @@ // CHECK-LABEL: @test_svadalp_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s16_xu10__SVBool_tu11__SVInt16_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svadalp_s16_x(svbool_t pg, svint16_t op1, svint8_t op2) @@ -250,14 +250,14 @@ // CHECK-LABEL: @test_svadalp_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svadalp_s32_x(svbool_t pg, svint32_t op1, svint16_t op2) @@ -267,14 +267,14 @@ // CHECK-LABEL: @test_svadalp_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svadalp_s64_x(svbool_t pg, svint64_t op1, svint32_t op2) @@ -284,14 +284,14 @@ // CHECK-LABEL: @test_svadalp_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u16_xu10__SVBool_tu12__SVUint16_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svadalp_u16_x(svbool_t pg, svuint16_t op1, svuint8_t op2) @@ -301,14 +301,14 @@ // CHECK-LABEL: @test_svadalp_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadalp_u32_x(svbool_t pg, svuint32_t op1, svuint16_t op2) @@ -318,14 +318,14 @@ // CHECK-LABEL: @test_svadalp_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadalp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadalp_u64_x(svbool_t pg, svuint64_t op1, svuint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svadclb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svadclb_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadclb_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svadclb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svadclb_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadclb_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -49,14 +49,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclb_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadclb_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -68,14 +68,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclb_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadclb_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svadclt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svadclt_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svadclt_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svadclt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svadclt_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svadclt_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -49,14 +49,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclt_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svadclt_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -68,14 +68,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadclt_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svadclt_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddhnb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnb_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svaddhnb_s16(svint16_t op1, svint16_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaddhnb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnb_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaddhnb_s32(svint32_t op1, svint32_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaddhnb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnb_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaddhnb_s64(svint64_t op1, svint64_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svaddhnb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnb_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaddhnb_u16(svuint16_t op1, svuint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svaddhnb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnb_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svaddhnb_u32(svuint32_t op1, svuint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svaddhnb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnb_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svaddhnb_u64(svuint64_t op1, svuint64_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svaddhnb_n_s16(svint16_t op1, int16_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddhnb_n_s32(svint32_t op1, int32_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddhnb_n_s64(svint64_t op1, int64_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svaddhnb_n_u16(svuint16_t op1, uint16_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddhnb_n_u32(svuint32_t op1, uint32_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddhnb_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddhnt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svaddhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaddhnt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaddhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaddhnt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaddhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svaddhnt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaddhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svaddhnt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svaddhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svaddhnt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svaddhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svaddhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svaddhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddlb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlb_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaddlb_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaddlb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlb_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaddlb_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaddlb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlb_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svaddlb_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svaddlb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlb_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svaddlb_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svaddlb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlb_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svaddlb_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svaddlb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlb_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svaddlb_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddlb_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddlb_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaddlb_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddlb_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddlb_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svaddlb_n_u64(svuint32_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddlbt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddlbt_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaddlbt_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaddlbt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddlbt_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaddlbt_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaddlbt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svaddlbt_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svaddlbt_s64(svint32_t op1, svint32_t op2) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddlbt_n_s16(svint8_t op1, int8_t op2) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddlbt_n_s32(svint16_t op1, int16_t op2) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaddlbt_n_s64(svint32_t op1, int32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddlt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlt_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaddlt_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaddlt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlt_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaddlt_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaddlt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlt_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svaddlt_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svaddlt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlt_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svaddlt_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svaddlt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlt_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svaddlt_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svaddlt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddlt_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svaddlt_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddlt_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddlt_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaddlt_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddlt_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddlt_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svaddlt_n_u64(svuint32_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddp_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddp_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svaddp_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svaddp_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddp_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svaddp_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddp_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svaddp_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaddp_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svaddp_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddp_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaddp_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svaddp_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddp_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svaddp_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddp_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svaddp_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svaddp_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svaddp_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddp_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svaddp_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svaddp_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddp_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svaddp_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddp_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svaddp_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaddp_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -215,12 +215,12 @@ // CHECK-LABEL: @test_svaddp_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddp_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaddp_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -230,14 +230,14 @@ // CHECK-LABEL: @test_svaddp_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddp_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -247,14 +247,14 @@ // CHECK-LABEL: @test_svaddp_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddp_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -264,14 +264,14 @@ // CHECK-LABEL: @test_svaddp_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svaddp_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svaddp_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svaddp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -298,14 +298,14 @@ // CHECK-LABEL: @test_svaddp_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svaddp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -315,14 +315,14 @@ // CHECK-LABEL: @test_svaddp_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svaddp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -332,14 +332,14 @@ // CHECK-LABEL: @test_svaddp_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svaddp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -349,14 +349,14 @@ // CHECK-LABEL: @test_svaddp_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svaddp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -366,14 +366,14 @@ // CHECK-LABEL: @test_svaddp_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svaddp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svaddp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddwb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwb_s16u11__SVInt16_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaddwb_s16(svint16_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaddwb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwb_s32u11__SVInt32_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaddwb_s32(svint32_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaddwb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwb_s64u11__SVInt64_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svaddwb_s64(svint64_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svaddwb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwb_u16u12__SVUint16_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svaddwb_u16(svuint16_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svaddwb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwb_u32u12__SVUint32_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svaddwb_u32(svuint32_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svaddwb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwb_u64u12__SVUint64_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svaddwb_u64(svuint64_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddwb_n_s16(svint16_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddwb_n_s32(svint32_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaddwb_n_s64(svint64_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddwb_n_u16(svuint16_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddwb_n_u32(svuint32_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svaddwb_n_u64(svuint64_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaddwt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwt_s16u11__SVInt16_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svaddwt_s16(svint16_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svaddwt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwt_s32u11__SVInt32_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svaddwt_s32(svint32_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svaddwt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwt_s64u11__SVInt64_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svaddwt_s64(svint64_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svaddwt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwt_u16u12__SVUint16_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svaddwt_u16(svuint16_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svaddwt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwt_u32u12__SVUint32_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svaddwt_u32(svuint32_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svaddwt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaddwt_u64u12__SVUint64_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svaddwt_u64(svuint64_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svaddwt_n_s16(svint16_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svaddwt_n_s32(svint32_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svaddwt_n_s64(svint64_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svaddwt_n_u16(svuint16_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svaddwt_n_u32(svuint32_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svaddwt_n_u64(svuint64_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaesd_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aesd( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesd( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaesd_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aesd( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesd( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaesd_u8(svuint8_t op1, svuint8_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaese_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aese( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aese( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svaese_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aese( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aese( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaese_u8(svuint8_t op1, svuint8_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaesimc_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aesimc( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesimc( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svaesimc_u8u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aesimc( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesimc( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaesimc_u8(svuint8_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svaesmc_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aesmc( [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesmc( [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svaesmc_u8u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.aesmc( [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesmc( [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svaesmc_u8(svuint8_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbcax_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbcax_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svbcax_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svbcax_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbcax_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svbcax_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svbcax_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbcax_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svbcax_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svbcax_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbcax_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svbcax_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svbcax_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbcax_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbcax_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svbcax_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbcax_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svbcax_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svbcax_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbcax_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svbcax_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svbcax_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbcax_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svbcax_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbcax_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svbcax_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svbcax_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svbcax_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svbcax_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbcax_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbcax_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbcax_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbcax_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbcax_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbcax_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbdep_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbdep_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbdep_u8(svuint8_t op1, svuint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svbdep_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbdep_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svbdep_u16(svuint16_t op1, svuint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svbdep_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbdep_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svbdep_u32(svuint32_t op1, svuint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svbdep_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbdep_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svbdep_u64(svuint64_t op1, svuint64_t op2) @@ -79,14 +79,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbdep_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbdep_n_u8(svuint8_t op1, uint8_t op2) @@ -98,14 +98,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbdep_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbdep_n_u16(svuint16_t op1, uint16_t op2) @@ -117,14 +117,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbdep_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbdep_n_u32(svuint32_t op1, uint32_t op2) @@ -136,14 +136,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbdep_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbdep_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbext_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbext_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbext_u8(svuint8_t op1, svuint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svbext_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbext_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svbext_u16(svuint16_t op1, svuint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svbext_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbext_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svbext_u32(svuint32_t op1, svuint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svbext_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbext_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svbext_u64(svuint64_t op1, svuint64_t op2) @@ -79,14 +79,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbext_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbext_n_u8(svuint8_t op1, uint8_t op2) @@ -98,14 +98,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbext_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbext_n_u16(svuint16_t op1, uint16_t op2) @@ -117,14 +117,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbext_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbext_n_u32(svuint32_t op1, uint32_t op2) @@ -136,14 +136,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbext_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbext_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbgrp_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbgrp_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbgrp_u8(svuint8_t op1, svuint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svbgrp_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbgrp_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svbgrp_u16(svuint16_t op1, svuint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svbgrp_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbgrp_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svbgrp_u32(svuint32_t op1, svuint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svbgrp_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbgrp_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svbgrp_u64(svuint64_t op1, svuint64_t op2) @@ -79,14 +79,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbgrp_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbgrp_n_u8(svuint8_t op1, uint8_t op2) @@ -98,14 +98,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbgrp_n_u16(svuint16_t op1, uint16_t op2) @@ -117,14 +117,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbgrp_n_u32(svuint32_t op1, uint32_t op2) @@ -136,14 +136,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbgrp_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbsl_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svbsl_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svbsl_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svbsl_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbsl_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svbsl_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svbsl_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbsl_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svbsl_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svbsl_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbsl_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svbsl_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svbsl_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svbsl_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbsl_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svbsl_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbsl_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svbsl_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svbsl_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbsl_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svbsl_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svbsl_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svbsl_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svbsl_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svbsl_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svbsl_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svbsl_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svbsl_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svbsl_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z15test_svbsl_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbsl_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbsl_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbsl_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svbsl_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbsl_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbsl1n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbsl1n_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svbsl1n_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svbsl1n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl1n_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svbsl1n_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svbsl1n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl1n_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svbsl1n_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svbsl1n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl1n_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svbsl1n_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svbsl1n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbsl1n_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbsl1n_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svbsl1n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl1n_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svbsl1n_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svbsl1n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl1n_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svbsl1n_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svbsl1n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl1n_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svbsl1n_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svbsl1n_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svbsl1n_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svbsl1n_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svbsl1n_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbsl1n_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbsl1n_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbsl1n_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbsl1n_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svbsl2n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbsl2n_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svbsl2n_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svbsl2n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl2n_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svbsl2n_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svbsl2n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl2n_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svbsl2n_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svbsl2n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl2n_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svbsl2n_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svbsl2n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svbsl2n_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svbsl2n_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svbsl2n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl2n_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svbsl2n_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svbsl2n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl2n_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svbsl2n_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svbsl2n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svbsl2n_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svbsl2n_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl2n_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svbsl2n_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svbsl2n_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svbsl2n_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svbsl2n_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svbsl2n_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svbsl2n_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svbsl2n_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svbsl2n_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svbsl2n_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcadd_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svcadd_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcadd_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svcadd_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcadd_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcadd_s8_1(svint8_t op1, svint8_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svcadd_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcadd_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcadd_s16(svint16_t op1, svint16_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svcadd_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcadd_s16_1(svint16_t op1, svint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svcadd_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcadd_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcadd_s32(svint32_t op1, svint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svcadd_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcadd_s32_1(svint32_t op1, svint32_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svcadd_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcadd_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcadd_s64(svint64_t op1, svint64_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svcadd_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcadd_s64_1(svint64_t op1, svint64_t op2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svcadd_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svcadd_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcadd_u8(svuint8_t op1, svuint8_t op2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svcadd_u8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcadd_u8_1u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcadd_u8_1(svuint8_t op1, svuint8_t op2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svcadd_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcadd_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcadd_u16(svuint16_t op1, svuint16_t op2) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svcadd_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_u16_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcadd_u16_1(svuint16_t op1, svuint16_t op2) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svcadd_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcadd_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcadd_u32(svuint32_t op1, svuint32_t op2) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svcadd_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_u32_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcadd_u32_1(svuint32_t op1, svuint32_t op2) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svcadd_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcadd_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svcadd_u64(svuint64_t op1, svuint64_t op2) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svcadd_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcadd_u64_1u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svcadd_u64_1(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcdot_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcdot_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcdot_s32(svint32_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svcdot_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcdot_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcdot_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svcdot_s32_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcdot_s32_2u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcdot_s32_2(svint32_t op1, svint8_t op2, svint8_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svcdot_s32_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcdot_s32_3u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcdot_s32_3(svint32_t op1, svint8_t op2, svint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svcdot_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcdot_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcdot_s64(svint64_t op1, svint16_t op2, svint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svcdot_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcdot_s64_1u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcdot_s64_1(svint64_t op1, svint16_t op2, svint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svcdot_s64_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcdot_s64_2u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcdot_s64_2(svint64_t op1, svint16_t op2, svint16_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svcdot_s64_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcdot_s64_3u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcdot_s64_3(svint64_t op1, svint16_t op2, svint16_t op3) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svcdot_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcdot_lane_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svcdot_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 2, i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 2, i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svcdot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 2, i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 2, i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcdot_lane_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svcdot_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcdot_lane_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcdot_lane_s64(svint64_t op1, svint16_t op2, svint16_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svcmla_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svcmla_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcmla_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svcmla_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcmla_s8_1u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcmla_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svcmla_s8_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcmla_s8_2u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcmla_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svcmla_s8_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcmla_s8_3u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svcmla_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svcmla_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmla_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcmla_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svcmla_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcmla_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svcmla_s16_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s16_2u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcmla_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svcmla_s16_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s16_3u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcmla_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svcmla_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmla_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcmla_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svcmla_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcmla_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svcmla_s32_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s32_2u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcmla_s32_2(svint32_t op1, svint32_t op2, svint32_t op3) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svcmla_s32_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s32_3u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcmla_s32_3(svint32_t op1, svint32_t op2, svint32_t op3) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svcmla_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmla_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcmla_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svcmla_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcmla_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svcmla_s64_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s64_2u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcmla_s64_2(svint64_t op1, svint64_t op2, svint64_t op3) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svcmla_s64_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_s64_3u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svcmla_s64_3(svint64_t op1, svint64_t op2, svint64_t op3) @@ -257,12 +257,12 @@ // CHECK-LABEL: @test_svcmla_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svcmla_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcmla_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -272,12 +272,12 @@ // CHECK-LABEL: @test_svcmla_u8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcmla_u8_1u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcmla_u8_1(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -287,12 +287,12 @@ // CHECK-LABEL: @test_svcmla_u8_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcmla_u8_2u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcmla_u8_2(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -302,12 +302,12 @@ // CHECK-LABEL: @test_svcmla_u8_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svcmla_u8_3u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svcmla_u8_3(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -317,12 +317,12 @@ // CHECK-LABEL: @test_svcmla_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmla_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcmla_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -332,12 +332,12 @@ // CHECK-LABEL: @test_svcmla_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcmla_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -347,12 +347,12 @@ // CHECK-LABEL: @test_svcmla_u16_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u16_2u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcmla_u16_2(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svcmla_u16_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u16_3u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcmla_u16_3(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -377,12 +377,12 @@ // CHECK-LABEL: @test_svcmla_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmla_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcmla_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -392,12 +392,12 @@ // CHECK-LABEL: @test_svcmla_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcmla_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -407,12 +407,12 @@ // CHECK-LABEL: @test_svcmla_u32_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u32_2u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcmla_u32_2(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -422,12 +422,12 @@ // CHECK-LABEL: @test_svcmla_u32_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u32_3u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcmla_u32_3(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -437,12 +437,12 @@ // CHECK-LABEL: @test_svcmla_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svcmla_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svcmla_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -452,12 +452,12 @@ // CHECK-LABEL: @test_svcmla_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u64_1u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svcmla_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -467,12 +467,12 @@ // CHECK-LABEL: @test_svcmla_u64_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u64_2u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svcmla_u64_2(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -482,12 +482,12 @@ // CHECK-LABEL: @test_svcmla_u64_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svcmla_u64_3u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svcmla_u64_3(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -497,12 +497,12 @@ // CHECK-LABEL: @test_svcmla_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmla_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcmla_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -512,12 +512,12 @@ // CHECK-LABEL: @test_svcmla_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svcmla_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svcmla_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -527,12 +527,12 @@ // CHECK-LABEL: @test_svcmla_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmla_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcmla_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -542,12 +542,12 @@ // CHECK-LABEL: @test_svcmla_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svcmla_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svcmla_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) @@ -557,12 +557,12 @@ // CHECK-LABEL: @test_svcmla_lane_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmla_lane_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcmla_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -572,12 +572,12 @@ // CHECK-LABEL: @test_svcmla_lane_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svcmla_lane_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svcmla_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -587,12 +587,12 @@ // CHECK-LABEL: @test_svcmla_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svcmla_lane_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcmla_lane_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -602,12 +602,12 @@ // CHECK-LABEL: @test_svcmla_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svcmla_lane_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svcmla_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svcvtlt_f32_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtlt_f32_f16_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtlt_f32_f16_m(svfloat32_t inactive, svbool_t pg, svfloat16_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svcvtlt_f64_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtlt_f64_f32_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvtlt_f64_f32_m(svfloat64_t inactive, svbool_t pg, svfloat32_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svcvtlt_f32_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f32f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtlt_f32_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f32f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtlt_f32_f16_x(svbool_t pg, svfloat16_t op) @@ -68,14 +68,14 @@ // CHECK-LABEL: @test_svcvtlt_f64_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f64f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtlt_f64_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtlt.f64f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svcvtlt_f64_f32_x(svbool_t pg, svfloat32_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svcvtnt_f16_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtnt_f16_f32_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvtnt_f16_f32_m(svfloat16_t inactive, svbool_t pg, svfloat32_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svcvtnt_f32_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtnt_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtnt_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svcvtnt_f16_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtnt_f16_f32_xu13__SVFloat16_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svcvtnt_f16_f32_x(svfloat16_t even, svbool_t pg, svfloat32_t op) @@ -68,14 +68,14 @@ // CHECK-LABEL: @test_svcvtnt_f32_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svcvtnt_f32_f64_xu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtnt_f32_f64_x(svfloat32_t even, svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svcvtx_f32_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtx.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtx.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtx_f32_f64_z(svbool_t pg, svfloat64_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svcvtx_f32_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtx.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtx.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtx_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svcvtx_f32_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtx.f32f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtx.f32f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtx_f32_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svcvtxnt_f32_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtxnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svcvtxnt_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtxnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtxnt_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svcvtxnt_f32_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtxnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svcvtxnt_f32_f64_xu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fcvtxnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svcvtxnt_f32_f64_x(svfloat32_t even, svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_sveor3_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_sveor3_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_sveor3_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_sveor3_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor3_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_sveor3_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_sveor3_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor3_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_sveor3_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_sveor3_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor3_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_sveor3_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_sveor3_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_sveor3_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_sveor3_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_sveor3_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor3_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_sveor3_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_sveor3_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor3_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_sveor3_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_sveor3_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveor3_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_sveor3_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor3_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_sveor3_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_sveor3_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_sveor3_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_sveor3_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_sveor3_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_sveor3_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_sveor3_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_sveor3_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveor3_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_sveor3_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_sveorbt_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveorbt_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_sveorbt_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_sveorbt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveorbt_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_sveorbt_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_sveorbt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveorbt_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_sveorbt_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_sveorbt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveorbt_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_sveorbt_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_sveorbt_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveorbt_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_sveorbt_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_sveorbt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveorbt_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_sveorbt_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_sveorbt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveorbt_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_sveorbt_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_sveorbt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveorbt_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_sveorbt_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveorbt_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_sveorbt_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_sveorbt_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_sveorbt_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_sveorbt_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveorbt_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_sveorbt_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_sveorbt_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_sveorbt_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_sveorbt_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_sveortb_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveortb_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_sveortb_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_sveortb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveortb_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_sveortb_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_sveortb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveortb_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_sveortb_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_sveortb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveortb_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_sveortb_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_sveortb_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_sveortb_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_sveortb_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_sveortb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveortb_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_sveortb_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_sveortb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveortb_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_sveortb_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_sveortb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_sveortb_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_sveortb_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveortb_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_sveortb_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_sveortb_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_sveortb_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_sveortb_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_sveortb_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_sveortb_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_sveortb_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_sveortb_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_sveortb_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_sveortb_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svhadd_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svhadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svhadd_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svhadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svhadd_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svhadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svhadd_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svhadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svhadd_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svhadd_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svhadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svhadd_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -133,14 +133,14 @@ // CHECK-LABEL: @test_svhadd_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -152,14 +152,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -169,18 +169,18 @@ // CHECK-LABEL: @test_svhadd_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -190,18 +190,18 @@ // CHECK-LABEL: @test_svhadd_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -211,18 +211,18 @@ // CHECK-LABEL: @test_svhadd_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -251,18 +251,18 @@ // CHECK-LABEL: @test_svhadd_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -272,18 +272,18 @@ // CHECK-LABEL: @test_svhadd_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -293,18 +293,18 @@ // CHECK-LABEL: @test_svhadd_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -315,13 +315,13 @@ // CHECK-LABEL: @test_svhadd_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svhadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -331,16 +331,16 @@ // CHECK-LABEL: @test_svhadd_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -350,16 +350,16 @@ // CHECK-LABEL: @test_svhadd_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -369,16 +369,16 @@ // CHECK-LABEL: @test_svhadd_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -389,13 +389,13 @@ // CHECK-LABEL: @test_svhadd_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svhadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -405,16 +405,16 @@ // CHECK-LABEL: @test_svhadd_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -424,16 +424,16 @@ // CHECK-LABEL: @test_svhadd_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -444,16 +444,16 @@ // CHECK-LABEL: @test_svhadd_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -466,7 +466,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -474,7 +474,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svhadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -484,20 +484,20 @@ // CHECK-LABEL: @test_svhadd_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svhadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -507,20 +507,20 @@ // CHECK-LABEL: @test_svhadd_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svhadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -530,20 +530,20 @@ // CHECK-LABEL: @test_svhadd_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svhadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -556,7 +556,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -564,7 +564,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svhadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -574,20 +574,20 @@ // CHECK-LABEL: @test_svhadd_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svhadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -597,20 +597,20 @@ // CHECK-LABEL: @test_svhadd_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svhadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -620,20 +620,20 @@ // CHECK-LABEL: @test_svhadd_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svhadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -643,12 +643,12 @@ // CHECK-LABEL: @test_svhadd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svhadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -658,14 +658,14 @@ // CHECK-LABEL: @test_svhadd_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svhadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svhadd_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svhadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -692,14 +692,14 @@ // CHECK-LABEL: @test_svhadd_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svhadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -709,12 +709,12 @@ // CHECK-LABEL: @test_svhadd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -724,14 +724,14 @@ // CHECK-LABEL: @test_svhadd_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svhadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -741,14 +741,14 @@ // CHECK-LABEL: @test_svhadd_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -759,14 +759,14 @@ // CHECK-LABEL: @test_svhadd_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -778,14 +778,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -795,18 +795,18 @@ // CHECK-LABEL: @test_svhadd_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -816,18 +816,18 @@ // CHECK-LABEL: @test_svhadd_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -837,18 +837,18 @@ // CHECK-LABEL: @test_svhadd_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -860,14 +860,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -877,18 +877,18 @@ // CHECK-LABEL: @test_svhadd_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -898,18 +898,18 @@ // CHECK-LABEL: @test_svhadd_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -919,18 +919,18 @@ // CHECK-LABEL: @test_svhadd_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svhistcnt_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svhistcnt_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhistcnt_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svhistcnt_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svhistcnt_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhistcnt_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svhistcnt_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svhistcnt_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhistcnt_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -68,14 +68,14 @@ // CHECK-LABEL: @test_svhistcnt_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svhistcnt_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhistcnt_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svhistseg_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svhistseg_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhistseg_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svhistseg_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svhistseg_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhistseg_u8(svuint8_t op1, svuint8_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svhsub_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svhsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -34,16 +34,16 @@ // CHECK-LABEL: @test_svhsub_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -53,16 +53,16 @@ // CHECK-LABEL: @test_svhsub_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -72,16 +72,16 @@ // CHECK-LABEL: @test_svhsub_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -92,13 +92,13 @@ // CHECK-LABEL: @test_svhsub_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svhsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svhsub_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svhsub_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svhsub_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svhsub_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svhsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svhsub_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svhsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svhsub_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svhsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svhsub_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svhsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svhsub_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svhsub_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svhsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svhsub_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svhsub_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svhsub_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svhsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svhsub_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svhsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svhsub_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svhsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,14 +346,14 @@ // CHECK-LABEL: @test_svhsub_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svhsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -363,12 +363,12 @@ // CHECK-LABEL: @test_svhsub_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svhsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svhsub_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svhsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svhsub_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svhsub_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -432,7 +432,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -440,7 +440,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svhsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -450,20 +450,20 @@ // CHECK-LABEL: @test_svhsub_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svhsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -473,20 +473,20 @@ // CHECK-LABEL: @test_svhsub_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svhsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -496,20 +496,20 @@ // CHECK-LABEL: @test_svhsub_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svhsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -522,7 +522,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -530,7 +530,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svhsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -540,20 +540,20 @@ // CHECK-LABEL: @test_svhsub_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svhsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -563,20 +563,20 @@ // CHECK-LABEL: @test_svhsub_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svhsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -586,20 +586,20 @@ // CHECK-LABEL: @test_svhsub_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svhsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -611,14 +611,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -628,18 +628,18 @@ // CHECK-LABEL: @test_svhsub_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -649,18 +649,18 @@ // CHECK-LABEL: @test_svhsub_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -670,18 +670,18 @@ // CHECK-LABEL: @test_svhsub_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -693,14 +693,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -710,18 +710,18 @@ // CHECK-LABEL: @test_svhsub_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -731,18 +731,18 @@ // CHECK-LABEL: @test_svhsub_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -752,18 +752,18 @@ // CHECK-LABEL: @test_svhsub_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -775,14 +775,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -792,18 +792,18 @@ // CHECK-LABEL: @test_svhsub_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -813,18 +813,18 @@ // CHECK-LABEL: @test_svhsub_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -834,18 +834,18 @@ // CHECK-LABEL: @test_svhsub_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -857,14 +857,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -874,18 +874,18 @@ // CHECK-LABEL: @test_svhsub_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -895,18 +895,18 @@ // CHECK-LABEL: @test_svhsub_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -916,18 +916,18 @@ // CHECK-LABEL: @test_svhsub_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svhsubr_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -34,16 +34,16 @@ // CHECK-LABEL: @test_svhsubr_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -53,16 +53,16 @@ // CHECK-LABEL: @test_svhsubr_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -72,16 +72,16 @@ // CHECK-LABEL: @test_svhsubr_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -92,13 +92,13 @@ // CHECK-LABEL: @test_svhsubr_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svhsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svhsubr_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svhsubr_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svhsubr_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svhsubr_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svhsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svhsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svhsubr_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svhsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svhsubr_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svhsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svhsubr_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svhsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svhsubr_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svhsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svhsubr_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svhsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svhsubr_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svhsubr_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svhsubr_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svhsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svhsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svhsubr_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svhsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svhsubr_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svhsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,14 +346,14 @@ // CHECK-LABEL: @test_svhsubr_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svhsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -363,12 +363,12 @@ // CHECK-LABEL: @test_svhsubr_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svhsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svhsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svhsubr_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svhsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svhsubr_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svhsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svhsubr_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svhsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svhsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -432,7 +432,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -440,7 +440,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svhsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -450,20 +450,20 @@ // CHECK-LABEL: @test_svhsubr_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svhsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -473,20 +473,20 @@ // CHECK-LABEL: @test_svhsubr_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svhsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -496,20 +496,20 @@ // CHECK-LABEL: @test_svhsubr_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svhsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -522,7 +522,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -530,7 +530,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svhsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -540,20 +540,20 @@ // CHECK-LABEL: @test_svhsubr_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svhsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -563,20 +563,20 @@ // CHECK-LABEL: @test_svhsubr_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svhsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -586,20 +586,20 @@ // CHECK-LABEL: @test_svhsubr_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svhsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -611,14 +611,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -628,18 +628,18 @@ // CHECK-LABEL: @test_svhsubr_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -649,18 +649,18 @@ // CHECK-LABEL: @test_svhsubr_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -670,18 +670,18 @@ // CHECK-LABEL: @test_svhsubr_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -693,14 +693,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -710,18 +710,18 @@ // CHECK-LABEL: @test_svhsubr_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -731,18 +731,18 @@ // CHECK-LABEL: @test_svhsubr_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -752,18 +752,18 @@ // CHECK-LABEL: @test_svhsubr_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -775,14 +775,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svhsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -792,18 +792,18 @@ // CHECK-LABEL: @test_svhsubr_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svhsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -813,18 +813,18 @@ // CHECK-LABEL: @test_svhsubr_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svhsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -834,18 +834,18 @@ // CHECK-LABEL: @test_svhsubr_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svhsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -857,14 +857,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svhsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -874,18 +874,18 @@ // CHECK-LABEL: @test_svhsubr_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svhsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -895,18 +895,18 @@ // CHECK-LABEL: @test_svhsubr_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svhsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -916,18 +916,18 @@ // CHECK-LABEL: @test_svhsubr_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svhsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldnt1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnt1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldnt1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnt1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { @@ -81,14 +81,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldnt1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnt1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { @@ -113,14 +113,14 @@ // CHECK-LABEL: @test_svldnt1_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnt1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) { @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svldnt1_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnt1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) { @@ -145,14 +145,14 @@ // CHECK-LABEL: @test_svldnt1_gather_s64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnt1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) { @@ -161,14 +161,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldnt1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) { @@ -177,14 +177,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnt1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) { @@ -193,14 +193,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldnt1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) { @@ -209,14 +209,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnt1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) { @@ -225,14 +225,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldnt1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) { @@ -241,14 +241,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnt1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) { @@ -257,14 +257,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svldnt1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -273,14 +273,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnt1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -289,14 +289,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svldnt1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -305,14 +305,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnt1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -321,14 +321,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svldnt1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) { @@ -337,14 +337,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnt1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) { @@ -353,14 +353,14 @@ // CHECK-LABEL: @test_svldnt1_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnt1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) { @@ -369,14 +369,14 @@ // CHECK-LABEL: @test_svldnt1_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnt1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) { @@ -385,14 +385,14 @@ // CHECK-LABEL: @test_svldnt1_gather_s64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnt1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) { @@ -401,14 +401,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svldnt1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) { @@ -417,14 +417,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svldnt1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) { @@ -433,14 +433,14 @@ // CHECK-LABEL: @test_svldnt1_gather_u64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svldnt1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) { @@ -449,16 +449,16 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svldnt1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -467,16 +467,16 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svldnt1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { @@ -485,16 +485,16 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svldnt1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -503,16 +503,16 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svldnt1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { @@ -521,16 +521,16 @@ // CHECK-LABEL: @test_svldnt1_gather_u32base_index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svldnt1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) { @@ -539,16 +539,16 @@ // CHECK-LABEL: @test_svldnt1_gather_u64base_index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svldnt1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c @@ -17,15 +17,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -53,15 +53,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -71,15 +71,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -89,15 +89,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -107,15 +107,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -125,15 +125,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -143,15 +143,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -161,15 +161,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -179,15 +179,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -197,15 +197,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -215,15 +215,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -233,15 +233,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -251,15 +251,15 @@ // CHECK-LABEL: @test_svldnt1sb_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c @@ -17,15 +17,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -53,15 +53,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -71,15 +71,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -89,15 +89,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -107,15 +107,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -125,15 +125,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -143,15 +143,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -161,15 +161,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -179,15 +179,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -197,15 +197,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -215,15 +215,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -233,15 +233,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -251,15 +251,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -269,15 +269,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -287,15 +287,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -305,15 +305,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -323,15 +323,15 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -341,17 +341,17 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -361,17 +361,17 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -381,17 +381,17 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -401,17 +401,17 @@ // CHECK-LABEL: @test_svldnt1sh_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c @@ -17,15 +17,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -53,15 +53,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -71,15 +71,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -89,15 +89,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -107,15 +107,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -125,15 +125,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -143,15 +143,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -161,15 +161,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -179,15 +179,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -197,15 +197,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -215,15 +215,15 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -233,17 +233,17 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -253,17 +253,17 @@ // CHECK-LABEL: @test_svldnt1sw_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c @@ -17,15 +17,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -53,15 +53,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -71,15 +71,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -89,15 +89,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -107,15 +107,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -125,15 +125,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -143,15 +143,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -161,15 +161,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -179,15 +179,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -197,15 +197,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -215,15 +215,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -233,15 +233,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -251,15 +251,15 @@ // CHECK-LABEL: @test_svldnt1ub_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c @@ -17,15 +17,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -53,15 +53,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -71,15 +71,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -89,15 +89,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -107,15 +107,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -125,15 +125,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -143,15 +143,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -161,15 +161,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -179,15 +179,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -197,15 +197,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -215,15 +215,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -233,15 +233,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -251,15 +251,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -269,15 +269,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -287,15 +287,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -305,15 +305,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -323,15 +323,15 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -341,17 +341,17 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -361,17 +361,17 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -381,17 +381,17 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -401,17 +401,17 @@ // CHECK-LABEL: @test_svldnt1uh_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c @@ -17,15 +17,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -35,15 +35,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z33test_svldnt1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -53,15 +53,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -71,15 +71,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -89,15 +89,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -107,15 +107,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -125,15 +125,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -143,15 +143,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z40test_svldnt1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -161,15 +161,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -179,15 +179,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -197,15 +197,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -215,15 +215,15 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -233,17 +233,17 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // @@ -253,17 +253,17 @@ // CHECK-LABEL: @test_svldnt1uw_gather_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z39test_svldnt1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CPP-CHECK-NEXT: ret [[TMP3]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svlogb_f16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f16_zu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlogb_f16_z(svbool_t pg, svfloat16_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svlogb_f32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f32_zu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlogb_f32_z(svbool_t pg, svfloat32_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svlogb_f64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f64_zu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svlogb_f64_z(svbool_t pg, svfloat64_t op) @@ -68,14 +68,14 @@ // CHECK-LABEL: @test_svlogb_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f16_mu11__SVInt16_tu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlogb_f16_m(svint16_t inactive, svbool_t pg, svfloat16_t op) @@ -85,14 +85,14 @@ // CHECK-LABEL: @test_svlogb_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f32_mu11__SVInt32_tu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlogb_f32_m(svint32_t inactive, svbool_t pg, svfloat32_t op) @@ -102,14 +102,14 @@ // CHECK-LABEL: @test_svlogb_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f64_mu11__SVInt64_tu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svlogb_f64_m(svint64_t inactive, svbool_t pg, svfloat64_t op) @@ -119,14 +119,14 @@ // CHECK-LABEL: @test_svlogb_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f16_xu10__SVBool_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svlogb_f16_x(svbool_t pg, svfloat16_t op) @@ -136,14 +136,14 @@ // CHECK-LABEL: @test_svlogb_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f32_xu10__SVBool_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svlogb_f32_x(svbool_t pg, svfloat32_t op) @@ -153,14 +153,14 @@ // CHECK-LABEL: @test_svlogb_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svlogb_f64_xu10__SVBool_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.flogb.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svlogb_f64_x(svbool_t pg, svfloat64_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmatch_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmatch_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svmatch_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -32,16 +32,16 @@ // CHECK-LABEL: @test_svmatch_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmatch_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svmatch_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -51,12 +51,12 @@ // CHECK-LABEL: @test_svmatch_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmatch_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svmatch_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -66,16 +66,16 @@ // CHECK-LABEL: @test_svmatch_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svmatch_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svmatch_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svmaxnmp_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxnmp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svmaxnmp_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxnmp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svmaxnmp_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxnmp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -68,14 +68,14 @@ // CHECK-LABEL: @test_svmaxnmp_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxnmp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -85,14 +85,14 @@ // CHECK-LABEL: @test_svmaxnmp_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxnmp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -102,14 +102,14 @@ // CHECK-LABEL: @test_svmaxnmp_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxnmp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmaxp_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmaxp_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmaxp_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svmaxp_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmaxp_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svmaxp_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmaxp_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svmaxp_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmaxp_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svmaxp_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmaxp_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmaxp_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svmaxp_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmaxp_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svmaxp_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmaxp_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svmaxp_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmaxp_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svmaxp_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmaxp_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmaxp_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svmaxp_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmaxp_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svmaxp_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmaxp_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svmaxp_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmaxp_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -215,12 +215,12 @@ // CHECK-LABEL: @test_svmaxp_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmaxp_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmaxp_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -230,14 +230,14 @@ // CHECK-LABEL: @test_svmaxp_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmaxp_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -247,14 +247,14 @@ // CHECK-LABEL: @test_svmaxp_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmaxp_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -264,14 +264,14 @@ // CHECK-LABEL: @test_svmaxp_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmaxp_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svmaxp_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -298,14 +298,14 @@ // CHECK-LABEL: @test_svmaxp_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -315,14 +315,14 @@ // CHECK-LABEL: @test_svmaxp_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -332,14 +332,14 @@ // CHECK-LABEL: @test_svmaxp_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -349,14 +349,14 @@ // CHECK-LABEL: @test_svmaxp_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -366,14 +366,14 @@ // CHECK-LABEL: @test_svmaxp_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmaxp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svminnmp_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svminnmp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminnmp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svminnmp_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svminnmp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminnmp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svminnmp_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svminnmp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminnmp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -68,14 +68,14 @@ // CHECK-LABEL: @test_svminnmp_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svminnmp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminnmp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -85,14 +85,14 @@ // CHECK-LABEL: @test_svminnmp_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svminnmp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminnmp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -102,14 +102,14 @@ // CHECK-LABEL: @test_svminnmp_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svminnmp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminnmp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svminp_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svminp_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svminp_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svminp_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svminp_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svminp_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svminp_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svminp_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svminp_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svminp_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svminp_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svminp_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svminp_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svminp_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svminp_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svminp_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svminp_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svminp_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svminp_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svminp_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svminp_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svminp_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svminp_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svminp_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svminp_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svminp_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svminp_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -215,12 +215,12 @@ // CHECK-LABEL: @test_svminp_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svminp_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svminp_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -230,14 +230,14 @@ // CHECK-LABEL: @test_svminp_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svminp_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -247,14 +247,14 @@ // CHECK-LABEL: @test_svminp_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svminp_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -264,14 +264,14 @@ // CHECK-LABEL: @test_svminp_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svminp_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -281,14 +281,14 @@ // CHECK-LABEL: @test_svminp_f16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -298,14 +298,14 @@ // CHECK-LABEL: @test_svminp_f32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -315,14 +315,14 @@ // CHECK-LABEL: @test_svminp_f64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -332,14 +332,14 @@ // CHECK-LABEL: @test_svminp_f16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -349,14 +349,14 @@ // CHECK-LABEL: @test_svminp_f32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -366,14 +366,14 @@ // CHECK-LABEL: @test_svminp_f64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svminp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmla_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmla_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmla_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmla_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmla_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmla_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmla_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmla_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmla_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmla_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmla_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmla_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svmla_lane_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmla_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svmla_lane_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmla_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svmla_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmla_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svmla_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmla_lane_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmla_lane_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svmla_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmla_lane_u64_1u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmla_lane_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmlalb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmlalb_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmlalb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlalb_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmlalb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlalb_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmlalb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalb_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmlalb_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmlalb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalb_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlalb_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmlalb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalb_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlalb_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmlalb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmlalb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmlalb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmlalb_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmlalb_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmlalb_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) @@ -221,12 +221,12 @@ // CHECK-LABEL: @test_svmlalb_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlalb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -236,12 +236,12 @@ // CHECK-LABEL: @test_svmlalb_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlalb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -251,12 +251,12 @@ // CHECK-LABEL: @test_svmlalb_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlalb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -266,12 +266,12 @@ // CHECK-LABEL: @test_svmlalb_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlalb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) @@ -281,12 +281,12 @@ // CHECK-LABEL: @test_svmlalb_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlalb_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmlalb_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlalb_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -311,12 +311,12 @@ // CHECK-LABEL: @test_svmlalb_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlalb_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -326,12 +326,12 @@ // CHECK-LABEL: @test_svmlalb_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlalb_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -341,12 +341,12 @@ // CHECK-LABEL: @test_svmlalb_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalb_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlalb_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -358,14 +358,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalb_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmlalb_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) @@ -375,12 +375,12 @@ // CHECK-LABEL: @test_svmlalb_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlalb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -390,12 +390,12 @@ // CHECK-LABEL: @test_svmlalb_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlalb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmlalt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmlalt_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmlalt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlalt_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmlalt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlalt_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmlalt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalt_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmlalt_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmlalt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalt_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlalt_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmlalt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalt_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlalt_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmlalt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmlalt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmlalt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmlalt_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmlalt_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmlalt_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) @@ -221,12 +221,12 @@ // CHECK-LABEL: @test_svmlalt_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlalt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -236,12 +236,12 @@ // CHECK-LABEL: @test_svmlalt_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlalt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -251,12 +251,12 @@ // CHECK-LABEL: @test_svmlalt_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlalt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -266,12 +266,12 @@ // CHECK-LABEL: @test_svmlalt_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlalt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) @@ -281,12 +281,12 @@ // CHECK-LABEL: @test_svmlalt_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlalt_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmlalt_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlalt_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -311,12 +311,12 @@ // CHECK-LABEL: @test_svmlalt_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlalt_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -326,12 +326,12 @@ // CHECK-LABEL: @test_svmlalt_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlalt_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -341,12 +341,12 @@ // CHECK-LABEL: @test_svmlalt_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlalt_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlalt_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -358,14 +358,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlalt_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmlalt_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) @@ -375,12 +375,12 @@ // CHECK-LABEL: @test_svmlalt_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlalt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -390,12 +390,12 @@ // CHECK-LABEL: @test_svmlalt_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlalt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmls_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmls_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmls_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmls_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmls_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmls_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmls_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmls_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmls_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmls_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmls_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmls_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svmls_lane_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmls_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svmls_lane_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmls_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svmls_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmls_lane_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svmls_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmls_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svmls_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmls_lane_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmls_lane_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svmls_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmls_lane_u64_1u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmls_lane_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmlslb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmlslb_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmlslb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlslb_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmlslb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlslb_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmlslb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslb_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmlslb_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmlslb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslb_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlslb_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmlslb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslb_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlslb_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmlslb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmlslb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmlslb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmlslb_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmlslb_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmlslb_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) @@ -221,12 +221,12 @@ // CHECK-LABEL: @test_svmlslb_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlslb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -236,12 +236,12 @@ // CHECK-LABEL: @test_svmlslb_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlslb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -251,12 +251,12 @@ // CHECK-LABEL: @test_svmlslb_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlslb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -266,12 +266,12 @@ // CHECK-LABEL: @test_svmlslb_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlslb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) @@ -281,12 +281,12 @@ // CHECK-LABEL: @test_svmlslb_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlslb_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmlslb_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlslb_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -311,12 +311,12 @@ // CHECK-LABEL: @test_svmlslb_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlslb_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -326,12 +326,12 @@ // CHECK-LABEL: @test_svmlslb_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlslb_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -341,12 +341,12 @@ // CHECK-LABEL: @test_svmlslb_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslb_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlslb_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -358,14 +358,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslb_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmlslb_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) @@ -375,12 +375,12 @@ // CHECK-LABEL: @test_svmlslb_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlslb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -390,12 +390,12 @@ // CHECK-LABEL: @test_svmlslb_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlslb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmlslt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmlslt_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmlslt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlslt_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmlslt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlslt_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmlslt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslt_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmlslt_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmlslt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslt_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlslt_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmlslt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslt_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlslt_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmlslt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmlslt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmlslt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u16u12__SVUint16_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmlslt_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u32u12__SVUint32_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmlslt_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u64u12__SVUint64_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmlslt_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) @@ -221,12 +221,12 @@ // CHECK-LABEL: @test_svmlslt_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlslt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -236,12 +236,12 @@ // CHECK-LABEL: @test_svmlslt_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmlslt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -251,12 +251,12 @@ // CHECK-LABEL: @test_svmlslt_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlslt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -266,12 +266,12 @@ // CHECK-LABEL: @test_svmlslt_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmlslt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) @@ -281,12 +281,12 @@ // CHECK-LABEL: @test_svmlslt_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlslt_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmlslt_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmlslt_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) @@ -311,12 +311,12 @@ // CHECK-LABEL: @test_svmlslt_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlslt_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -326,12 +326,12 @@ // CHECK-LABEL: @test_svmlslt_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmlslt_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) @@ -341,12 +341,12 @@ // CHECK-LABEL: @test_svmlslt_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmlslt_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlslt_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -358,14 +358,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmlslt_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmlslt_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) @@ -375,12 +375,12 @@ // CHECK-LABEL: @test_svmlslt_lane_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlslt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) @@ -390,12 +390,12 @@ // CHECK-LABEL: @test_svmlslt_lane_f32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svmlslt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmovlb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlb_s16u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmovlb_s16(svint8_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmovlb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlb_s32u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmovlb_s32(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmovlb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlb_s64u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmovlb_s64(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmovlb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlb_u16u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmovlb_u16(svuint8_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmovlb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlb_u32u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmovlb_u32(svuint16_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmovlb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlb_u64u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmovlb_u64(svuint32_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmovlt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlt_s16u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmovlt_s16(svint8_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmovlt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlt_s32u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmovlt_s32(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmovlt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlt_s64u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmovlt_s64(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmovlt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlt_u16u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmovlt_u16(svuint8_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmovlt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlt_u32u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmovlt_u32(svuint16_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmovlt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmovlt_u64u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmovlt_u64(svuint32_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmul_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmul_lane_s16(svint16_t op1, svint16_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmul_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmul_lane_s16_1(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmul_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmul_lane_s32(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmul_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmul_lane_s32_1(svint32_t op1, svint32_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmul_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmul_lane_s64(svint64_t op1, svint64_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmul_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmul_lane_s64_1(svint64_t op1, svint64_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svmul_lane_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmul_lane_u16(svuint16_t op1, svuint16_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svmul_lane_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_u16_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmul_lane_u16_1(svuint16_t op1, svuint16_t op2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svmul_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmul_lane_u32(svuint32_t op1, svuint32_t op2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svmul_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_u32_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmul_lane_u32_1(svuint32_t op1, svuint32_t op2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svmul_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svmul_lane_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmul_lane_u64(svuint64_t op1, svuint64_t op2) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svmul_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmul_lane_u64_1u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmul_lane_u64_1(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmullb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullb_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmullb_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmullb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullb_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmullb_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmullb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullb_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmullb_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmullb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullb_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmullb_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmullb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullb_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmullb_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmullb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullb_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmullb_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmullb_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmullb_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmullb_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmullb_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmullb_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmullb_n_u64(svuint32_t op1, uint32_t op2) @@ -221,12 +221,12 @@ // CHECK-LABEL: @test_svmullb_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullb_lane_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmullb_lane_s32(svint16_t op1, svint16_t op2) @@ -236,12 +236,12 @@ // CHECK-LABEL: @test_svmullb_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullb_lane_s32_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmullb_lane_s32_1(svint16_t op1, svint16_t op2) @@ -251,12 +251,12 @@ // CHECK-LABEL: @test_svmullb_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullb_lane_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmullb_lane_s64(svint32_t op1, svint32_t op2) @@ -266,12 +266,12 @@ // CHECK-LABEL: @test_svmullb_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullb_lane_s64_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmullb_lane_s64_1(svint32_t op1, svint32_t op2) @@ -281,12 +281,12 @@ // CHECK-LABEL: @test_svmullb_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullb_lane_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmullb_lane_u32(svuint16_t op1, svuint16_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmullb_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullb_lane_u32_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmullb_lane_u32_1(svuint16_t op1, svuint16_t op2) @@ -311,12 +311,12 @@ // CHECK-LABEL: @test_svmullb_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullb_lane_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmullb_lane_u64(svuint32_t op1, svuint32_t op2) @@ -326,12 +326,12 @@ // CHECK-LABEL: @test_svmullb_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullb_lane_u64_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmullb_lane_u64_1(svuint32_t op1, svuint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svmullt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullt_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svmullt_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svmullt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullt_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmullt_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svmullt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullt_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmullt_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svmullt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullt_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svmullt_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svmullt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullt_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmullt_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svmullt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svmullt_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmullt_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmullt_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmullt_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmullt_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmullt_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmullt_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmullt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmullt_n_u64(svuint32_t op1, uint32_t op2) @@ -221,12 +221,12 @@ // CHECK-LABEL: @test_svmullt_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullt_lane_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmullt_lane_s32(svint16_t op1, svint16_t op2) @@ -236,12 +236,12 @@ // CHECK-LABEL: @test_svmullt_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullt_lane_s32_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svmullt_lane_s32_1(svint16_t op1, svint16_t op2) @@ -251,12 +251,12 @@ // CHECK-LABEL: @test_svmullt_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullt_lane_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmullt_lane_s64(svint32_t op1, svint32_t op2) @@ -266,12 +266,12 @@ // CHECK-LABEL: @test_svmullt_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullt_lane_s64_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svmullt_lane_s64_1(svint32_t op1, svint32_t op2) @@ -281,12 +281,12 @@ // CHECK-LABEL: @test_svmullt_lane_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullt_lane_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmullt_lane_u32(svuint16_t op1, svuint16_t op2) @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmullt_lane_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullt_lane_u32_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svmullt_lane_u32_1(svuint16_t op1, svuint16_t op2) @@ -311,12 +311,12 @@ // CHECK-LABEL: @test_svmullt_lane_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svmullt_lane_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmullt_lane_u64(svuint32_t op1, svuint32_t op2) @@ -326,12 +326,12 @@ // CHECK-LABEL: @test_svmullt_lane_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svmullt_lane_u64_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svmullt_lane_u64_1(svuint32_t op1, svuint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svnbsl_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svnbsl_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svnbsl_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svnbsl_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnbsl_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svnbsl_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svnbsl_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnbsl_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svnbsl_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svnbsl_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnbsl_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svnbsl_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svnbsl_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svnbsl_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svnbsl_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svnbsl_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnbsl_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svnbsl_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svnbsl_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnbsl_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svnbsl_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svnbsl_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svnbsl_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svnbsl_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -139,14 +139,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnbsl_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svnbsl_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -158,14 +158,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svnbsl_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -177,14 +177,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svnbsl_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -196,14 +196,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svnbsl_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -215,14 +215,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svnbsl_n_u8u11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svnbsl_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u16u12__SVUint16_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svnbsl_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -253,14 +253,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svnbsl_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -272,14 +272,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svnbsl_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svnmatch_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svnmatch_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svnmatch_s8(svbool_t pg, svint8_t op1, svint8_t op2) @@ -32,16 +32,16 @@ // CHECK-LABEL: @test_svnmatch_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmatch_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svnmatch_s16(svbool_t pg, svint16_t op1, svint16_t op2) @@ -51,12 +51,12 @@ // CHECK-LABEL: @test_svnmatch_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svnmatch_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svnmatch_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -66,16 +66,16 @@ // CHECK-LABEL: @test_svnmatch_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svnmatch_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbool_t test_svnmatch_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svpmul_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svpmul_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svpmul_u8(svuint8_t op1, svuint8_t op2) @@ -34,14 +34,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svpmul_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svpmul_n_u8(svuint8_t op1, uint8_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svpmullb_pair_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svpmullb_pair_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svpmullb_pair_u8(svuint8_t op1, svuint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svpmullb_pair_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svpmullb_pair_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svpmullb_pair_u32(svuint32_t op1, svuint32_t op2) @@ -49,14 +49,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svpmullb_pair_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svpmullb_pair_n_u8(svuint8_t op1, uint8_t op2) @@ -68,14 +68,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullb_pair_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svpmullb_pair_n_u32(svuint32_t op1, uint32_t op2) @@ -85,13 +85,13 @@ // CHECK-LABEL: @test_svpmullb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svpmullb_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -102,13 +102,13 @@ // CHECK-LABEL: @test_svpmullb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svpmullb_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -121,7 +121,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // @@ -129,7 +129,7 @@ // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -142,7 +142,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // @@ -150,7 +150,7 @@ // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svpmullb_pair_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svpmullb_pair_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svpmullb_pair_u64(svuint64_t op1, svuint64_t op2) @@ -34,14 +34,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullb_pair_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svpmullb_pair_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svpmullt_pair_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svpmullt_pair_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svpmullt_pair_u8(svuint8_t op1, svuint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svpmullt_pair_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svpmullt_pair_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svpmullt_pair_u32(svuint32_t op1, svuint32_t op2) @@ -49,14 +49,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z23test_svpmullt_pair_n_u8u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svpmullt_pair_n_u8(svuint8_t op1, uint8_t op2) @@ -68,14 +68,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullt_pair_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svpmullt_pair_n_u32(svuint32_t op1, uint32_t op2) @@ -85,13 +85,13 @@ // CHECK-LABEL: @test_svpmullt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svpmullt_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -102,13 +102,13 @@ // CHECK-LABEL: @test_svpmullt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svpmullt_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to // CPP-CHECK-NEXT: ret [[TMP1]] // @@ -121,7 +121,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // @@ -129,7 +129,7 @@ // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // @@ -142,7 +142,7 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // @@ -150,7 +150,7 @@ // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to // CPP-CHECK-NEXT: ret [[TMP2]] // diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svpmullt_pair_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svpmullt_pair_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svpmullt_pair_u64(svuint64_t op1, svuint64_t op2) @@ -34,14 +34,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z24test_svpmullt_pair_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svpmullt_pair_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqabs_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqabs_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqabs_s8_z(svbool_t pg, svint8_t op) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svqabs_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqabs_s16_z(svbool_t pg, svint16_t op) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svqabs_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqabs_s32_z(svbool_t pg, svint32_t op) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svqabs_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqabs_s64_z(svbool_t pg, svint64_t op) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svqabs_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqabs_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqabs_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svqabs_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqabs_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svqabs_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqabs_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svqabs_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqabs_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqabs_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqabs_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqabs_s8_x(svbool_t pg, svint8_t op) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svqabs_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqabs_s16_x(svbool_t pg, svint16_t op) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svqabs_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqabs_s32_x(svbool_t pg, svint32_t op) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svqabs_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqabs_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqabs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqabs_s64_x(svbool_t pg, svint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqadd_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svqadd_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svqadd_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svqadd_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svqadd_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svqadd_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svqadd_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -133,14 +133,14 @@ // CHECK-LABEL: @test_svqadd_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -152,14 +152,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -169,18 +169,18 @@ // CHECK-LABEL: @test_svqadd_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -190,18 +190,18 @@ // CHECK-LABEL: @test_svqadd_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -211,18 +211,18 @@ // CHECK-LABEL: @test_svqadd_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -234,14 +234,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -251,18 +251,18 @@ // CHECK-LABEL: @test_svqadd_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -272,18 +272,18 @@ // CHECK-LABEL: @test_svqadd_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -293,18 +293,18 @@ // CHECK-LABEL: @test_svqadd_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -315,13 +315,13 @@ // CHECK-LABEL: @test_svqadd_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -331,16 +331,16 @@ // CHECK-LABEL: @test_svqadd_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -350,16 +350,16 @@ // CHECK-LABEL: @test_svqadd_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -369,16 +369,16 @@ // CHECK-LABEL: @test_svqadd_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -389,13 +389,13 @@ // CHECK-LABEL: @test_svqadd_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -405,16 +405,16 @@ // CHECK-LABEL: @test_svqadd_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -424,16 +424,16 @@ // CHECK-LABEL: @test_svqadd_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -444,16 +444,16 @@ // CHECK-LABEL: @test_svqadd_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -466,7 +466,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -474,7 +474,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svqadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -484,20 +484,20 @@ // CHECK-LABEL: @test_svqadd_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svqadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -507,20 +507,20 @@ // CHECK-LABEL: @test_svqadd_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svqadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -530,20 +530,20 @@ // CHECK-LABEL: @test_svqadd_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svqadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -556,7 +556,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -564,7 +564,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svqadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -574,20 +574,20 @@ // CHECK-LABEL: @test_svqadd_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svqadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -597,20 +597,20 @@ // CHECK-LABEL: @test_svqadd_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svqadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -620,20 +620,20 @@ // CHECK-LABEL: @test_svqadd_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svqadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -643,12 +643,12 @@ // CHECK-LABEL: @test_svqadd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -658,14 +658,14 @@ // CHECK-LABEL: @test_svqadd_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svqadd_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -692,14 +692,14 @@ // CHECK-LABEL: @test_svqadd_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -709,12 +709,12 @@ // CHECK-LABEL: @test_svqadd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -724,14 +724,14 @@ // CHECK-LABEL: @test_svqadd_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -741,14 +741,14 @@ // CHECK-LABEL: @test_svqadd_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -759,14 +759,14 @@ // CHECK-LABEL: @test_svqadd_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -778,14 +778,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -795,18 +795,18 @@ // CHECK-LABEL: @test_svqadd_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -816,18 +816,18 @@ // CHECK-LABEL: @test_svqadd_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -837,18 +837,18 @@ // CHECK-LABEL: @test_svqadd_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -860,14 +860,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -877,18 +877,18 @@ // CHECK-LABEL: @test_svqadd_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -898,18 +898,18 @@ // CHECK-LABEL: @test_svqadd_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -919,18 +919,18 @@ // CHECK-LABEL: @test_svqadd_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqcadd_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svqcadd_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqcadd_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqcadd_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqcadd_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqcadd_s8_1(svint8_t op1, svint8_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqcadd_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqcadd_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqcadd_s16(svint16_t op1, svint16_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqcadd_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqcadd_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqcadd_s16_1(svint16_t op1, svint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqcadd_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqcadd_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqcadd_s32(svint32_t op1, svint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqcadd_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqcadd_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqcadd_s32_1(svint32_t op1, svint32_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svqcadd_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqcadd_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqcadd_s64(svint64_t op1, svint64_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svqcadd_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqcadd_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqcadd_s64_1(svint64_t op1, svint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmlalb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlalb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmlalb_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmlalb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlalb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlalb_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmlalb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlalb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlalb_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmlalb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmlalb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmlalb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -119,12 +119,12 @@ // CHECK-LABEL: @test_svqdmlalb_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlalb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlalb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -134,12 +134,12 @@ // CHECK-LABEL: @test_svqdmlalb_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlalb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlalb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqdmlalb_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlalb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlalb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svqdmlalb_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlalb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlalb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmlalbt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqdmlalbt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmlalbt_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmlalbt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqdmlalbt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlalbt_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmlalbt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqdmlalbt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlalbt_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmlalbt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmlalbt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmlalbt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmlalt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlalt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmlalt_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmlalt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlalt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlalt_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmlalt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlalt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlalt_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmlalt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmlalt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmlalt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -119,12 +119,12 @@ // CHECK-LABEL: @test_svqdmlalt_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlalt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlalt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -134,12 +134,12 @@ // CHECK-LABEL: @test_svqdmlalt_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlalt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlalt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqdmlalt_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlalt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlalt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svqdmlalt_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlalt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlalt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmlslb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlslb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmlslb_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmlslb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlslb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlslb_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmlslb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlslb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlslb_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmlslb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmlslb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmlslb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -119,12 +119,12 @@ // CHECK-LABEL: @test_svqdmlslb_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlslb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlslb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -134,12 +134,12 @@ // CHECK-LABEL: @test_svqdmlslb_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlslb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlslb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqdmlslb_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlslb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlslb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svqdmlslb_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlslb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlslb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmlslbt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqdmlslbt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmlslbt_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmlslbt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqdmlslbt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlslbt_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmlslbt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqdmlslbt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlslbt_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmlslbt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmlslbt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmlslbt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmlslt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlslt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmlslt_s16(svint16_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmlslt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlslt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlslt_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmlslt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmlslt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlslt_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s16u11__SVInt16_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmlslt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s32u11__SVInt32_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmlslt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s64u11__SVInt64_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmlslt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) @@ -119,12 +119,12 @@ // CHECK-LABEL: @test_svqdmlslt_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlslt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlslt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) @@ -134,12 +134,12 @@ // CHECK-LABEL: @test_svqdmlslt_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlslt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmlslt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqdmlslt_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmlslt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlslt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svqdmlslt_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmlslt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmlslt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmulh_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqdmulh_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqdmulh_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmulh_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqdmulh_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmulh_s16(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmulh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqdmulh_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmulh_s32(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqdmulh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqdmulh_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmulh_s64(svint64_t op1, svint64_t op2) @@ -79,14 +79,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqdmulh_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqdmulh_n_s8(svint8_t op1, int8_t op2) @@ -98,14 +98,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmulh_n_s16(svint16_t op1, int16_t op2) @@ -117,14 +117,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmulh_n_s32(svint32_t op1, int32_t op2) @@ -136,14 +136,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmulh_n_s64(svint64_t op1, int64_t op2) @@ -153,12 +153,12 @@ // CHECK-LABEL: @test_svqdmulh_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdmulh_lane_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmulh_lane_s16(svint16_t op1, svint16_t op2) @@ -168,12 +168,12 @@ // CHECK-LABEL: @test_svqdmulh_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z24test_svqdmulh_lane_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmulh_lane_s16_1(svint16_t op1, svint16_t op2) @@ -183,12 +183,12 @@ // CHECK-LABEL: @test_svqdmulh_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdmulh_lane_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmulh_lane_s32(svint32_t op1, svint32_t op2) @@ -198,12 +198,12 @@ // CHECK-LABEL: @test_svqdmulh_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z24test_svqdmulh_lane_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmulh_lane_s32_1(svint32_t op1, svint32_t op2) @@ -213,12 +213,12 @@ // CHECK-LABEL: @test_svqdmulh_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqdmulh_lane_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmulh_lane_s64(svint64_t op1, svint64_t op2) @@ -228,12 +228,12 @@ // CHECK-LABEL: @test_svqdmulh_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z24test_svqdmulh_lane_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmulh_lane_s64_1(svint64_t op1, svint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmullb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmullb_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmullb_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmullb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmullb_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmullb_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmullb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmullb_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmullb_s64(svint32_t op1, svint32_t op2) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmullb_n_s16(svint8_t op1, int8_t op2) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmullb_n_s32(svint16_t op1, int16_t op2) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmullb_n_s64(svint32_t op1, int32_t op2) @@ -119,12 +119,12 @@ // CHECK-LABEL: @test_svqdmullb_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmullb_lane_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmullb_lane_s32(svint16_t op1, svint16_t op2) @@ -134,12 +134,12 @@ // CHECK-LABEL: @test_svqdmullb_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmullb_lane_s32_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmullb_lane_s32_1(svint16_t op1, svint16_t op2) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqdmullb_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmullb_lane_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmullb_lane_s64(svint32_t op1, svint32_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svqdmullb_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmullb_lane_s64_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmullb_lane_s64_1(svint32_t op1, svint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqdmullt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmullt_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqdmullt_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqdmullt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmullt_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmullt_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqdmullt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqdmullt_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmullt_s64(svint32_t op1, svint32_t op2) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqdmullt_n_s16(svint8_t op1, int8_t op2) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqdmullt_n_s32(svint16_t op1, int16_t op2) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqdmullt_n_s64(svint32_t op1, int32_t op2) @@ -119,12 +119,12 @@ // CHECK-LABEL: @test_svqdmullt_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmullt_lane_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmullt_lane_s32(svint16_t op1, svint16_t op2) @@ -134,12 +134,12 @@ // CHECK-LABEL: @test_svqdmullt_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmullt_lane_s32_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqdmullt_lane_s32_1(svint16_t op1, svint16_t op2) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqdmullt_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqdmullt_lane_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmullt_lane_s64(svint32_t op1, svint32_t op2) @@ -164,12 +164,12 @@ // CHECK-LABEL: @test_svqdmullt_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqdmullt_lane_s64_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqdmullt_lane_s64_1(svint32_t op1, svint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqneg_s8_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqneg_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqneg_s8_z(svbool_t pg, svint8_t op) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svqneg_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqneg_s16_z(svbool_t pg, svint16_t op) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svqneg_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqneg_s32_z(svbool_t pg, svint32_t op) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svqneg_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqneg_s64_z(svbool_t pg, svint64_t op) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svqneg_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqneg_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqneg_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svqneg_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqneg_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svqneg_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqneg_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svqneg_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqneg_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svqneg_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqneg_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqneg_s8_x(svbool_t pg, svint8_t op) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svqneg_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqneg_s16_x(svbool_t pg, svint16_t op) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svqneg_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqneg_s32_x(svbool_t pg, svint32_t op) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svqneg_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqneg_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqneg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqneg_s64_x(svbool_t pg, svint64_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdcmlah_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrdcmlah_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrdcmlah_s8_1u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrdcmlah_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s8_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrdcmlah_s8_2u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrdcmlah_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s8_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrdcmlah_s8_3u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrdcmlah_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqrdcmlah_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdcmlah_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdcmlah_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s16_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s16_2u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdcmlah_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s16_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s16_3u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdcmlah_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqrdcmlah_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdcmlah_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdcmlah_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s32_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s32_2u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdcmlah_s32_2(svint32_t op1, svint32_t op2, svint32_t op3) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s32_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s32_3u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdcmlah_s32_3(svint32_t op1, svint32_t op2, svint32_t op3) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqrdcmlah_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdcmlah_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdcmlah_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s64_2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s64_2u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdcmlah_s64_2(svint64_t op1, svint64_t op2, svint64_t op3) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svqrdcmlah_s64_3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s64_3u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdcmlah_s64_3(svint64_t op1, svint64_t op2, svint64_t op3) @@ -257,12 +257,12 @@ // CHECK-LABEL: @test_svqrdcmlah_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z24test_svqrdcmlah_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdcmlah_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -272,12 +272,12 @@ // CHECK-LABEL: @test_svqrdcmlah_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z26test_svqrdcmlah_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdcmlah_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -287,12 +287,12 @@ // CHECK-LABEL: @test_svqrdcmlah_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z24test_svqrdcmlah_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdcmlah_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -302,12 +302,12 @@ // CHECK-LABEL: @test_svqrdcmlah_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z26test_svqrdcmlah_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdcmlah_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrdmlah_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqrdmlah_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrdmlah_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrdmlah_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmlah_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmlah_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrdmlah_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmlah_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmlah_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrdmlah_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmlah_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmlah_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -79,14 +79,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrdmlah_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqrdmlah_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -98,14 +98,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqrdmlah_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -117,14 +117,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqrdmlah_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -136,14 +136,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqrdmlah_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -153,12 +153,12 @@ // CHECK-LABEL: @test_svqrdmlah_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmlah_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmlah_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -168,12 +168,12 @@ // CHECK-LABEL: @test_svqrdmlah_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmlah_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmlah_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -183,12 +183,12 @@ // CHECK-LABEL: @test_svqrdmlah_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmlah_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmlah_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -198,12 +198,12 @@ // CHECK-LABEL: @test_svqrdmlah_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmlah_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmlah_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) @@ -213,12 +213,12 @@ // CHECK-LABEL: @test_svqrdmlah_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmlah_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmlah_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -228,12 +228,12 @@ // CHECK-LABEL: @test_svqrdmlah_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmlah_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmlah_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrdmlsh_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqrdmlsh_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrdmlsh_s8(svint8_t op1, svint8_t op2, svint8_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrdmlsh_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmlsh_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmlsh_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrdmlsh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmlsh_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmlsh_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrdmlsh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmlsh_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmlsh_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -79,14 +79,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrdmlsh_n_s8u10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqrdmlsh_n_s8(svint8_t op1, svint8_t op2, int8_t op3) @@ -98,14 +98,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s16u11__SVInt16_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqrdmlsh_n_s16(svint16_t op1, svint16_t op2, int16_t op3) @@ -117,14 +117,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s32u11__SVInt32_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqrdmlsh_n_s32(svint32_t op1, svint32_t op2, int32_t op3) @@ -136,14 +136,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s64u11__SVInt64_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqrdmlsh_n_s64(svint64_t op1, svint64_t op2, int64_t op3) @@ -153,12 +153,12 @@ // CHECK-LABEL: @test_svqrdmlsh_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmlsh_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmlsh_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) @@ -168,12 +168,12 @@ // CHECK-LABEL: @test_svqrdmlsh_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmlsh_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmlsh_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) @@ -183,12 +183,12 @@ // CHECK-LABEL: @test_svqrdmlsh_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmlsh_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmlsh_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) @@ -198,12 +198,12 @@ // CHECK-LABEL: @test_svqrdmlsh_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmlsh_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmlsh_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) @@ -213,12 +213,12 @@ // CHECK-LABEL: @test_svqrdmlsh_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmlsh_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmlsh_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) @@ -228,12 +228,12 @@ // CHECK-LABEL: @test_svqrdmlsh_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmlsh_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmlsh_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrdmulh_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqrdmulh_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrdmulh_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrdmulh_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmulh_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmulh_s16(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrdmulh_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmulh_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmulh_s32(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrdmulh_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svqrdmulh_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmulh_s64(svint64_t op1, svint64_t op2) @@ -79,14 +79,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrdmulh_n_s8u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqrdmulh_n_s8(svint8_t op1, int8_t op2) @@ -98,14 +98,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqrdmulh_n_s16(svint16_t op1, int16_t op2) @@ -117,14 +117,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqrdmulh_n_s32(svint32_t op1, int32_t op2) @@ -136,14 +136,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqrdmulh_n_s64(svint64_t op1, int64_t op2) @@ -153,12 +153,12 @@ // CHECK-LABEL: @test_svqrdmulh_lane_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmulh_lane_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmulh_lane_s16(svint16_t op1, svint16_t op2) @@ -168,12 +168,12 @@ // CHECK-LABEL: @test_svqrdmulh_lane_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmulh_lane_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrdmulh_lane_s16_1(svint16_t op1, svint16_t op2) @@ -183,12 +183,12 @@ // CHECK-LABEL: @test_svqrdmulh_lane_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmulh_lane_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmulh_lane_s32(svint32_t op1, svint32_t op2) @@ -198,12 +198,12 @@ // CHECK-LABEL: @test_svqrdmulh_lane_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmulh_lane_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrdmulh_lane_s32_1(svint32_t op1, svint32_t op2) @@ -213,12 +213,12 @@ // CHECK-LABEL: @test_svqrdmulh_lane_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrdmulh_lane_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmulh_lane_s64(svint64_t op1, svint64_t op2) @@ -228,12 +228,12 @@ // CHECK-LABEL: @test_svqrdmulh_lane_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z25test_svqrdmulh_lane_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svqrdmulh_lane_s64_1(svint64_t op1, svint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svqrshl_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqrshl_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqrshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -34,16 +34,16 @@ // CHECK-LABEL: @test_svqrshl_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqrshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -53,16 +53,16 @@ // CHECK-LABEL: @test_svqrshl_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqrshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -72,16 +72,16 @@ // CHECK-LABEL: @test_svqrshl_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqrshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -92,13 +92,13 @@ // CHECK-LABEL: @test_svqrshl_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqrshl_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqrshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svqrshl_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqrshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svqrshl_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqrshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svqrshl_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqrshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svqrshl_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqrshl_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svqrshl_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqrshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svqrshl_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqrshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svqrshl_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqrshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svqrshl_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqrshl_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svqrshl_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqrshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svqrshl_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqrshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svqrshl_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqrshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svqrshl_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqrshl_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svqrshl_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqrshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svqrshl_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqrshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,14 +346,14 @@ // CHECK-LABEL: @test_svqrshl_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqrshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -363,12 +363,12 @@ // CHECK-LABEL: @test_svqrshl_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqrshl_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svqrshl_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqrshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svqrshl_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqrshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svqrshl_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqrshl_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqrshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -432,7 +432,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -440,7 +440,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svqrshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -450,20 +450,20 @@ // CHECK-LABEL: @test_svqrshl_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svqrshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -473,20 +473,20 @@ // CHECK-LABEL: @test_svqrshl_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svqrshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -496,20 +496,20 @@ // CHECK-LABEL: @test_svqrshl_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svqrshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -522,7 +522,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( @@ -530,7 +530,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svqrshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) @@ -540,20 +540,20 @@ // CHECK-LABEL: @test_svqrshl_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svqrshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) @@ -563,20 +563,20 @@ // CHECK-LABEL: @test_svqrshl_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svqrshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) @@ -586,20 +586,20 @@ // CHECK-LABEL: @test_svqrshl_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svqrshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) @@ -611,14 +611,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqrshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -628,18 +628,18 @@ // CHECK-LABEL: @test_svqrshl_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqrshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -649,18 +649,18 @@ // CHECK-LABEL: @test_svqrshl_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqrshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -670,18 +670,18 @@ // CHECK-LABEL: @test_svqrshl_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqrshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -693,14 +693,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqrshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) @@ -710,18 +710,18 @@ // CHECK-LABEL: @test_svqrshl_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqrshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) @@ -731,18 +731,18 @@ // CHECK-LABEL: @test_svqrshl_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqrshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) @@ -752,18 +752,18 @@ // CHECK-LABEL: @test_svqrshl_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqrshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) @@ -775,14 +775,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqrshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -792,18 +792,18 @@ // CHECK-LABEL: @test_svqrshl_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqrshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -813,18 +813,18 @@ // CHECK-LABEL: @test_svqrshl_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqrshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -834,18 +834,18 @@ // CHECK-LABEL: @test_svqrshl_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqrshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -857,14 +857,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqrshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) @@ -874,18 +874,18 @@ // CHECK-LABEL: @test_svqrshl_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqrshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) @@ -895,18 +895,18 @@ // CHECK-LABEL: @test_svqrshl_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqrshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) @@ -916,18 +916,18 @@ // CHECK-LABEL: @test_svqrshl_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqrshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrshrnb_n_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_s16_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrshrnb_n_s16_1(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrshrnb_n_s32(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_s32_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrshrnb_n_s32_1(svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrshrnb_n_s64(svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_s64_1u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrshrnb_n_s64_1(svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrnb_n_u16(svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_u16_1u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrnb_n_u16_1(svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrnb_n_u32(svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_u32_1u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrnb_n_u32_1(svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrnb_n_u64(svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svqrshrnb_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_u64_1u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrnb_n_u64_1(svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrshrnt_n_s16(svint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqrshrnt_n_s16_1(svint8_t op, svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrshrnt_n_s32(svint16_t op, svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqrshrnt_n_s32_1(svint16_t op, svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrshrnt_n_s64(svint32_t op, svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqrshrnt_n_s64_1(svint32_t op, svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrnt_n_u16(svuint8_t op, svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrnt_n_u16_1(svuint8_t op, svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrnt_n_u32(svuint16_t op, svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrnt_n_u32_1(svuint16_t op, svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrnt_n_u64(svuint32_t op, svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svqrshrnt_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrnt_n_u64_1(svuint32_t op, svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrshrunb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrshrunb_n_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrunb_n_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrshrunb_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrshrunb_n_s16_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrunb_n_s16_1(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrshrunb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrshrunb_n_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrunb_n_s32(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrshrunb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrshrunb_n_s32_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrunb_n_s32_1(svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqrshrunb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrshrunb_n_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrunb_n_s64(svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqrshrunb_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrshrunb_n_s64_1u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrunb_n_s64_1(svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqrshrunt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s16u11__SVUint8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrunt_n_s16(svuint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqrshrunt_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s16_1u11__SVUint8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqrshrunt_n_s16_1(svuint8_t op, svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqrshrunt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s32u12__SVUint16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrunt_n_s32(svuint16_t op, svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqrshrunt_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s32_1u12__SVUint16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqrshrunt_n_s32_1(svuint16_t op, svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqrshrunt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s64u12__SVUint32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrunt_n_s64(svuint32_t op, svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqrshrunt_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s64_1u12__SVUint32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqrshrunt_n_s64_1(svuint32_t op, svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svqshl_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqshl_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -34,16 +34,16 @@ // CHECK-LABEL: @test_svqshl_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -53,16 +53,16 @@ // CHECK-LABEL: @test_svqshl_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -72,16 +72,16 @@ // CHECK-LABEL: @test_svqshl_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -92,13 +92,13 @@ // CHECK-LABEL: @test_svqshl_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqshl_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svqshl_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svqshl_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svqshl_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svqshl_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqshl_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svqshl_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svqshl_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svqshl_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svqshl_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqshl_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svqshl_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svqshl_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svqshl_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svqshl_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqshl_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svqshl_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svqshl_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,14 +346,14 @@ // CHECK-LABEL: @test_svqshl_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -363,12 +363,12 @@ // CHECK-LABEL: @test_svqshl_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqshl_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svqshl_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svqshl_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svqshl_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqshl_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -432,7 +432,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -440,7 +440,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svqshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -450,20 +450,20 @@ // CHECK-LABEL: @test_svqshl_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svqshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -473,20 +473,20 @@ // CHECK-LABEL: @test_svqshl_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svqshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -496,20 +496,20 @@ // CHECK-LABEL: @test_svqshl_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svqshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -522,7 +522,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( @@ -530,7 +530,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svqshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) @@ -540,20 +540,20 @@ // CHECK-LABEL: @test_svqshl_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svqshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) @@ -563,20 +563,20 @@ // CHECK-LABEL: @test_svqshl_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svqshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) @@ -586,20 +586,20 @@ // CHECK-LABEL: @test_svqshl_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svqshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) @@ -611,14 +611,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -628,18 +628,18 @@ // CHECK-LABEL: @test_svqshl_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -649,18 +649,18 @@ // CHECK-LABEL: @test_svqshl_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -670,18 +670,18 @@ // CHECK-LABEL: @test_svqshl_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -693,14 +693,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) @@ -710,18 +710,18 @@ // CHECK-LABEL: @test_svqshl_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) @@ -731,18 +731,18 @@ // CHECK-LABEL: @test_svqshl_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) @@ -752,18 +752,18 @@ // CHECK-LABEL: @test_svqshl_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) @@ -775,14 +775,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -792,18 +792,18 @@ // CHECK-LABEL: @test_svqshl_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -813,18 +813,18 @@ // CHECK-LABEL: @test_svqshl_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -834,18 +834,18 @@ // CHECK-LABEL: @test_svqshl_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -857,14 +857,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) @@ -874,18 +874,18 @@ // CHECK-LABEL: @test_svqshl_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) @@ -895,18 +895,18 @@ // CHECK-LABEL: @test_svqshl_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) @@ -916,18 +916,18 @@ // CHECK-LABEL: @test_svqshl_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svqshlu_n_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqshlu_n_s8_z(svbool_t pg, svint8_t op1) @@ -35,13 +35,13 @@ // CHECK-LABEL: @test_svqshlu_n_s8_z_1( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 7) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 7) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_z_1u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 7) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 7) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqshlu_n_s8_z_1(svbool_t pg, svint8_t op1) @@ -51,16 +51,16 @@ // CHECK-LABEL: @test_svqshlu_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 0) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqshlu_n_s16_z(svbool_t pg, svint16_t op1) @@ -70,16 +70,16 @@ // CHECK-LABEL: @test_svqshlu_n_s16_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 15) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 15) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_z_1u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 15) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 15) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqshlu_n_s16_z_1(svbool_t pg, svint16_t op1) @@ -89,16 +89,16 @@ // CHECK-LABEL: @test_svqshlu_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 0) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqshlu_n_s32_z(svbool_t pg, svint32_t op1) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svqshlu_n_s32_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 31) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 31) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_z_1u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 31) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 31) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqshlu_n_s32_z_1(svbool_t pg, svint32_t op1) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svqshlu_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 0) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 0) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 0) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqshlu_n_s64_z(svbool_t pg, svint64_t op1) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svqshlu_n_s64_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 63) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 63) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_z_1u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 63) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 63) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqshlu_n_s64_z_1(svbool_t pg, svint64_t op1) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svqshlu_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_mu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshlu_n_s8_m(svbool_t pg, svint8_t op1) @@ -180,12 +180,12 @@ // CHECK-LABEL: @test_svqshlu_n_s8_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_m_1u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshlu_n_s8_m_1(svbool_t pg, svint8_t op1) @@ -195,14 +195,14 @@ // CHECK-LABEL: @test_svqshlu_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_mu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqshlu_n_s16_m(svbool_t pg, svint16_t op1) @@ -212,14 +212,14 @@ // CHECK-LABEL: @test_svqshlu_n_s16_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_m_1u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqshlu_n_s16_m_1(svbool_t pg, svint16_t op1) @@ -229,14 +229,14 @@ // CHECK-LABEL: @test_svqshlu_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_mu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqshlu_n_s32_m(svbool_t pg, svint32_t op1) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svqshlu_n_s32_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_m_1u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqshlu_n_s32_m_1(svbool_t pg, svint32_t op1) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svqshlu_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_mu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqshlu_n_s64_m(svbool_t pg, svint64_t op1) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svqshlu_n_s64_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_m_1u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqshlu_n_s64_m_1(svbool_t pg, svint64_t op1) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svqshlu_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshlu_n_s8_x(svbool_t pg, svint8_t op1) @@ -312,12 +312,12 @@ // CHECK-LABEL: @test_svqshlu_n_s8_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_x_1u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshlu_n_s8_x_1(svbool_t pg, svint8_t op1) @@ -327,14 +327,14 @@ // CHECK-LABEL: @test_svqshlu_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqshlu_n_s16_x(svbool_t pg, svint16_t op1) @@ -344,14 +344,14 @@ // CHECK-LABEL: @test_svqshlu_n_s16_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_x_1u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqshlu_n_s16_x_1(svbool_t pg, svint16_t op1) @@ -361,14 +361,14 @@ // CHECK-LABEL: @test_svqshlu_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqshlu_n_s32_x(svbool_t pg, svint32_t op1) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svqshlu_n_s32_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_x_1u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqshlu_n_s32_x_1(svbool_t pg, svint32_t op1) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svqshlu_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqshlu_n_s64_x(svbool_t pg, svint64_t op1) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svqshlu_n_s64_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_x_1u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqshlu_n_s64_x_1(svbool_t pg, svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqshrnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqshrnb_n_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqshrnb_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_s16_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqshrnb_n_s16_1(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqshrnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqshrnb_n_s32(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqshrnb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_s32_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqshrnb_n_s32_1(svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqshrnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqshrnb_n_s64(svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqshrnb_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_s64_1u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqshrnb_n_s64_1(svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svqshrnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrnb_n_u16(svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svqshrnb_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_u16_1u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrnb_n_u16_1(svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svqshrnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrnb_n_u32(svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svqshrnb_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_u32_1u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrnb_n_u32_1(svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svqshrnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrnb_n_u64(svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svqshrnb_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_u64_1u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrnb_n_u64_1(svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqshrnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqshrnt_n_s16(svint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqshrnt_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqshrnt_n_s16_1(svint8_t op, svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqshrnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqshrnt_n_s32(svint16_t op, svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqshrnt_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqshrnt_n_s32_1(svint16_t op, svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqshrnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqshrnt_n_s64(svint32_t op, svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqshrnt_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqshrnt_n_s64_1(svint32_t op, svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svqshrnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrnt_n_u16(svuint8_t op, svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svqshrnt_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrnt_n_u16_1(svuint8_t op, svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svqshrnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrnt_n_u32(svuint16_t op, svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svqshrnt_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrnt_n_u32_1(svuint16_t op, svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svqshrnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrnt_n_u64(svuint32_t op, svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svqshrnt_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrnt_n_u64_1(svuint32_t op, svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqshrunb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrunb_n_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqshrunb_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s16_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrunb_n_s16_1(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqshrunb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrunb_n_s32(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqshrunb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s32_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrunb_n_s32_1(svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqshrunb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrunb_n_s64(svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqshrunb_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s64_1u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrunb_n_s64_1(svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqshrunt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqshrunt_n_s16u11__SVUint8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrunt_n_s16(svuint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqshrunt_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqshrunt_n_s16_1u11__SVUint8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqshrunt_n_s16_1(svuint8_t op, svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqshrunt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqshrunt_n_s32u12__SVUint16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrunt_n_s32(svuint16_t op, svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqshrunt_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqshrunt_n_s32_1u12__SVUint16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqshrunt_n_s32_1(svuint16_t op, svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqshrunt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svqshrunt_n_s64u12__SVUint32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrunt_n_s64(svuint32_t op, svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqshrunt_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z22test_svqshrunt_n_s64_1u12__SVUint32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqshrunt_n_s64_1(svuint32_t op, svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svqsub_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -34,16 +34,16 @@ // CHECK-LABEL: @test_svqsub_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -53,16 +53,16 @@ // CHECK-LABEL: @test_svqsub_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -72,16 +72,16 @@ // CHECK-LABEL: @test_svqsub_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -92,13 +92,13 @@ // CHECK-LABEL: @test_svqsub_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svqsub_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svqsub_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svqsub_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svqsub_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svqsub_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svqsub_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svqsub_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svqsub_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svqsub_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svqsub_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svqsub_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svqsub_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svqsub_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svqsub_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,14 +346,14 @@ // CHECK-LABEL: @test_svqsub_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -363,12 +363,12 @@ // CHECK-LABEL: @test_svqsub_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svqsub_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svqsub_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svqsub_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -432,7 +432,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -440,7 +440,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svqsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -450,20 +450,20 @@ // CHECK-LABEL: @test_svqsub_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svqsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -473,20 +473,20 @@ // CHECK-LABEL: @test_svqsub_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svqsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -496,20 +496,20 @@ // CHECK-LABEL: @test_svqsub_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svqsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -522,7 +522,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -530,7 +530,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svqsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -540,20 +540,20 @@ // CHECK-LABEL: @test_svqsub_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svqsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -563,20 +563,20 @@ // CHECK-LABEL: @test_svqsub_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svqsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -586,20 +586,20 @@ // CHECK-LABEL: @test_svqsub_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svqsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -611,14 +611,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -628,18 +628,18 @@ // CHECK-LABEL: @test_svqsub_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -649,18 +649,18 @@ // CHECK-LABEL: @test_svqsub_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -670,18 +670,18 @@ // CHECK-LABEL: @test_svqsub_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -693,14 +693,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -710,18 +710,18 @@ // CHECK-LABEL: @test_svqsub_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -731,18 +731,18 @@ // CHECK-LABEL: @test_svqsub_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -752,18 +752,18 @@ // CHECK-LABEL: @test_svqsub_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -775,14 +775,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -792,18 +792,18 @@ // CHECK-LABEL: @test_svqsub_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -813,18 +813,18 @@ // CHECK-LABEL: @test_svqsub_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -834,18 +834,18 @@ // CHECK-LABEL: @test_svqsub_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -857,14 +857,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -874,18 +874,18 @@ // CHECK-LABEL: @test_svqsub_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -895,18 +895,18 @@ // CHECK-LABEL: @test_svqsub_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -916,18 +916,18 @@ // CHECK-LABEL: @test_svqsub_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svqsubr_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -34,16 +34,16 @@ // CHECK-LABEL: @test_svqsubr_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -53,16 +53,16 @@ // CHECK-LABEL: @test_svqsubr_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -72,16 +72,16 @@ // CHECK-LABEL: @test_svqsubr_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -92,13 +92,13 @@ // CHECK-LABEL: @test_svqsubr_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svqsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svqsubr_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svqsubr_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svqsubr_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svqsubr_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svqsubr_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svqsubr_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svqsubr_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svqsubr_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svqsubr_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svqsubr_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svqsubr_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svqsubr_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svqsubr_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svqsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svqsubr_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svqsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,14 +346,14 @@ // CHECK-LABEL: @test_svqsubr_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svqsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -363,12 +363,12 @@ // CHECK-LABEL: @test_svqsubr_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svqsubr_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svqsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svqsubr_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svqsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svqsubr_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svqsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svqsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -432,7 +432,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -440,7 +440,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svqsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -450,20 +450,20 @@ // CHECK-LABEL: @test_svqsubr_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svqsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -473,20 +473,20 @@ // CHECK-LABEL: @test_svqsubr_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svqsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -496,20 +496,20 @@ // CHECK-LABEL: @test_svqsubr_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svqsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -522,7 +522,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -530,7 +530,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svqsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -540,20 +540,20 @@ // CHECK-LABEL: @test_svqsubr_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svqsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -563,20 +563,20 @@ // CHECK-LABEL: @test_svqsubr_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svqsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -586,20 +586,20 @@ // CHECK-LABEL: @test_svqsubr_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svqsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -611,14 +611,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -628,18 +628,18 @@ // CHECK-LABEL: @test_svqsubr_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -649,18 +649,18 @@ // CHECK-LABEL: @test_svqsubr_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -670,18 +670,18 @@ // CHECK-LABEL: @test_svqsubr_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -693,14 +693,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -710,18 +710,18 @@ // CHECK-LABEL: @test_svqsubr_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -731,18 +731,18 @@ // CHECK-LABEL: @test_svqsubr_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -752,18 +752,18 @@ // CHECK-LABEL: @test_svqsubr_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -775,14 +775,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svqsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -792,18 +792,18 @@ // CHECK-LABEL: @test_svqsubr_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svqsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -813,18 +813,18 @@ // CHECK-LABEL: @test_svqsubr_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svqsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -834,18 +834,18 @@ // CHECK-LABEL: @test_svqsubr_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svqsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -857,14 +857,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svqsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -874,18 +874,18 @@ // CHECK-LABEL: @test_svqsubr_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svqsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -895,18 +895,18 @@ // CHECK-LABEL: @test_svqsubr_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svqsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -916,18 +916,18 @@ // CHECK-LABEL: @test_svqsubr_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svqsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqxtnb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnb.nxv8i16( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv8i16( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnb_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnb.nxv8i16( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv8i16( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqxtnb_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqxtnb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnb.nxv4i32( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv4i32( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnb_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnb.nxv4i32( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv4i32( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqxtnb_s32(svint32_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqxtnb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnb.nxv2i64( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv2i64( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnb_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnb.nxv2i64( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv2i64( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqxtnb_s64(svint64_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqxtnb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnb.nxv8i16( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv8i16( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnb_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnb.nxv8i16( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv8i16( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqxtnb_u16(svuint16_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqxtnb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnb.nxv4i32( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv4i32( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnb_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnb.nxv4i32( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv4i32( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqxtnb_u32(svuint32_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqxtnb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnb.nxv2i64( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv2i64( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnb_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnb.nxv2i64( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv2i64( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqxtnb_u64(svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqxtnt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnt_s16u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svqxtnt_s16(svint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqxtnt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnt_s32u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svqxtnt_s32(svint16_t op, svint32_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqxtnt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnt_s64u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svqxtnt_s64(svint32_t op, svint64_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svqxtnt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnt_u16u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqxtnt_u16(svuint8_t op, svuint16_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svqxtnt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnt_u32u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqxtnt_u32(svuint16_t op, svuint32_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svqxtnt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svqxtnt_u64u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.uqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqxtnt_u64(svuint32_t op, svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqxtunb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunb.nxv8i16( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv8i16( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqxtunb_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunb.nxv8i16( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv8i16( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqxtunb_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqxtunb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunb.nxv4i32( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv4i32( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqxtunb_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunb.nxv4i32( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv4i32( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqxtunb_s32(svint32_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqxtunb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunb.nxv2i64( [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv2i64( [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqxtunb_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunb.nxv2i64( [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv2i64( [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqxtunb_s64(svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svqxtunt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqxtunt_s16u11__SVUint8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svqxtunt_s16(svuint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svqxtunt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqxtunt_s32u12__SVUint16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svqxtunt_s32(svuint16_t op, svint32_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svqxtunt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svqxtunt_s64u12__SVUint32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sqxtunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svqxtunt_s64(svuint32_t op, svint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svraddhnb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnb_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svraddhnb_s16(svint16_t op1, svint16_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svraddhnb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnb_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svraddhnb_s32(svint32_t op1, svint32_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svraddhnb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnb_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svraddhnb_s64(svint64_t op1, svint64_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svraddhnb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnb_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svraddhnb_u16(svuint16_t op1, svuint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svraddhnb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnb_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svraddhnb_u32(svuint32_t op1, svuint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svraddhnb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnb_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svraddhnb_u64(svuint64_t op1, svuint64_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svraddhnb_n_s16(svint16_t op1, int16_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svraddhnb_n_s32(svint32_t op1, int32_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svraddhnb_n_s64(svint64_t op1, int64_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svraddhnb_n_u16(svuint16_t op1, uint16_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svraddhnb_n_u32(svuint32_t op1, uint32_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svraddhnb_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svraddhnt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svraddhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svraddhnt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svraddhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svraddhnt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svraddhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svraddhnt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svraddhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svraddhnt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svraddhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svraddhnt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svraddhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svraddhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svraddhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svraddhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svraddhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svraddhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svraddhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svraddhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svrax1_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svrax1_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svrax1_s64(svint64_t op1, svint64_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svrax1_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svrax1_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svrax1_u64(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svrecpe_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urecpe.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpe_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urecpe.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrecpe_u32_z(svbool_t pg, svuint32_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svrecpe_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urecpe.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpe_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urecpe.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrecpe_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svrecpe_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urecpe.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrecpe_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urecpe.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrecpe_u32_x(svbool_t pg, svuint32_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svrhadd_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrhadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrhadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svrhadd_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrhadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svrhadd_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrhadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svrhadd_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrhadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -82,12 +82,12 @@ // CHECK-LABEL: @test_svrhadd_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrhadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrhadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svrhadd_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrhadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -114,14 +114,14 @@ // CHECK-LABEL: @test_svrhadd_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrhadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svrhadd_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrhadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -151,14 +151,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrhadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -168,18 +168,18 @@ // CHECK-LABEL: @test_svrhadd_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrhadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -189,18 +189,18 @@ // CHECK-LABEL: @test_svrhadd_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrhadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -210,18 +210,18 @@ // CHECK-LABEL: @test_svrhadd_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrhadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -233,14 +233,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_mu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrhadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -250,18 +250,18 @@ // CHECK-LABEL: @test_svrhadd_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrhadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -271,18 +271,18 @@ // CHECK-LABEL: @test_svrhadd_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrhadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -292,18 +292,18 @@ // CHECK-LABEL: @test_svrhadd_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrhadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -314,13 +314,13 @@ // CHECK-LABEL: @test_svrhadd_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrhadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrhadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -330,16 +330,16 @@ // CHECK-LABEL: @test_svrhadd_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrhadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -349,16 +349,16 @@ // CHECK-LABEL: @test_svrhadd_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrhadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -368,16 +368,16 @@ // CHECK-LABEL: @test_svrhadd_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrhadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -388,13 +388,13 @@ // CHECK-LABEL: @test_svrhadd_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrhadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrhadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -404,16 +404,16 @@ // CHECK-LABEL: @test_svrhadd_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrhadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -423,16 +423,16 @@ // CHECK-LABEL: @test_svrhadd_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrhadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -443,16 +443,16 @@ // CHECK-LABEL: @test_svrhadd_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrhadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -465,7 +465,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -473,7 +473,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svrhadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -483,20 +483,20 @@ // CHECK-LABEL: @test_svrhadd_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svrhadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -506,20 +506,20 @@ // CHECK-LABEL: @test_svrhadd_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svrhadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -529,20 +529,20 @@ // CHECK-LABEL: @test_svrhadd_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svrhadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -555,7 +555,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_zu10__SVBool_tu11__SVUint8_th( @@ -563,7 +563,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svrhadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -573,20 +573,20 @@ // CHECK-LABEL: @test_svrhadd_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svrhadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -596,20 +596,20 @@ // CHECK-LABEL: @test_svrhadd_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svrhadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -619,20 +619,20 @@ // CHECK-LABEL: @test_svrhadd_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svrhadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) @@ -642,12 +642,12 @@ // CHECK-LABEL: @test_svrhadd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrhadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrhadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -657,14 +657,14 @@ // CHECK-LABEL: @test_svrhadd_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrhadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -674,14 +674,14 @@ // CHECK-LABEL: @test_svrhadd_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrhadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -691,14 +691,14 @@ // CHECK-LABEL: @test_svrhadd_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrhadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -708,12 +708,12 @@ // CHECK-LABEL: @test_svrhadd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrhadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrhadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) @@ -723,14 +723,14 @@ // CHECK-LABEL: @test_svrhadd_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrhadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) @@ -740,14 +740,14 @@ // CHECK-LABEL: @test_svrhadd_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrhadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) @@ -758,14 +758,14 @@ // CHECK-LABEL: @test_svrhadd_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrhadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrhadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) @@ -777,14 +777,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrhadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -794,18 +794,18 @@ // CHECK-LABEL: @test_svrhadd_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrhadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -815,18 +815,18 @@ // CHECK-LABEL: @test_svrhadd_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrhadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -836,18 +836,18 @@ // CHECK-LABEL: @test_svrhadd_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrhadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -859,14 +859,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_xu10__SVBool_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrhadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) @@ -876,18 +876,18 @@ // CHECK-LABEL: @test_svrhadd_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrhadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) @@ -897,18 +897,18 @@ // CHECK-LABEL: @test_svrhadd_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrhadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) @@ -918,18 +918,18 @@ // CHECK-LABEL: @test_svrhadd_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrhadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svrshl_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svrshl_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) @@ -34,16 +34,16 @@ // CHECK-LABEL: @test_svrshl_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) @@ -53,16 +53,16 @@ // CHECK-LABEL: @test_svrshl_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) @@ -72,16 +72,16 @@ // CHECK-LABEL: @test_svrshl_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) @@ -92,13 +92,13 @@ // CHECK-LABEL: @test_svrshl_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svrshl_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svrshl_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svrshl_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svrshl_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -165,12 +165,12 @@ // CHECK-LABEL: @test_svrshl_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrshl_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) @@ -180,14 +180,14 @@ // CHECK-LABEL: @test_svrshl_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) @@ -197,14 +197,14 @@ // CHECK-LABEL: @test_svrshl_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) @@ -214,14 +214,14 @@ // CHECK-LABEL: @test_svrshl_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) @@ -231,12 +231,12 @@ // CHECK-LABEL: @test_svrshl_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrshl_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -246,14 +246,14 @@ // CHECK-LABEL: @test_svrshl_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -263,14 +263,14 @@ // CHECK-LABEL: @test_svrshl_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -280,14 +280,14 @@ // CHECK-LABEL: @test_svrshl_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -297,12 +297,12 @@ // CHECK-LABEL: @test_svrshl_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrshl_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) @@ -312,14 +312,14 @@ // CHECK-LABEL: @test_svrshl_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) @@ -329,14 +329,14 @@ // CHECK-LABEL: @test_svrshl_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) @@ -346,14 +346,14 @@ // CHECK-LABEL: @test_svrshl_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) @@ -363,12 +363,12 @@ // CHECK-LABEL: @test_svrshl_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrshl_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -378,14 +378,14 @@ // CHECK-LABEL: @test_svrshl_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -395,14 +395,14 @@ // CHECK-LABEL: @test_svrshl_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -412,14 +412,14 @@ // CHECK-LABEL: @test_svrshl_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svrshl_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -432,7 +432,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( @@ -440,7 +440,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svrshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) @@ -450,20 +450,20 @@ // CHECK-LABEL: @test_svrshl_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svrshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) @@ -473,20 +473,20 @@ // CHECK-LABEL: @test_svrshl_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svrshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) @@ -496,20 +496,20 @@ // CHECK-LABEL: @test_svrshl_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svrshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) @@ -522,7 +522,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( @@ -530,7 +530,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svrshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) @@ -540,20 +540,20 @@ // CHECK-LABEL: @test_svrshl_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svrshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) @@ -563,20 +563,20 @@ // CHECK-LABEL: @test_svrshl_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svrshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) @@ -586,20 +586,20 @@ // CHECK-LABEL: @test_svrshl_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svrshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) @@ -611,14 +611,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) @@ -628,18 +628,18 @@ // CHECK-LABEL: @test_svrshl_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) @@ -649,18 +649,18 @@ // CHECK-LABEL: @test_svrshl_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) @@ -670,18 +670,18 @@ // CHECK-LABEL: @test_svrshl_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) @@ -693,14 +693,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) @@ -710,18 +710,18 @@ // CHECK-LABEL: @test_svrshl_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) @@ -731,18 +731,18 @@ // CHECK-LABEL: @test_svrshl_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) @@ -752,18 +752,18 @@ // CHECK-LABEL: @test_svrshl_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) @@ -775,14 +775,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) @@ -792,18 +792,18 @@ // CHECK-LABEL: @test_svrshl_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) @@ -813,18 +813,18 @@ // CHECK-LABEL: @test_svrshl_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) @@ -834,18 +834,18 @@ // CHECK-LABEL: @test_svrshl_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) @@ -857,14 +857,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) @@ -874,18 +874,18 @@ // CHECK-LABEL: @test_svrshl_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) @@ -895,18 +895,18 @@ // CHECK-LABEL: @test_svrshl_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) @@ -916,18 +916,18 @@ // CHECK-LABEL: @test_svrshl_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c @@ -18,13 +18,13 @@ // CHECK-LABEL: @test_svrshr_n_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 1) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_zu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 1) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrshr_n_s8_z(svbool_t pg, svint8_t op1) @@ -35,13 +35,13 @@ // CHECK-LABEL: @test_svrshr_n_s8_z_1( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 8) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 8) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_z_1u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 8) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 8) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrshr_n_s8_z_1(svbool_t pg, svint8_t op1) @@ -51,16 +51,16 @@ // CHECK-LABEL: @test_svrshr_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_zu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrshr_n_s16_z(svbool_t pg, svint16_t op1) @@ -70,16 +70,16 @@ // CHECK-LABEL: @test_svrshr_n_s16_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_z_1u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svrshr_n_s16_z_1(svbool_t pg, svint16_t op1) @@ -89,16 +89,16 @@ // CHECK-LABEL: @test_svrshr_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_zu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrshr_n_s32_z(svbool_t pg, svint32_t op1) @@ -108,16 +108,16 @@ // CHECK-LABEL: @test_svrshr_n_s32_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_z_1u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svrshr_n_s32_z_1(svbool_t pg, svint32_t op1) @@ -127,16 +127,16 @@ // CHECK-LABEL: @test_svrshr_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_zu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrshr_n_s64_z(svbool_t pg, svint64_t op1) @@ -146,16 +146,16 @@ // CHECK-LABEL: @test_svrshr_n_s64_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_z_1u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svrshr_n_s64_z_1(svbool_t pg, svint64_t op1) @@ -166,13 +166,13 @@ // CHECK-LABEL: @test_svrshr_n_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 1) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_zu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 1) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrshr_n_u8_z(svbool_t pg, svuint8_t op1) @@ -183,13 +183,13 @@ // CHECK-LABEL: @test_svrshr_n_u8_z_1( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 8) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 8) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_z_1u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 8) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 8) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrshr_n_u8_z_1(svbool_t pg, svuint8_t op1) @@ -199,16 +199,16 @@ // CHECK-LABEL: @test_svrshr_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_zu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrshr_n_u16_z(svbool_t pg, svuint16_t op1) @@ -218,16 +218,16 @@ // CHECK-LABEL: @test_svrshr_n_u16_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_z_1u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svrshr_n_u16_z_1(svbool_t pg, svuint16_t op1) @@ -237,16 +237,16 @@ // CHECK-LABEL: @test_svrshr_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrshr_n_u32_z(svbool_t pg, svuint32_t op1) @@ -256,16 +256,16 @@ // CHECK-LABEL: @test_svrshr_n_u32_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_z_1u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svrshr_n_u32_z_1(svbool_t pg, svuint32_t op1) @@ -275,16 +275,16 @@ // CHECK-LABEL: @test_svrshr_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_zu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrshr_n_u64_z(svbool_t pg, svuint64_t op1) @@ -294,16 +294,16 @@ // CHECK-LABEL: @test_svrshr_n_u64_z_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_z_1u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svrshr_n_u64_z_1(svbool_t pg, svuint64_t op1) @@ -313,12 +313,12 @@ // CHECK-LABEL: @test_svrshr_n_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_mu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshr_n_s8_m(svbool_t pg, svint8_t op1) @@ -328,12 +328,12 @@ // CHECK-LABEL: @test_svrshr_n_s8_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_m_1u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshr_n_s8_m_1(svbool_t pg, svint8_t op1) @@ -343,14 +343,14 @@ // CHECK-LABEL: @test_svrshr_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_mu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrshr_n_s16_m(svbool_t pg, svint16_t op1) @@ -360,14 +360,14 @@ // CHECK-LABEL: @test_svrshr_n_s16_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_m_1u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrshr_n_s16_m_1(svbool_t pg, svint16_t op1) @@ -377,14 +377,14 @@ // CHECK-LABEL: @test_svrshr_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_mu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrshr_n_s32_m(svbool_t pg, svint32_t op1) @@ -394,14 +394,14 @@ // CHECK-LABEL: @test_svrshr_n_s32_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_m_1u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrshr_n_s32_m_1(svbool_t pg, svint32_t op1) @@ -411,14 +411,14 @@ // CHECK-LABEL: @test_svrshr_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_mu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrshr_n_s64_m(svbool_t pg, svint64_t op1) @@ -428,14 +428,14 @@ // CHECK-LABEL: @test_svrshr_n_s64_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_m_1u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrshr_n_s64_m_1(svbool_t pg, svint64_t op1) @@ -445,12 +445,12 @@ // CHECK-LABEL: @test_svrshr_n_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_mu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshr_n_u8_m(svbool_t pg, svuint8_t op1) @@ -460,12 +460,12 @@ // CHECK-LABEL: @test_svrshr_n_u8_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_m_1u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshr_n_u8_m_1(svbool_t pg, svuint8_t op1) @@ -475,14 +475,14 @@ // CHECK-LABEL: @test_svrshr_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_mu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrshr_n_u16_m(svbool_t pg, svuint16_t op1) @@ -492,14 +492,14 @@ // CHECK-LABEL: @test_svrshr_n_u16_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_m_1u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrshr_n_u16_m_1(svbool_t pg, svuint16_t op1) @@ -509,14 +509,14 @@ // CHECK-LABEL: @test_svrshr_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_mu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrshr_n_u32_m(svbool_t pg, svuint32_t op1) @@ -526,14 +526,14 @@ // CHECK-LABEL: @test_svrshr_n_u32_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_m_1u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrshr_n_u32_m_1(svbool_t pg, svuint32_t op1) @@ -543,14 +543,14 @@ // CHECK-LABEL: @test_svrshr_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_mu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrshr_n_u64_m(svbool_t pg, svuint64_t op1) @@ -560,14 +560,14 @@ // CHECK-LABEL: @test_svrshr_n_u64_m_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_m_1u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrshr_n_u64_m_1(svbool_t pg, svuint64_t op1) @@ -577,12 +577,12 @@ // CHECK-LABEL: @test_svrshr_n_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_xu10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshr_n_s8_x(svbool_t pg, svint8_t op1) @@ -592,12 +592,12 @@ // CHECK-LABEL: @test_svrshr_n_s8_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_x_1u10__SVBool_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshr_n_s8_x_1(svbool_t pg, svint8_t op1) @@ -607,14 +607,14 @@ // CHECK-LABEL: @test_svrshr_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_xu10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrshr_n_s16_x(svbool_t pg, svint16_t op1) @@ -624,14 +624,14 @@ // CHECK-LABEL: @test_svrshr_n_s16_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_x_1u10__SVBool_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrshr_n_s16_x_1(svbool_t pg, svint16_t op1) @@ -641,14 +641,14 @@ // CHECK-LABEL: @test_svrshr_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_xu10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrshr_n_s32_x(svbool_t pg, svint32_t op1) @@ -658,14 +658,14 @@ // CHECK-LABEL: @test_svrshr_n_s32_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_x_1u10__SVBool_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrshr_n_s32_x_1(svbool_t pg, svint32_t op1) @@ -675,14 +675,14 @@ // CHECK-LABEL: @test_svrshr_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_xu10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrshr_n_s64_x(svbool_t pg, svint64_t op1) @@ -692,14 +692,14 @@ // CHECK-LABEL: @test_svrshr_n_s64_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_x_1u10__SVBool_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svrshr_n_s64_x_1(svbool_t pg, svint64_t op1) @@ -709,12 +709,12 @@ // CHECK-LABEL: @test_svrshr_n_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_xu10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshr_n_u8_x(svbool_t pg, svuint8_t op1) @@ -724,12 +724,12 @@ // CHECK-LABEL: @test_svrshr_n_u8_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_x_1u10__SVBool_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshr_n_u8_x_1(svbool_t pg, svuint8_t op1) @@ -739,14 +739,14 @@ // CHECK-LABEL: @test_svrshr_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_xu10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrshr_n_u16_x(svbool_t pg, svuint16_t op1) @@ -756,14 +756,14 @@ // CHECK-LABEL: @test_svrshr_n_u16_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_x_1u10__SVBool_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrshr_n_u16_x_1(svbool_t pg, svuint16_t op1) @@ -773,14 +773,14 @@ // CHECK-LABEL: @test_svrshr_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrshr_n_u32_x(svbool_t pg, svuint32_t op1) @@ -790,14 +790,14 @@ // CHECK-LABEL: @test_svrshr_n_u32_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_x_1u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrshr_n_u32_x_1(svbool_t pg, svuint32_t op1) @@ -807,14 +807,14 @@ // CHECK-LABEL: @test_svrshr_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_xu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrshr_n_u64_x(svbool_t pg, svuint64_t op1) @@ -824,14 +824,14 @@ // CHECK-LABEL: @test_svrshr_n_u64_x_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_x_1u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svrshr_n_u64_x_1(svbool_t pg, svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svrshrnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshrnb_n_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svrshrnb_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_s16_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshrnb_n_s16_1(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svrshrnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrshrnb_n_s32(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svrshrnb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_s32_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrshrnb_n_s32_1(svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svrshrnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrshrnb_n_s64(svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svrshrnb_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_s64_1u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrshrnb_n_s64_1(svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svrshrnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshrnb_n_u16(svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svrshrnb_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_u16_1u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshrnb_n_u16_1(svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svrshrnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrshrnb_n_u32(svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svrshrnb_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_u32_1u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrshrnb_n_u32_1(svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svrshrnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrshrnb_n_u64(svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svrshrnb_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_u64_1u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrshrnb_n_u64_1(svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svrshrnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshrnt_n_s16(svint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svrshrnt_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrshrnt_n_s16_1(svint8_t op, svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svrshrnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrshrnt_n_s32(svint16_t op, svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svrshrnt_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrshrnt_n_s32_1(svint16_t op, svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svrshrnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrshrnt_n_s64(svint32_t op, svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svrshrnt_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrshrnt_n_s64_1(svint32_t op, svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svrshrnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshrnt_n_u16(svuint8_t op, svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svrshrnt_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrshrnt_n_u16_1(svuint8_t op, svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svrshrnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrshrnt_n_u32(svuint16_t op, svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svrshrnt_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrshrnt_n_u32_1(svuint16_t op, svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svrshrnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrshrnt_n_u64(svuint32_t op, svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svrshrnt_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrshrnt_n_u64_1(svuint32_t op, svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svrsqrte_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ursqrte.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrsqrte_u32_zu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ursqrte.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrsqrte_u32_z(svbool_t pg, svuint32_t op) @@ -34,14 +34,14 @@ // CHECK-LABEL: @test_svrsqrte_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ursqrte.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrsqrte_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ursqrte.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrsqrte_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) @@ -51,14 +51,14 @@ // CHECK-LABEL: @test_svrsqrte_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ursqrte.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svrsqrte_u32_xu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ursqrte.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrsqrte_u32_x(svbool_t pg, svuint32_t op) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svrsra_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrsra_n_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrsra_n_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svrsra_n_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsra_n_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrsra_n_s8_1(svint8_t op1, svint8_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svrsra_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsra_n_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrsra_n_s16(svint16_t op1, svint16_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svrsra_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrsra_n_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrsra_n_s16_1(svint16_t op1, svint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svrsra_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsra_n_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrsra_n_s32(svint32_t op1, svint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svrsra_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrsra_n_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrsra_n_s32_1(svint32_t op1, svint32_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svrsra_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsra_n_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svrsra_n_s64(svint64_t op1, svint64_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svrsra_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrsra_n_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svrsra_n_s64_1(svint64_t op1, svint64_t op2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svrsra_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svrsra_n_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrsra_n_u8(svuint8_t op1, svuint8_t op2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svrsra_n_u8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsra_n_u8_1u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrsra_n_u8_1(svuint8_t op1, svuint8_t op2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svrsra_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsra_n_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrsra_n_u16(svuint16_t op1, svuint16_t op2) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svrsra_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrsra_n_u16_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrsra_n_u16_1(svuint16_t op1, svuint16_t op2) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svrsra_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsra_n_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrsra_n_u32(svuint32_t op1, svuint32_t op2) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svrsra_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrsra_n_u32_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrsra_n_u32_1(svuint32_t op1, svuint32_t op2) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svrsra_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svrsra_n_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svrsra_n_u64(svuint64_t op1, svuint64_t op2) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svrsra_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svrsra_n_u64_1u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svrsra_n_u64_1(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svrsubhnb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnb_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrsubhnb_s16(svint16_t op1, svint16_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svrsubhnb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnb_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrsubhnb_s32(svint32_t op1, svint32_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svrsubhnb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnb_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrsubhnb_s64(svint64_t op1, svint64_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svrsubhnb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnb_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrsubhnb_u16(svuint16_t op1, svuint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svrsubhnb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnb_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrsubhnb_u32(svuint32_t op1, svuint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svrsubhnb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnb_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrsubhnb_u64(svuint64_t op1, svuint64_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrsubhnb_n_s16(svint16_t op1, int16_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrsubhnb_n_s32(svint32_t op1, int32_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrsubhnb_n_s64(svint64_t op1, int64_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrsubhnb_n_u16(svuint16_t op1, uint16_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrsubhnb_n_u32(svuint32_t op1, uint32_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrsubhnb_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svrsubhnt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svrsubhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svrsubhnt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svrsubhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svrsubhnt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svrsubhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svrsubhnt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svrsubhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svrsubhnt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svrsubhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svrsubhnt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svrsubhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svrsubhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svrsubhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svrsubhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svrsubhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svrsubhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svrsubhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svrsubhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsbclb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsbclb_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsbclb_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsbclb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsbclb_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsbclb_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -49,14 +49,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclb_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsbclb_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -68,14 +68,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclb_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsbclb_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsbclt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsbclt_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsbclt_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsbclt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsbclt_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsbclt_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -49,14 +49,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclt_n_u32u12__SVUint32_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsbclt_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -68,14 +68,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsbclt_n_u64u12__SVUint64_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsbclt_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svshllb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllb_n_s16u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshllb_n_s16(svint8_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svshllb_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllb_n_s16_1u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshllb_n_s16_1(svint8_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svshllb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllb_n_s32u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshllb_n_s32(svint16_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svshllb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 15) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllb_n_s32_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshllb_n_s32_1(svint16_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svshllb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllb_n_s64u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svshllb_n_s64(svint32_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svshllb_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllb_n_s64_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svshllb_n_s64_1(svint32_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svshllb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllb_n_u16u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshllb_n_u16(svuint8_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svshllb_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllb_n_u16_1u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshllb_n_u16_1(svuint8_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svshllb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllb_n_u32u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshllb_n_u32(svuint16_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svshllb_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 15) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllb_n_u32_1u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshllb_n_u32_1(svuint16_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svshllb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllb_n_u64u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svshllb_n_u64(svuint32_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svshllb_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllb_n_u64_1u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svshllb_n_u64_1(svuint32_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svshllt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllt_n_s16u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshllt_n_s16(svint8_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svshllt_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllt_n_s16_1u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshllt_n_s16_1(svint8_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svshllt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllt_n_s32u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshllt_n_s32(svint16_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svshllt_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 15) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllt_n_s32_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshllt_n_s32_1(svint16_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svshllt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllt_n_s64u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svshllt_n_s64(svint32_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svshllt_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllt_n_s64_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svshllt_n_s64_1(svint32_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svshllt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllt_n_u16u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshllt_n_u16(svuint8_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svshllt_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllt_n_u16_1u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshllt_n_u16_1(svuint8_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svshllt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllt_n_u32u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshllt_n_u32(svuint16_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svshllt_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 15) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllt_n_u32_1u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshllt_n_u32_1(svuint16_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svshllt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshllt_n_u64u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svshllt_n_u64(svuint32_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svshllt_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshllt_n_u64_1u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svshllt_n_u64_1(svuint32_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svshrnb_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnb_n_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svshrnb_n_s16(svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svshrnb_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnb_n_s16_1u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svshrnb_n_s16_1(svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svshrnb_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnb_n_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshrnb_n_s32(svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svshrnb_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnb_n_s32_1u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshrnb_n_s32_1(svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svshrnb_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnb_n_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshrnb_n_s64(svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svshrnb_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnb_n_s64_1u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshrnb_n_s64_1(svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svshrnb_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnb_n_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svshrnb_n_u16(svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svshrnb_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnb_n_u16_1u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svshrnb_n_u16_1(svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svshrnb_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnb_n_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshrnb_n_u32(svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svshrnb_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnb_n_u32_1u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshrnb_n_u32_1(svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svshrnb_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnb_n_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshrnb_n_u64(svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svshrnb_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnb_n_u64_1u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshrnb_n_u64_1(svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svshrnt_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svshrnt_n_s16(svint8_t op, svint16_t op1) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svshrnt_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svshrnt_n_s16_1(svint8_t op, svint16_t op1) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svshrnt_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshrnt_n_s32(svint16_t op, svint32_t op1) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svshrnt_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svshrnt_n_s32_1(svint16_t op, svint32_t op1) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svshrnt_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshrnt_n_s64(svint32_t op, svint64_t op1) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svshrnt_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svshrnt_n_s64_1(svint32_t op, svint64_t op1) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svshrnt_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svshrnt_n_u16(svuint8_t op, svuint16_t op1) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svshrnt_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svshrnt_n_u16_1(svuint8_t op, svuint16_t op1) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svshrnt_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshrnt_n_u32(svuint16_t op, svuint32_t op1) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svshrnt_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svshrnt_n_u32_1(svuint16_t op, svuint32_t op1) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svshrnt_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshrnt_n_u64(svuint32_t op, svuint64_t op1) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svshrnt_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svshrnt_n_u64_1(svuint32_t op, svuint64_t op1) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsli_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsli_n_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsli_n_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsli_n_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsli_n_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsli_n_s8_1(svint8_t op1, svint8_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsli_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsli_n_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsli_n_s16(svint16_t op1, svint16_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsli_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsli_n_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsli_n_s16_1(svint16_t op1, svint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsli_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsli_n_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsli_n_s32(svint32_t op1, svint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsli_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsli_n_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsli_n_s32_1(svint32_t op1, svint32_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svsli_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsli_n_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsli_n_s64(svint64_t op1, svint64_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svsli_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsli_n_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsli_n_s64_1(svint64_t op1, svint64_t op2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svsli_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsli_n_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsli_n_u8(svuint8_t op1, svuint8_t op2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svsli_n_u8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsli_n_u8_1u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsli_n_u8_1(svuint8_t op1, svuint8_t op2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svsli_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsli_n_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsli_n_u16(svuint16_t op1, svuint16_t op2) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svsli_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsli_n_u16_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsli_n_u16_1(svuint16_t op1, svuint16_t op2) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svsli_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsli_n_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsli_n_u32(svuint32_t op1, svuint32_t op2) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svsli_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsli_n_u32_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsli_n_u32_1(svuint32_t op1, svuint32_t op2) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svsli_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsli_n_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsli_n_u64(svuint64_t op1, svuint64_t op2) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svsli_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsli_n_u64_1u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsli_n_u64_1(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsm4e_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sm4e( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4e( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsm4e_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sm4e( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4e( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsm4e_u32(svuint32_t op1, svuint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsm4ekey_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sm4ekey( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4ekey( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsm4ekey_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sm4ekey( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4ekey( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsm4ekey_u32(svuint32_t op1, svuint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svsqadd_u8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsqadd_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsqadd_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svsqadd_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsqadd_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svsqadd_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsqadd_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svsqadd_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsqadd_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -85,14 +85,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_mu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsqadd_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) @@ -102,18 +102,18 @@ // CHECK-LABEL: @test_svsqadd_n_u16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_mu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsqadd_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) @@ -123,18 +123,18 @@ // CHECK-LABEL: @test_svsqadd_n_u32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_mu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsqadd_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) @@ -144,18 +144,18 @@ // CHECK-LABEL: @test_svsqadd_n_u64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_mu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsqadd_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) @@ -166,13 +166,13 @@ // CHECK-LABEL: @test_svsqadd_u8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsqadd_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsqadd_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -182,16 +182,16 @@ // CHECK-LABEL: @test_svsqadd_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsqadd_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -201,16 +201,16 @@ // CHECK-LABEL: @test_svsqadd_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsqadd_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -220,16 +220,16 @@ // CHECK-LABEL: @test_svsqadd_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsqadd_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -242,7 +242,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_zu10__SVBool_tu11__SVUint8_ta( @@ -250,7 +250,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svsqadd_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) @@ -260,20 +260,20 @@ // CHECK-LABEL: @test_svsqadd_n_u16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_zu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint16_t test_svsqadd_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) @@ -283,20 +283,20 @@ // CHECK-LABEL: @test_svsqadd_n_u32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_zu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint32_t test_svsqadd_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) @@ -306,20 +306,20 @@ // CHECK-LABEL: @test_svsqadd_n_u64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_zu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svuint64_t test_svsqadd_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) @@ -329,12 +329,12 @@ // CHECK-LABEL: @test_svsqadd_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsqadd_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsqadd_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) @@ -344,14 +344,14 @@ // CHECK-LABEL: @test_svsqadd_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsqadd_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) @@ -361,14 +361,14 @@ // CHECK-LABEL: @test_svsqadd_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsqadd_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) @@ -379,14 +379,14 @@ // CHECK-LABEL: @test_svsqadd_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsqadd_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsqadd_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) @@ -398,14 +398,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_xu10__SVBool_tu11__SVUint8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsqadd_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) @@ -415,18 +415,18 @@ // CHECK-LABEL: @test_svsqadd_n_u16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_xu10__SVBool_tu12__SVUint16_ts( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svsqadd_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) @@ -436,18 +436,18 @@ // CHECK-LABEL: @test_svsqadd_n_u32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_xu10__SVBool_tu12__SVUint32_ti( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svsqadd_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) @@ -457,18 +457,18 @@ // CHECK-LABEL: @test_svsqadd_n_u64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_xu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svsqadd_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsra_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsra_n_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsra_n_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsra_n_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsra_n_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsra_n_s8_1(svint8_t op1, svint8_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsra_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsra_n_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsra_n_s16(svint16_t op1, svint16_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsra_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsra_n_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsra_n_s16_1(svint16_t op1, svint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsra_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsra_n_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsra_n_s32(svint32_t op1, svint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsra_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsra_n_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsra_n_s32_1(svint32_t op1, svint32_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svsra_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsra_n_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsra_n_s64(svint64_t op1, svint64_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svsra_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsra_n_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsra_n_s64_1(svint64_t op1, svint64_t op2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svsra_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsra_n_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsra_n_u8(svuint8_t op1, svuint8_t op2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svsra_n_u8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsra_n_u8_1u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsra_n_u8_1(svuint8_t op1, svuint8_t op2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svsra_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsra_n_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsra_n_u16(svuint16_t op1, svuint16_t op2) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svsra_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsra_n_u16_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsra_n_u16_1(svuint16_t op1, svuint16_t op2) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svsra_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsra_n_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsra_n_u32(svuint32_t op1, svuint32_t op2) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svsra_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsra_n_u32_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsra_n_u32_1(svuint32_t op1, svuint32_t op2) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svsra_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsra_n_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsra_n_u64(svuint64_t op1, svuint64_t op2) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svsra_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsra_n_u64_1u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsra_n_u64_1(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsri_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsri_n_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsri_n_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsri_n_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsri_n_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsri_n_s8_1(svint8_t op1, svint8_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsri_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsri_n_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsri_n_s16(svint16_t op1, svint16_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsri_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsri_n_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsri_n_s16_1(svint16_t op1, svint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsri_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsri_n_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsri_n_s32(svint32_t op1, svint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsri_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsri_n_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsri_n_s32_1(svint32_t op1, svint32_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svsri_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsri_n_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsri_n_s64(svint64_t op1, svint64_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svsri_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsri_n_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsri_n_s64_1(svint64_t op1, svint64_t op2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svsri_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svsri_n_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsri_n_u8(svuint8_t op1, svuint8_t op2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svsri_n_u8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsri_n_u8_1u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsri_n_u8_1(svuint8_t op1, svuint8_t op2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svsri_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsri_n_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsri_n_u16(svuint16_t op1, svuint16_t op2) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svsri_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsri_n_u16_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsri_n_u16_1(svuint16_t op1, svuint16_t op2) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svsri_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsri_n_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsri_n_u32(svuint32_t op1, svuint32_t op2) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svsri_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsri_n_u32_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsri_n_u32_1(svuint32_t op1, svuint32_t op2) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svsri_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsri_n_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsri_n_u64(svuint64_t op1, svuint64_t op2) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svsri_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svsri_n_u64_1u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsri_n_u64_1(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) { @@ -33,14 +33,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) { @@ -65,14 +65,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { @@ -81,14 +81,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u32base_f32u10__SVBool_tu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_f32(svbool_t pg, svuint32_t bases, svfloat32_t data) { @@ -97,14 +97,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u64base_f64u10__SVBool_tu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_f64(svbool_t pg, svuint64_t bases, svfloat64_t data) { @@ -113,14 +113,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_s64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_s64offset_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_s64offset_s64(svbool_t pg, int64_t *base, svint64_t offsets, svint64_t data) { @@ -129,14 +129,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_s64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_s64offset_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_s64offset_u64(svbool_t pg, uint64_t *base, svint64_t offsets, svuint64_t data) { @@ -145,14 +145,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_s64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_s64offset_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_s64offset_f64(svbool_t pg, float64_t *base, svint64_t offsets, svfloat64_t data) { @@ -161,14 +161,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u32offset_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32offset_s32(svbool_t pg, int32_t *base, svuint32_t offsets, svint32_t data) { @@ -177,14 +177,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u64offset_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64offset_s64(svbool_t pg, int64_t *base, svuint64_t offsets, svint64_t data) { @@ -193,14 +193,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u32offset_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32offset_u32(svbool_t pg, uint32_t *base, svuint32_t offsets, svuint32_t data) { @@ -209,14 +209,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u64offset_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64offset_u64(svbool_t pg, uint64_t *base, svuint64_t offsets, svuint64_t data) { @@ -225,14 +225,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u32offset_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32offset_f32(svbool_t pg, float32_t *base, svuint32_t offsets, svfloat32_t data) { @@ -241,14 +241,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u64offset_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64offset_f64(svbool_t pg, float64_t *base, svuint64_t offsets, svfloat64_t data) { @@ -257,14 +257,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_offset_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) { @@ -273,14 +273,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_offset_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { @@ -289,14 +289,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_offset_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) { @@ -305,14 +305,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_offset_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { @@ -321,14 +321,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_offset_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u32base_offset_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset, svfloat32_t data) { @@ -337,14 +337,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_offset_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u64base_offset_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset, svfloat64_t data) { @@ -353,14 +353,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_s64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_s64index_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_s64index_s64(svbool_t pg, int64_t *base, svint64_t indices, svint64_t data) { @@ -369,14 +369,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_s64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_s64index_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_s64index_u64(svbool_t pg, uint64_t *base, svint64_t indices, svuint64_t data) { @@ -385,14 +385,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_s64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_s64index_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_s64index_f64(svbool_t pg, float64_t *base, svint64_t indices, svfloat64_t data) { @@ -401,14 +401,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_u64index_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64index_s64(svbool_t pg, int64_t *base, svuint64_t indices, svint64_t data) { @@ -417,14 +417,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_u64index_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64index_u64(svbool_t pg, uint64_t *base, svuint64_t indices, svuint64_t data) { @@ -433,14 +433,14 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_u64index_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64index_f64(svbool_t pg, float64_t *base, svuint64_t indices, svfloat64_t data) { @@ -449,16 +449,16 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_index_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) { @@ -467,16 +467,16 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_index_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) { @@ -485,16 +485,16 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_index_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) { @@ -503,16 +503,16 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_index_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) { @@ -521,16 +521,16 @@ // CHECK-LABEL: @test_svstnt1_scatter_u32base_index_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u32base_index_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index, svfloat32_t data) { @@ -539,16 +539,16 @@ // CHECK-LABEL: @test_svstnt1_scatter_u64base_index_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u64base_index_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1_scatter_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index, svfloat64_t data) { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c @@ -18,15 +18,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) { @@ -36,15 +36,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { @@ -54,15 +54,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) { @@ -72,15 +72,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { @@ -90,15 +90,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_s64offset_s64u10__SVBool_tPau11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_s64offset_s64(svbool_t pg, int8_t *base, svint64_t offsets, svint64_t data) { @@ -108,15 +108,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_s64offset_u64u10__SVBool_tPhu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_s64offset_u64(svbool_t pg, uint8_t *base, svint64_t offsets, svuint64_t data) { @@ -126,15 +126,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u32offset_s32u10__SVBool_tPau12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u32offset_s32(svbool_t pg, int8_t *base, svuint32_t offsets, svint32_t data) { @@ -144,15 +144,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u64offset_s64u10__SVBool_tPau12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u64offset_s64(svbool_t pg, int8_t *base, svuint64_t offsets, svint64_t data) { @@ -162,15 +162,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u32offset_u32u10__SVBool_tPhu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u32offset_u32(svbool_t pg, uint8_t *base, svuint32_t offsets, svuint32_t data) { @@ -180,15 +180,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u64offset_u64u10__SVBool_tPhu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u64offset_u64(svbool_t pg, uint8_t *base, svuint64_t offsets, svuint64_t data) { @@ -198,15 +198,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) { @@ -216,15 +216,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { @@ -234,15 +234,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) { @@ -252,15 +252,15 @@ // CHECK-LABEL: @test_svstnt1b_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1b_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c @@ -18,15 +18,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) { @@ -36,15 +36,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { @@ -54,15 +54,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) { @@ -72,15 +72,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { @@ -90,15 +90,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_s64offset_s64u10__SVBool_tPsu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_s64offset_s64(svbool_t pg, int16_t *base, svint64_t offsets, svint64_t data) { @@ -108,15 +108,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_s64offset_u64u10__SVBool_tPtu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_s64offset_u64(svbool_t pg, uint16_t *base, svint64_t offsets, svuint64_t data) { @@ -126,15 +126,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u32offset_s32u10__SVBool_tPsu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32offset_s32(svbool_t pg, int16_t *base, svuint32_t offsets, svint32_t data) { @@ -144,15 +144,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u64offset_s64u10__SVBool_tPsu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64offset_s64(svbool_t pg, int16_t *base, svuint64_t offsets, svint64_t data) { @@ -162,15 +162,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u32offset_u32u10__SVBool_tPtu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32offset_u32(svbool_t pg, uint16_t *base, svuint32_t offsets, svuint32_t data) { @@ -180,15 +180,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u64offset_u64u10__SVBool_tPtu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64offset_u64(svbool_t pg, uint16_t *base, svuint64_t offsets, svuint64_t data) { @@ -198,15 +198,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) { @@ -216,15 +216,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { @@ -234,15 +234,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) { @@ -252,15 +252,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { @@ -270,15 +270,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_s64index_s64u10__SVBool_tPsu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_s64index_s64(svbool_t pg, int16_t *base, svint64_t indices, svint64_t data) { @@ -288,15 +288,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_s64index_u64u10__SVBool_tPtu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_s64index_u64(svbool_t pg, uint16_t *base, svint64_t indices, svuint64_t data) { @@ -306,15 +306,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_u64index_s64u10__SVBool_tPsu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64index_s64(svbool_t pg, int16_t *base, svuint64_t indices, svint64_t data) { @@ -324,15 +324,15 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_u64index_u64u10__SVBool_tPtu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64index_u64(svbool_t pg, uint16_t *base, svuint64_t indices, svuint64_t data) { @@ -342,17 +342,17 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) { @@ -362,17 +362,17 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) { @@ -382,17 +382,17 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) { @@ -402,17 +402,17 @@ // CHECK-LABEL: @test_svstnt1h_scatter_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1h_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c @@ -18,15 +18,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1w_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { @@ -36,15 +36,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z33test_svstnt1w_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { @@ -54,15 +54,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_s64offset_s64u10__SVBool_tPiu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_s64offset_s64(svbool_t pg, int32_t *base, svint64_t offsets, svint64_t data) { @@ -72,15 +72,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_s64offset_u64u10__SVBool_tPju11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_s64offset_u64(svbool_t pg, uint32_t *base, svint64_t offsets, svuint64_t data) { @@ -90,15 +90,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_u64offset_s64u10__SVBool_tPiu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64offset_s64(svbool_t pg, int32_t *base, svuint64_t offsets, svint64_t data) { @@ -108,15 +108,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_u64offset_u64u10__SVBool_tPju12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64offset_u64(svbool_t pg, uint32_t *base, svuint64_t offsets, svuint64_t data) { @@ -126,15 +126,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1w_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { @@ -144,15 +144,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z40test_svstnt1w_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { @@ -162,15 +162,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_s64index_s64u10__SVBool_tPiu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_s64index_s64(svbool_t pg, int32_t *base, svint64_t indices, svint64_t data) { @@ -180,15 +180,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_s64index_u64u10__SVBool_tPju11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_s64index_u64(svbool_t pg, uint32_t *base, svint64_t indices, svuint64_t data) { @@ -198,15 +198,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_u64index_s64u10__SVBool_tPiu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64index_s64(svbool_t pg, int32_t *base, svuint64_t indices, svint64_t data) { @@ -216,15 +216,15 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_u64index_u64u10__SVBool_tPju12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64index_u64(svbool_t pg, uint32_t *base, svuint64_t indices, svuint64_t data) { @@ -234,17 +234,17 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1w_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) { @@ -254,17 +254,17 @@ // CHECK-LABEL: @test_svstnt1w_scatter_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z39test_svstnt1w_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) +// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) // CPP-CHECK-NEXT: ret void // void test_svstnt1w_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsubhnb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnb_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsubhnb_s16(svint16_t op1, svint16_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsubhnb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnb_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsubhnb_s32(svint32_t op1, svint32_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsubhnb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnb_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsubhnb_s64(svint64_t op1, svint64_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsubhnb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnb_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsubhnb_u16(svuint16_t op1, svuint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsubhnb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnb_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsubhnb_u32(svuint32_t op1, svuint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsubhnb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnb_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsubhnb_u64(svuint64_t op1, svuint64_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s16u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsubhnb_n_s16(svint16_t op1, int16_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s32u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubhnb_n_s32(svint32_t op1, int32_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s64u11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubhnb_n_s64(svint64_t op1, int64_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u16u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsubhnb_n_u16(svuint16_t op1, uint16_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u32u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubhnb_n_u32(svuint32_t op1, uint32_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u64u12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubhnb_n_u64(svuint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsubhnt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svsubhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsubhnt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsubhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsubhnt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsubhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsubhnt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svsubhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsubhnt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsubhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsubhnt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsubhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svsubhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svsubhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsublb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublb_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsublb_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsublb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublb_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsublb_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsublb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublb_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsublb_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsublb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublb_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsublb_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsublb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublb_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsublb_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsublb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublb_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsublb_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsublb_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsublb_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsublb_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsublb_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsublb_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublb_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsublb_n_u64(svuint32_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsublbt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsublbt_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsublbt_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsublbt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsublbt_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsublbt_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsublbt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsublbt_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsublbt_s64(svint32_t op1, svint32_t op2) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsublbt_n_s16(svint8_t op1, int8_t op2) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsublbt_n_s32(svint16_t op1, int16_t op2) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsublbt_n_s64(svint32_t op1, int32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsublt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublt_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsublt_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsublt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublt_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsublt_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsublt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublt_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsublt_s64(svint32_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsublt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublt_u16u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsublt_u16(svuint8_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsublt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublt_u32u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsublt_u32(svuint16_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsublt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsublt_u64u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsublt_u64(svuint32_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsublt_n_s16(svint8_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsublt_n_s32(svint16_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsublt_n_s64(svint32_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_u16u11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsublt_n_u16(svuint8_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_u32u12__SVUint16_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsublt_n_u32(svuint16_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsublt_n_u64u12__SVUint32_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsublt_n_u64(svuint32_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsubltb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubltb_s16u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsubltb_s16(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsubltb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubltb_s32u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsubltb_s32(svint16_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsubltb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svsubltb_s64u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsubltb_s64(svint32_t op1, svint32_t op2) @@ -64,14 +64,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s16u10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubltb_n_s16(svint8_t op1, int8_t op2) @@ -83,14 +83,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s32u11__SVInt16_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubltb_n_s32(svint16_t op1, int16_t op2) @@ -102,14 +102,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s64u11__SVInt32_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsubltb_n_s64(svint32_t op1, int32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsubwb_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwb_s16u11__SVInt16_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsubwb_s16(svint16_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsubwb_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwb_s32u11__SVInt32_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsubwb_s32(svint32_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsubwb_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwb_s64u11__SVInt64_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsubwb_s64(svint64_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsubwb_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwb_u16u12__SVUint16_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsubwb_u16(svuint16_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsubwb_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwb_u32u12__SVUint32_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsubwb_u32(svuint32_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsubwb_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwb_u64u12__SVUint64_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsubwb_u64(svuint64_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubwb_n_s16(svint16_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubwb_n_s32(svint32_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsubwb_n_s64(svint64_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubwb_n_u16(svuint16_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubwb_n_u32(svuint32_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsubwb_n_u64(svuint64_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svsubwt_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwt_s16u11__SVInt16_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svsubwt_s16(svint16_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svsubwt_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwt_s32u11__SVInt32_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svsubwt_s32(svint32_t op1, svint16_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svsubwt_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwt_s64u11__SVInt64_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svsubwt_s64(svint64_t op1, svint32_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svsubwt_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwt_u16u12__SVUint16_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svsubwt_u16(svuint16_t op1, svuint8_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svsubwt_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwt_u32u12__SVUint32_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svsubwt_u32(svuint32_t op1, svuint16_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svsubwt_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svsubwt_u64u12__SVUint64_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svsubwt_u64(svuint64_t op1, svuint32_t op2) @@ -109,14 +109,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s16u11__SVInt16_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svsubwt_n_s16(svint16_t op1, int8_t op2) @@ -128,14 +128,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s32u11__SVInt32_ts( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svsubwt_n_s32(svint32_t op1, int16_t op2) @@ -147,14 +147,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s64u11__SVInt64_ti( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svsubwt_n_s64(svint64_t op1, int32_t op2) @@ -166,14 +166,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u16u12__SVUint16_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svsubwt_n_u16(svuint16_t op1, uint8_t op2) @@ -185,14 +185,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u32u12__SVUint32_tt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svsubwt_n_u32(svuint32_t op1, uint16_t op2) @@ -204,14 +204,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u64u12__SVUint64_tj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svsubwt_n_u64(svuint64_t op1, uint32_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c @@ -16,16 +16,16 @@ // CHECK-LABEL: @test_svtbl2_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8bf16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8bf16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z16test_svtbl2_bf1614svbfloat16x2_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8bf16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8bf16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svbfloat16_t test_svtbl2_bf16(svbfloat16x2_t data, svuint16_t indices) { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c @@ -17,16 +17,16 @@ // CHECK-LABEL: @test_svtbl2_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svtbl2_s810svint8x2_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svtbl2_s8(svint8x2_t data, svuint8_t indices) @@ -36,16 +36,16 @@ // CHECK-LABEL: @test_svtbl2_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_s1611svint16x2_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svtbl2_s16(svint16x2_t data, svuint16_t indices) @@ -55,16 +55,16 @@ // CHECK-LABEL: @test_svtbl2_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_s3211svint32x2_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svtbl2_s32(svint32x2_t data, svuint32_t indices) @@ -74,16 +74,16 @@ // CHECK-LABEL: @test_svtbl2_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_s6411svint64x2_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svtbl2_s64(svint64x2_t data, svuint64_t indices) @@ -93,16 +93,16 @@ // CHECK-LABEL: @test_svtbl2_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z14test_svtbl2_u811svuint8x2_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint8_t test_svtbl2_u8(svuint8x2_t data, svuint8_t indices) @@ -112,16 +112,16 @@ // CHECK-LABEL: @test_svtbl2_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_u1612svuint16x2_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint16_t test_svtbl2_u16(svuint16x2_t data, svuint16_t indices) @@ -131,16 +131,16 @@ // CHECK-LABEL: @test_svtbl2_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_u3212svuint32x2_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint32_t test_svtbl2_u32(svuint32x2_t data, svuint32_t indices) @@ -150,16 +150,16 @@ // CHECK-LABEL: @test_svtbl2_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_u6412svuint64x2_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svuint64_t test_svtbl2_u64(svuint64x2_t data, svuint64_t indices) @@ -169,16 +169,16 @@ // CHECK-LABEL: @test_svtbl2_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8f16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8f16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_f1613svfloat16x2_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv8f16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8f16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat16_t test_svtbl2_f16(svfloat16x2_t data, svuint16_t indices) @@ -188,16 +188,16 @@ // CHECK-LABEL: @test_svtbl2_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv4f32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4f32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_f3213svfloat32x2_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv4f32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4f32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat32_t test_svtbl2_f32(svfloat32x2_t data, svuint32_t indices) @@ -207,16 +207,16 @@ // CHECK-LABEL: @test_svtbl2_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv2f64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2f64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z15test_svtbl2_f6413svfloat64x2_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.tbl2.nxv2f64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2f64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svfloat64_t test_svtbl2_f64(svfloat64x2_t data, svuint64_t indices) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svtbx_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8bf16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8bf16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svtbx_bf16u14__SVBFloat16_tu14__SVBFloat16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8bf16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8bf16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svtbx_bf16(svbfloat16_t fallback, svbfloat16_t data, svuint16_t indices) { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svtbx_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svtbx_s8u10__SVInt8_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svtbx_s8(svint8_t fallback, svint8_t data, svuint8_t indices) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svtbx_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_s16u11__SVInt16_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svtbx_s16(svint16_t fallback, svint16_t data, svuint16_t indices) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svtbx_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_s32u11__SVInt32_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svtbx_s32(svint32_t fallback, svint32_t data, svuint32_t indices) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svtbx_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_s64u11__SVInt64_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svtbx_s64(svint64_t fallback, svint64_t data, svuint64_t indices) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svtbx_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z13test_svtbx_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svtbx_u8(svuint8_t fallback, svuint8_t data, svuint8_t indices) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svtbx_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svtbx_u16(svuint16_t fallback, svuint16_t data, svuint16_t indices) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svtbx_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svtbx_u32(svuint32_t fallback, svuint32_t data, svuint32_t indices) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svtbx_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svtbx_u64(svuint64_t fallback, svuint64_t data, svuint64_t indices) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svtbx_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8f16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8f16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_f16u13__SVFloat16_tu13__SVFloat16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv8f16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8f16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svtbx_f16(svfloat16_t fallback, svfloat16_t data, svuint16_t indices) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svtbx_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv4f32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4f32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_f32u13__SVFloat32_tu13__SVFloat32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv4f32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4f32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svtbx_f32(svfloat32_t fallback, svfloat32_t data, svuint32_t indices) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svtbx_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv2f64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2f64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z14test_svtbx_f64u13__SVFloat64_tu13__SVFloat64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.tbx.nxv2f64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2f64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svtbx_f64(svfloat64_t fallback, svfloat64_t data, svuint64_t indices) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svuqadd_s8_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svuqadd_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svuqadd_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -31,14 +31,14 @@ // CHECK-LABEL: @test_svuqadd_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svuqadd_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svuqadd_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svuqadd_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svuqadd_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svuqadd_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -85,14 +85,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_mu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svuqadd_n_s8_m(svbool_t pg, svint8_t op1, uint8_t op2) @@ -102,18 +102,18 @@ // CHECK-LABEL: @test_svuqadd_n_s16_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_mu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svuqadd_n_s16_m(svbool_t pg, svint16_t op1, uint16_t op2) @@ -123,18 +123,18 @@ // CHECK-LABEL: @test_svuqadd_n_s32_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_mu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svuqadd_n_s32_m(svbool_t pg, svint32_t op1, uint32_t op2) @@ -144,18 +144,18 @@ // CHECK-LABEL: @test_svuqadd_n_s64_m( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_mu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svuqadd_n_s64_m(svbool_t pg, svint64_t op1, uint64_t op2) @@ -166,13 +166,13 @@ // CHECK-LABEL: @test_svuqadd_s8_z( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svuqadd_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svuqadd_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -182,16 +182,16 @@ // CHECK-LABEL: @test_svuqadd_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svuqadd_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -201,16 +201,16 @@ // CHECK-LABEL: @test_svuqadd_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svuqadd_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -220,16 +220,16 @@ // CHECK-LABEL: @test_svuqadd_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svuqadd_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -242,7 +242,7 @@ // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_zu10__SVBool_tu10__SVInt8_th( @@ -250,7 +250,7 @@ // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP1:%.*]] = select [[PG:%.*]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint8_t test_svuqadd_n_s8_z(svbool_t pg, svint8_t op1, uint8_t op2) @@ -260,20 +260,20 @@ // CHECK-LABEL: @test_svuqadd_n_s16_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_zu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint16_t test_svuqadd_n_s16_z(svbool_t pg, svint16_t op1, uint16_t op2) @@ -283,20 +283,20 @@ // CHECK-LABEL: @test_svuqadd_n_s32_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_zu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint32_t test_svuqadd_n_s32_z(svbool_t pg, svint32_t op1, uint32_t op2) @@ -306,20 +306,20 @@ // CHECK-LABEL: @test_svuqadd_n_s64_z( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CHECK-NEXT: ret [[TMP3]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_zu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer // CPP-CHECK-NEXT: [[TMP2:%.*]] = select [[TMP0]], [[OP1:%.*]], zeroinitializer -// CPP-CHECK-NEXT: [[TMP3:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP3]] // svint64_t test_svuqadd_n_s64_z(svbool_t pg, svint64_t op1, uint64_t op2) @@ -329,12 +329,12 @@ // CHECK-LABEL: @test_svuqadd_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svuqadd_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svuqadd_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) @@ -344,14 +344,14 @@ // CHECK-LABEL: @test_svuqadd_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svuqadd_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) @@ -361,14 +361,14 @@ // CHECK-LABEL: @test_svuqadd_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svuqadd_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) @@ -379,14 +379,14 @@ // CHECK-LABEL: @test_svuqadd_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svuqadd_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svuqadd_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) @@ -398,14 +398,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_xu10__SVBool_tu10__SVInt8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svuqadd_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2) @@ -415,18 +415,18 @@ // CHECK-LABEL: @test_svuqadd_n_s16_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_xu10__SVBool_tu11__SVInt16_tt( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint16_t test_svuqadd_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2) @@ -436,18 +436,18 @@ // CHECK-LABEL: @test_svuqadd_n_s32_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_xu10__SVBool_tu11__SVInt32_tj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint32_t test_svuqadd_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2) @@ -457,18 +457,18 @@ // CHECK-LABEL: @test_svuqadd_n_s64_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // // CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_xu10__SVBool_tu11__SVInt64_tm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[TMP1:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) // CPP-CHECK-NEXT: ret [[TMP2]] // svint64_t test_svuqadd_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svwhilege_b8_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilege_b8_s32(int32_t op1, int32_t op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svwhilege_b16_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b16_s32(int32_t op1, int32_t op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svwhilege_b32_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b32_s32(int32_t op1, int32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svwhilege_b64_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b64_s32(int32_t op1, int32_t op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svwhilege_b8_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilege_b8_u32(uint32_t op1, uint32_t op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svwhilege_b16_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b16_u32(uint32_t op1, uint32_t op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svwhilege_b32_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b32_u32(uint32_t op1, uint32_t op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svwhilege_b64_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b64_u32(uint32_t op1, uint32_t op2) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svwhilege_b8_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilege_b8_s64(int64_t op1, int64_t op2) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svwhilege_b16_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b16_s64(int64_t op1, int64_t op2) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svwhilege_b32_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b32_s64(int64_t op1, int64_t op2) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svwhilege_b64_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b64_s64(int64_t op1, int64_t op2) @@ -215,12 +215,12 @@ // CHECK-LABEL: @test_svwhilege_b8_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilege_b8_u64(uint64_t op1, uint64_t op2) @@ -230,14 +230,14 @@ // CHECK-LABEL: @test_svwhilege_b16_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b16_u64(uint64_t op1, uint64_t op2) @@ -247,14 +247,14 @@ // CHECK-LABEL: @test_svwhilege_b32_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b32_u64(uint64_t op1, uint64_t op2) @@ -264,14 +264,14 @@ // CHECK-LABEL: @test_svwhilege_b64_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilege_b64_u64(uint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svwhilegt_b8_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilegt_b8_s32(int32_t op1, int32_t op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svwhilegt_b16_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b16_s32(int32_t op1, int32_t op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svwhilegt_b32_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b32_s32(int32_t op1, int32_t op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svwhilegt_b64_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_s32ii( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b64_s32(int32_t op1, int32_t op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svwhilegt_b8_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilegt_b8_u32(uint32_t op1, uint32_t op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svwhilegt_b16_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b16_u32(uint32_t op1, uint32_t op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svwhilegt_b32_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b32_u32(uint32_t op1, uint32_t op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svwhilegt_b64_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_u32jj( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b64_u32(uint32_t op1, uint32_t op2) @@ -149,12 +149,12 @@ // CHECK-LABEL: @test_svwhilegt_b8_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilegt_b8_s64(int64_t op1, int64_t op2) @@ -164,14 +164,14 @@ // CHECK-LABEL: @test_svwhilegt_b16_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b16_s64(int64_t op1, int64_t op2) @@ -181,14 +181,14 @@ // CHECK-LABEL: @test_svwhilegt_b32_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b32_s64(int64_t op1, int64_t op2) @@ -198,14 +198,14 @@ // CHECK-LABEL: @test_svwhilegt_b64_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_s64ll( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b64_s64(int64_t op1, int64_t op2) @@ -215,12 +215,12 @@ // CHECK-LABEL: @test_svwhilegt_b8_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilegt_b8_u64(uint64_t op1, uint64_t op2) @@ -230,14 +230,14 @@ // CHECK-LABEL: @test_svwhilegt_b16_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b16_u64(uint64_t op1, uint64_t op2) @@ -247,14 +247,14 @@ // CHECK-LABEL: @test_svwhilegt_b32_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b32_u64(uint64_t op1, uint64_t op2) @@ -264,14 +264,14 @@ // CHECK-LABEL: @test_svwhilegt_b64_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_u64mm( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilegt_b64_u64(uint64_t op1, uint64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svwhilerw_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svwhilerw_bf16PKu6__bf16S0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_bf16(const bfloat16_t *op1, const bfloat16_t *op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svwhilerw_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svwhilerw_s8PKaS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilerw_s8(const int8_t *op1, const int8_t *op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svwhilerw_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_s16PKsS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_s16(const int16_t *op1, const int16_t *op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svwhilerw_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_s32PKiS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_s32(const int32_t *op1, const int32_t *op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svwhilerw_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_s64PKlS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_s64(const int64_t *op1, const int64_t *op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svwhilerw_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svwhilerw_u8PKhS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilerw_u8(const uint8_t *op1, const uint8_t *op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svwhilerw_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_u16PKtS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_u16(const uint16_t *op1, const uint16_t *op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svwhilerw_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_u32PKjS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_u32(const uint32_t *op1, const uint32_t *op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svwhilerw_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_u64PKmS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_u64(const uint64_t *op1, const uint64_t *op2) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svwhilerw_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_f16PKDhS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_f16(const float16_t *op1, const float16_t *op2) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svwhilerw_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_f32PKfS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_f32(const float32_t *op1, const float32_t *op2) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svwhilerw_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilerw_f64PKdS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilerw_f64(const float64_t *op1, const float64_t *op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c @@ -17,14 +17,14 @@ // CHECK-LABEL: @test_svwhilewr_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svwhilewr_bf16PKu6__bf16S0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_bf16(const bfloat16_t *op1, const bfloat16_t *op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svwhilewr_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svwhilewr_s8PKaS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilewr_s8(const int8_t *op1, const int8_t *op2) @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svwhilewr_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_s16PKsS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_s16(const int16_t *op1, const int16_t *op2) @@ -49,14 +49,14 @@ // CHECK-LABEL: @test_svwhilewr_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_s32PKiS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_s32(const int32_t *op1, const int32_t *op2) @@ -66,14 +66,14 @@ // CHECK-LABEL: @test_svwhilewr_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_s64PKlS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_s64(const int64_t *op1, const int64_t *op2) @@ -83,12 +83,12 @@ // CHECK-LABEL: @test_svwhilewr_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svwhilewr_u8PKhS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svbool_t test_svwhilewr_u8(const uint8_t *op1, const uint8_t *op2) @@ -98,14 +98,14 @@ // CHECK-LABEL: @test_svwhilewr_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_u16PKtS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_u16(const uint16_t *op1, const uint16_t *op2) @@ -115,14 +115,14 @@ // CHECK-LABEL: @test_svwhilewr_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_u32PKjS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_u32(const uint32_t *op1, const uint32_t *op2) @@ -132,14 +132,14 @@ // CHECK-LABEL: @test_svwhilewr_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_u64PKmS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_u64(const uint64_t *op1, const uint64_t *op2) @@ -149,14 +149,14 @@ // CHECK-LABEL: @test_svwhilewr_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_f16PKDhS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_f16(const float16_t *op1, const float16_t *op2) @@ -166,14 +166,14 @@ // CHECK-LABEL: @test_svwhilewr_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_f32PKfS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_f32(const float32_t *op1, const float32_t *op2) @@ -183,14 +183,14 @@ // CHECK-LABEL: @test_svwhilewr_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svwhilewr_f64PKdS0_( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svbool_t test_svwhilewr_f64(const float64_t *op1, const float64_t *op2) diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c @@ -17,12 +17,12 @@ // CHECK-LABEL: @test_svxar_n_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svxar_n_s8u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svxar_n_s8(svint8_t op1, svint8_t op2) @@ -32,12 +32,12 @@ // CHECK-LABEL: @test_svxar_n_s8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svxar_n_s8_1u10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svxar_n_s8_1(svint8_t op1, svint8_t op2) @@ -47,12 +47,12 @@ // CHECK-LABEL: @test_svxar_n_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svxar_n_s16u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svxar_n_s16(svint16_t op1, svint16_t op2) @@ -62,12 +62,12 @@ // CHECK-LABEL: @test_svxar_n_s16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svxar_n_s16_1u11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svxar_n_s16_1(svint16_t op1, svint16_t op2) @@ -77,12 +77,12 @@ // CHECK-LABEL: @test_svxar_n_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svxar_n_s32u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svxar_n_s32(svint32_t op1, svint32_t op2) @@ -92,12 +92,12 @@ // CHECK-LABEL: @test_svxar_n_s32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svxar_n_s32_1u11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svxar_n_s32_1(svint32_t op1, svint32_t op2) @@ -107,12 +107,12 @@ // CHECK-LABEL: @test_svxar_n_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svxar_n_s64u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svxar_n_s64(svint64_t op1, svint64_t op2) @@ -122,12 +122,12 @@ // CHECK-LABEL: @test_svxar_n_s64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svxar_n_s64_1u11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svxar_n_s64_1(svint64_t op1, svint64_t op2) @@ -137,12 +137,12 @@ // CHECK-LABEL: @test_svxar_n_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svxar_n_u8u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svxar_n_u8(svuint8_t op1, svuint8_t op2) @@ -152,12 +152,12 @@ // CHECK-LABEL: @test_svxar_n_u8_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svxar_n_u8_1u11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svxar_n_u8_1(svuint8_t op1, svuint8_t op2) @@ -167,12 +167,12 @@ // CHECK-LABEL: @test_svxar_n_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svxar_n_u16u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svxar_n_u16(svuint16_t op1, svuint16_t op2) @@ -182,12 +182,12 @@ // CHECK-LABEL: @test_svxar_n_u16_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svxar_n_u16_1u12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svxar_n_u16_1(svuint16_t op1, svuint16_t op2) @@ -197,12 +197,12 @@ // CHECK-LABEL: @test_svxar_n_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svxar_n_u32u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svxar_n_u32(svuint32_t op1, svuint32_t op2) @@ -212,12 +212,12 @@ // CHECK-LABEL: @test_svxar_n_u32_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svxar_n_u32_1u12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svxar_n_u32_1(svuint32_t op1, svuint32_t op2) @@ -227,12 +227,12 @@ // CHECK-LABEL: @test_svxar_n_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z16test_svxar_n_u64u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svxar_n_u64(svuint64_t op1, svuint64_t op2) @@ -242,12 +242,12 @@ // CHECK-LABEL: @test_svxar_n_u64_1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z18test_svxar_n_u64_1u12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svxar_n_u64_1(svuint64_t op1, svuint64_t op2) diff --git a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c --- a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c +++ b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c @@ -16,14 +16,14 @@ // CHECK-LABEL: @test_svdup_neonq_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_neonq_s811__Int8x16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint8_t test_svdup_neonq_s8(int8x16_t n) { @@ -32,14 +32,14 @@ // CHECK-LABEL: @test_svdup_neonq_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_s1611__Int16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svdup_neonq_s16(int16x8_t n) { @@ -48,14 +48,14 @@ // CHECK-LABEL: @test_svdup_neonq_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_s3211__Int32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svdup_neonq_s32(int32x4_t n) { @@ -64,14 +64,14 @@ // CHECK-LABEL: @test_svdup_neonq_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_s6411__Int64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svdup_neonq_s64(int64x2_t n) { @@ -80,14 +80,14 @@ // CHECK-LABEL: @test_svdup_neonq_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdup_neonq_u812__Uint8x16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint8_t test_svdup_neonq_u8(uint8x16_t n) { @@ -96,14 +96,14 @@ // CHECK-LABEL: @test_svdup_neonq_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_u1612__Uint16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svdup_neonq_u16(uint16x8_t n) { @@ -112,14 +112,14 @@ // CHECK-LABEL: @test_svdup_neonq_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_u3212__Uint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svdup_neonq_u32(uint32x4_t n) { @@ -128,14 +128,14 @@ // CHECK-LABEL: @test_svdup_neonq_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_u6412__Uint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svdup_neonq_u64(uint64x2_t n) { @@ -144,14 +144,14 @@ // CHECK-LABEL: @test_svdup_neonq_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_f1613__Float16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdup_neonq_f16(float16x8_t n) { @@ -163,14 +163,14 @@ // CHECK-NEXT ret %1 // CHECK-LABEL: @test_svdup_neonq_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_f3213__Float32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdup_neonq_f32(float32x4_t n) { @@ -179,14 +179,14 @@ // CHECK-LABEL: @test_svdup_neonq_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svdup_neonq_f6413__Float64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdup_neonq_f64(float64x2_t n) { @@ -195,14 +195,14 @@ // CHECK-LABEL: @test_svdup_neonq_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[N:%.*]], i64 0) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP0]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP0]], i64 0) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z21test_svdup_neonq_bf1614__Bfloat16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[N:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP0]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP0]], i64 0) // CPP-CHECK-NEXT: ret [[TMP1]] // svbfloat16_t test_svdup_neonq_bf16(bfloat16x8_t n) { diff --git a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_get_neonq.c b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_get_neonq.c --- a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_get_neonq.c +++ b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_get_neonq.c @@ -16,26 +16,27 @@ // CHECK-LABEL: @test_svget_neonq_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) // CHECK-NEXT: ret <16 x i8> [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svget_neonq_s8u10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]] // int8x16_t test_svget_neonq_s8(svint8_t n) { return SVE_ACLE_FUNC(svget_neonq, _s8, , )(n); } +// // CHECK-LABEL: @test_svget_neonq_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) // CHECK-NEXT: ret <8 x i16> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_s16u11__SVInt16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <8 x i16> [[TMP0]] // int16x8_t test_svget_neonq_s16(svint16_t n) { @@ -44,12 +45,12 @@ // CHECK-LABEL: @test_svget_neonq_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) // CHECK-NEXT: ret <4 x i32> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_s32u11__SVInt32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <4 x i32> [[TMP0]] // int32x4_t test_svget_neonq_s32(svint32_t n) { @@ -58,12 +59,12 @@ // CHECK-LABEL: @test_svget_neonq_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) // CHECK-NEXT: ret <2 x i64> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_s64u11__SVInt64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <2 x i64> [[TMP0]] // int64x2_t test_svget_neonq_s64(svint64_t n) { @@ -72,12 +73,12 @@ // CHECK-LABEL: @test_svget_neonq_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) // CHECK-NEXT: ret <16 x i8> [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svget_neonq_u8u11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.vector.extract.v16i8.nxv16i8( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <16 x i8> [[TMP0]] // uint8x16_t test_svget_neonq_u8(svuint8_t n) { @@ -86,12 +87,12 @@ // CHECK-LABEL: @test_svget_neonq_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) // CHECK-NEXT: ret <8 x i16> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_u16u12__SVUint16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.vector.extract.v8i16.nxv8i16( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <8 x i16> [[TMP0]] // uint16x8_t test_svget_neonq_u16(svuint16_t n) { @@ -100,12 +101,12 @@ // CHECK-LABEL: @test_svget_neonq_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) // CHECK-NEXT: ret <4 x i32> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_u32u12__SVUint32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.vector.extract.v4i32.nxv4i32( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <4 x i32> [[TMP0]] // uint32x4_t test_svget_neonq_u32(svuint32_t n) { @@ -114,12 +115,12 @@ // CHECK-LABEL: @test_svget_neonq_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) // CHECK-NEXT: ret <2 x i64> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_u64u12__SVUint64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <2 x i64> [[TMP0]] // uint64x2_t test_svget_neonq_u64(svuint64_t n) { @@ -128,12 +129,12 @@ // CHECK-LABEL: @test_svget_neonq_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x half> @llvm.vector.extract.v8f16.nxv8f16( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.vector.extract.v8f16.nxv8f16( [[N:%.*]], i64 0) // CHECK-NEXT: ret <8 x half> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_f16u13__SVFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x half> @llvm.vector.extract.v8f16.nxv8f16( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.vector.extract.v8f16.nxv8f16( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <8 x half> [[TMP0]] // float16x8_t test_svget_neonq_f16(svfloat16_t n) { @@ -142,27 +143,26 @@ // CHECK-LABEL: @test_svget_neonq_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x float> @llvm.vector.extract.v4f32.nxv4f32( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.vector.extract.v4f32.nxv4f32( [[N:%.*]], i64 0) // CHECK-NEXT: ret <4 x float> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_f32u13__SVFloat32_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x float> @llvm.vector.extract.v4f32.nxv4f32( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.vector.extract.v4f32.nxv4f32( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <4 x float> [[TMP0]] // float32x4_t test_svget_neonq_f32(svfloat32_t n) { return SVE_ACLE_FUNC(svget_neonq, _f32, , )(n); } -// // CHECK-LABEL: @test_svget_neonq_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x double> @llvm.vector.extract.v2f64.nxv2f64( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <2 x double> @llvm.vector.extract.v2f64.nxv2f64( [[N:%.*]], i64 0) // CHECK-NEXT: ret <2 x double> [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svget_neonq_f64u13__SVFloat64_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <2 x double> @llvm.vector.extract.v2f64.nxv2f64( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <2 x double> @llvm.vector.extract.v2f64.nxv2f64( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <2 x double> [[TMP0]] // float64x2_t test_svget_neonq_f64(svfloat64_t n) { @@ -171,12 +171,12 @@ // CHECK-LABEL: @test_svget_neonq_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[N:%.*]], i64 0) // CHECK-NEXT: ret <8 x bfloat> [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svget_neonq_bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret <8 x bfloat> [[TMP0]] // bfloat16x8_t test_svget_neonq_bf16(svbfloat16_t n) { diff --git a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_set_neonq.c b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_set_neonq.c --- a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_set_neonq.c +++ b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_set_neonq.c @@ -16,12 +16,12 @@ // CHECK-LABEL: @test_svset_neonq_s8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svset_neonq_s8u10__SVInt8_t11__Int8x16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svset_neonq_s8(svint8_t s, int8x16_t n) { @@ -30,12 +30,12 @@ // CHECK-LABEL: @test_svset_neonq_s16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_s16u11__SVInt16_t11__Int16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint16_t test_svset_neonq_s16(svint16_t s, int16x8_t n) { @@ -44,12 +44,12 @@ // CHECK-LABEL: @test_svset_neonq_s32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_s32u11__SVInt32_t11__Int32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint32_t test_svset_neonq_s32(svint32_t s, int32x4_t n) { @@ -58,12 +58,12 @@ // CHECK-LABEL: @test_svset_neonq_s64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_s64u11__SVInt64_t11__Int64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svint64_t test_svset_neonq_s64(svint64_t s, int64x2_t n) { @@ -72,12 +72,12 @@ // CHECK-LABEL: @test_svset_neonq_u8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z19test_svset_neonq_u8u11__SVUint8_t12__Uint8x16_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv16i8.v16i8( [[S:%.*]], <16 x i8> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svset_neonq_u8(svuint8_t s, uint8x16_t n) { @@ -86,12 +86,12 @@ // CHECK-LABEL: @test_svset_neonq_u16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_u16u12__SVUint16_t12__Uint16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8i16.v8i16( [[S:%.*]], <8 x i16> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint16_t test_svset_neonq_u16(svuint16_t s, uint16x8_t n) { @@ -100,12 +100,12 @@ // CHECK-LABEL: @test_svset_neonq_u32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_u32u12__SVUint32_t12__Uint32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4i32.v4i32( [[S:%.*]], <4 x i32> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint32_t test_svset_neonq_u32(svuint32_t s, uint32x4_t n) { @@ -114,12 +114,12 @@ // CHECK-LABEL: @test_svset_neonq_u64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_u64u12__SVUint64_t12__Uint64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( [[S:%.*]], <2 x i64> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint64_t test_svset_neonq_u64(svuint64_t s, uint64x2_t n) { @@ -128,12 +128,12 @@ // CHECK-LABEL: @test_svset_neonq_f16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8f16.v8f16( [[S:%.*]], <8 x half> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8f16.v8f16( [[S:%.*]], <8 x half> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_f16u13__SVFloat16_t13__Float16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8f16.v8f16( [[S:%.*]], <8 x half> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8f16.v8f16( [[S:%.*]], <8 x half> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat16_t test_svset_neonq_f16(svfloat16_t s, float16x8_t n) { @@ -142,12 +142,12 @@ // CHECK-LABEL: @test_svset_neonq_f32( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4f32.v4f32( [[S:%.*]], <4 x float> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4f32.v4f32( [[S:%.*]], <4 x float> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_f32u13__SVFloat32_t13__Float32x4_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv4f32.v4f32( [[S:%.*]], <4 x float> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv4f32.v4f32( [[S:%.*]], <4 x float> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat32_t test_svset_neonq_f32(svfloat32_t s, float32x4_t n) { @@ -156,12 +156,12 @@ // CHECK-LABEL: @test_svset_neonq_f64( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2f64.v2f64( [[S:%.*]], <2 x double> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2f64.v2f64( [[S:%.*]], <2 x double> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z20test_svset_neonq_f64u13__SVFloat64_t13__Float64x2_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv2f64.v2f64( [[S:%.*]], <2 x double> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv2f64.v2f64( [[S:%.*]], <2 x double> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svfloat64_t test_svset_neonq_f64(svfloat64_t s, float64x2_t n) { @@ -170,12 +170,12 @@ // CHECK-LABEL: @test_svset_neonq_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( [[S:%.*]], <8 x bfloat> [[N:%.*]], i64 0) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( [[S:%.*]], <8 x bfloat> [[N:%.*]], i64 0) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z21test_svset_neonq_bf16u14__SVBFloat16_t14__Bfloat16x8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( [[S:%.*]], <8 x bfloat> [[N:%.*]], i64 0) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( [[S:%.*]], <8 x bfloat> [[N:%.*]], i64 0) // CPP-CHECK-NEXT: ret [[TMP0]] // svbfloat16_t test_svset_neonq_bf16(svbfloat16_t s, bfloat16x8_t n) { diff --git a/clang/test/CodeGen/atomic-ops-libcall.c b/clang/test/CodeGen/atomic-ops-libcall.c --- a/clang/test/CodeGen/atomic-ops-libcall.c +++ b/clang/test/CodeGen/atomic-ops-libcall.c @@ -10,109 +10,109 @@ int *test_c11_atomic_fetch_add_int_ptr(_Atomic(int *) *p) { // CHECK: test_c11_atomic_fetch_add_int_ptr - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 12, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 12, i32 noundef 5) return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst); } int *test_c11_atomic_fetch_sub_int_ptr(_Atomic(int *) *p) { // CHECK: test_c11_atomic_fetch_sub_int_ptr - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 20, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 20, i32 noundef 5) return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst); } int test_c11_atomic_fetch_add_int(_Atomic(int) *p) { // CHECK: test_c11_atomic_fetch_add_int - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 3, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 3, i32 noundef 5) return __c11_atomic_fetch_add(p, 3, memory_order_seq_cst); } int test_c11_atomic_fetch_sub_int(_Atomic(int) *p) { // CHECK: test_c11_atomic_fetch_sub_int - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 5, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 5, i32 noundef 5) return __c11_atomic_fetch_sub(p, 5, memory_order_seq_cst); } int *fp2a(int **p) { // CHECK: @fp2a - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 4, i32 noundef 0) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 4, i32 noundef 0) // Note, the GNU builtins do not multiply by sizeof(T)! return __atomic_fetch_sub(p, 4, memory_order_relaxed); } int test_atomic_fetch_add(int *p) { // CHECK: test_atomic_fetch_add - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) return __atomic_fetch_add(p, 55, memory_order_seq_cst); } int test_atomic_fetch_sub(int *p) { // CHECK: test_atomic_fetch_sub - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) return __atomic_fetch_sub(p, 55, memory_order_seq_cst); } int test_atomic_fetch_and(int *p) { // CHECK: test_atomic_fetch_and - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_and_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_and_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) return __atomic_fetch_and(p, 55, memory_order_seq_cst); } int test_atomic_fetch_or(int *p) { // CHECK: test_atomic_fetch_or - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_or_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_or_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) return __atomic_fetch_or(p, 55, memory_order_seq_cst); } int test_atomic_fetch_xor(int *p) { // CHECK: test_atomic_fetch_xor - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_xor_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_xor_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) return __atomic_fetch_xor(p, 55, memory_order_seq_cst); } int test_atomic_fetch_nand(int *p) { // CHECK: test_atomic_fetch_nand - // CHECK: {{%[^ ]*}} = tail call i32 @__atomic_fetch_nand_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: {{%[^ ]*}} = call i32 @__atomic_fetch_nand_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) return __atomic_fetch_nand(p, 55, memory_order_seq_cst); } int test_atomic_add_fetch(int *p) { // CHECK: test_atomic_add_fetch - // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_add_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) // CHECK: {{%[^ ]*}} = add i32 [[CALL]], 55 return __atomic_add_fetch(p, 55, memory_order_seq_cst); } int test_atomic_sub_fetch(int *p) { // CHECK: test_atomic_sub_fetch - // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_sub_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) // CHECK: {{%[^ ]*}} = add i32 [[CALL]], -55 return __atomic_sub_fetch(p, 55, memory_order_seq_cst); } int test_atomic_and_fetch(int *p) { // CHECK: test_atomic_and_fetch - // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_and_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_and_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) // CHECK: {{%[^ ]*}} = and i32 [[CALL]], 55 return __atomic_and_fetch(p, 55, memory_order_seq_cst); } int test_atomic_or_fetch(int *p) { // CHECK: test_atomic_or_fetch - // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_or_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_or_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) // CHECK: {{%[^ ]*}} = or i32 [[CALL]], 55 return __atomic_or_fetch(p, 55, memory_order_seq_cst); } int test_atomic_xor_fetch(int *p) { // CHECK: test_atomic_xor_fetch - // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_xor_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_xor_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) // CHECK: {{%[^ ]*}} = xor i32 [[CALL]], 55 return __atomic_xor_fetch(p, 55, memory_order_seq_cst); } int test_atomic_nand_fetch(int *p) { // CHECK: test_atomic_nand_fetch - // CHECK: [[CALL:%[^ ]*]] = tail call i32 @__atomic_fetch_nand_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) + // CHECK: [[CALL:%[^ ]*]] = call i32 @__atomic_fetch_nand_4(i8* noundef {{%[0-9]+}}, i32 noundef 55, i32 noundef 5) // FIXME: We should not be checking optimized IR. It changes independently of clang. // FIXME-CHECK: [[AND:%[^ ]*]] = and i32 [[CALL]], 55 // FIXME-CHECK: {{%[^ ]*}} = xor i32 [[AND]], -1 diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c @@ -32,21 +32,21 @@ // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6:![0-9]+]] -// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP0]], i64 0) +// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-256-LABEL: @read_int64( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6:![0-9]+]] -// CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i64.v4i64( undef, <4 x i64> [[TMP0]], i64 0) +// CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2i64.v4i64( undef, <4 x i64> [[TMP0]], i64 0) // CHECK-256-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_int64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6:![0-9]+]] -// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i64.v8i64( undef, <8 x i64> [[TMP0]], i64 0) +// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2i64.v8i64( undef, <8 x i64> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // svint64_t read_int64(struct struct_int64 *s) { @@ -55,21 +55,21 @@ // CHECK-128-LABEL: @write_int64( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[X:%.*]], i64 0) +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[X:%.*]], i64 0) // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: store <2 x i64> [[CASTFIXEDSVE]], <2 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_int64( // CHECK-256-NEXT: entry: -// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <4 x i64> @llvm.vector.extract.v4i64.nxv2i64( [[X:%.*]], i64 0) +// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call <4 x i64> @llvm.vector.extract.v4i64.nxv2i64( [[X:%.*]], i64 0) // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: store <4 x i64> [[CASTFIXEDSVE]], <4 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_int64( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <8 x i64> @llvm.vector.extract.v8i64.nxv2i64( [[X:%.*]], i64 0) +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x i64> @llvm.vector.extract.v8i64.nxv2i64( [[X:%.*]], i64 0) // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: store <8 x i64> [[CASTFIXEDSVE]], <8 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void @@ -86,21 +86,21 @@ // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] -// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP0]], i64 0) +// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-256-LABEL: @read_float64( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x double>, <4 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] -// CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2f64.v4f64( undef, <4 x double> [[TMP0]], i64 0) +// CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2f64.v4f64( undef, <4 x double> [[TMP0]], i64 0) // CHECK-256-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_float64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x double>, <8 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] -// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2f64.v8f64( undef, <8 x double> [[TMP0]], i64 0) +// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2f64.v8f64( undef, <8 x double> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // svfloat64_t read_float64(struct struct_float64 *s) { @@ -109,21 +109,21 @@ // CHECK-128-LABEL: @write_float64( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <2 x double> @llvm.vector.extract.v2f64.nxv2f64( [[X:%.*]], i64 0) +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x double> @llvm.vector.extract.v2f64.nxv2f64( [[X:%.*]], i64 0) // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: store <2 x double> [[CASTFIXEDSVE]], <2 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_float64( // CHECK-256-NEXT: entry: -// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <4 x double> @llvm.vector.extract.v4f64.nxv2f64( [[X:%.*]], i64 0) +// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call <4 x double> @llvm.vector.extract.v4f64.nxv2f64( [[X:%.*]], i64 0) // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: store <4 x double> [[CASTFIXEDSVE]], <4 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_float64( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <8 x double> @llvm.vector.extract.v8f64.nxv2f64( [[X:%.*]], i64 0) +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x double> @llvm.vector.extract.v8f64.nxv2f64( [[X:%.*]], i64 0) // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: store <8 x double> [[CASTFIXEDSVE]], <8 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void @@ -140,21 +140,21 @@ // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, <8 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] -// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP0]], i64 0) +// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-256-LABEL: @read_bfloat16( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: [[TMP0:%.*]] = load <16 x bfloat>, <16 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] -// CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v16bf16( undef, <16 x bfloat> [[TMP0]], i64 0) +// CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv8bf16.v16bf16( undef, <16 x bfloat> [[TMP0]], i64 0) // CHECK-256-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_bfloat16( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: [[TMP0:%.*]] = load <32 x bfloat>, <32 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] -// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v32bf16( undef, <32 x bfloat> [[TMP0]], i64 0) +// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv8bf16.v32bf16( undef, <32 x bfloat> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // svbfloat16_t read_bfloat16(struct struct_bfloat16 *s) { @@ -163,21 +163,21 @@ // CHECK-128-LABEL: @write_bfloat16( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[X:%.*]], i64 0) +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[X:%.*]], i64 0) // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: store <8 x bfloat> [[CASTFIXEDSVE]], <8 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_bfloat16( // CHECK-256-NEXT: entry: -// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <16 x bfloat> @llvm.vector.extract.v16bf16.nxv8bf16( [[X:%.*]], i64 0) +// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x bfloat> @llvm.vector.extract.v16bf16.nxv8bf16( [[X:%.*]], i64 0) // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: store <16 x bfloat> [[CASTFIXEDSVE]], <16 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_bfloat16( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <32 x bfloat> @llvm.vector.extract.v32bf16.nxv8bf16( [[X:%.*]], i64 0) +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <32 x bfloat> @llvm.vector.extract.v32bf16.nxv8bf16( [[X:%.*]], i64 0) // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: store <32 x bfloat> [[CASTFIXEDSVE]], <32 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void @@ -194,24 +194,24 @@ // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i8>, <2 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] -// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i8.v2i8( undef, <2 x i8> [[TMP0]], i64 0) -// CHECK-128-NEXT: [[TMP1:%.*]] = bitcast [[CASTSCALABLESVE]] to +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call @llvm.vector.insert.nxv2i8.v2i8( undef, <2 x i8> [[TMP0]], i64 0) +// CHECK-128-NEXT: [[TMP1:%.*]] = bitcast [[CASTFIXEDSVE]] to // CHECK-128-NEXT: ret [[TMP1]] // // CHECK-256-LABEL: @read_bool( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x i8>, <4 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] -// CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i8.v4i8( undef, <4 x i8> [[TMP0]], i64 0) -// CHECK-256-NEXT: [[TMP1:%.*]] = bitcast [[CASTSCALABLESVE]] to +// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call @llvm.vector.insert.nxv2i8.v4i8( undef, <4 x i8> [[TMP0]], i64 0) +// CHECK-256-NEXT: [[TMP1:%.*]] = bitcast [[CASTFIXEDSVE]] to // CHECK-256-NEXT: ret [[TMP1]] // // CHECK-512-LABEL: @read_bool( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] -// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i8.v8i8( undef, <8 x i8> [[TMP0]], i64 0) -// CHECK-512-NEXT: [[TMP1:%.*]] = bitcast [[CASTSCALABLESVE]] to +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call @llvm.vector.insert.nxv2i8.v8i8( undef, <8 x i8> [[TMP0]], i64 0) +// CHECK-512-NEXT: [[TMP1:%.*]] = bitcast [[CASTFIXEDSVE]] to // CHECK-512-NEXT: ret [[TMP1]] // svbool_t read_bool(struct struct_bool *s) { @@ -220,24 +220,24 @@ // CHECK-128-LABEL: @write_bool( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[TMP0:%.*]] = bitcast [[X:%.*]] to -// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <2 x i8> @llvm.vector.extract.v2i8.nxv2i8( [[TMP0]], i64 0) +// CHECK-128-NEXT: [[TMP0:%.*]] = bitcast %x to +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x i8> @llvm.vector.extract.v2i8.nxv2i8( [[TMP0]], i64 0) // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-128-NEXT: store <2 x i8> [[CASTFIXEDSVE]], <2 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_bool( // CHECK-256-NEXT: entry: -// CHECK-256-NEXT: [[TMP0:%.*]] = bitcast [[X:%.*]] to -// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <4 x i8> @llvm.vector.extract.v4i8.nxv2i8( [[TMP0]], i64 0) +// CHECK-256-NEXT: [[TMP0:%.*]] = bitcast %x to +// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call <4 x i8> @llvm.vector.extract.v4i8.nxv2i8( [[TMP0]], i64 0) // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-256-NEXT: store <4 x i8> [[CASTFIXEDSVE]], <4 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_bool( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[TMP0:%.*]] = bitcast [[X:%.*]] to -// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <8 x i8> @llvm.vector.extract.v8i8.nxv2i8( [[TMP0]], i64 0) +// CHECK-512-NEXT: [[TMP0:%.*]] = bitcast %x to +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.nxv2i8( [[TMP0]], i64 0) // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 // CHECK-512-NEXT: store <8 x i8> [[CASTFIXEDSVE]], <8 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c @@ -45,7 +45,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = bitcast <16 x i32>* [[COERCE1]] to * // CHECK-NEXT: store [[X:%.*]], * [[TMP0]], align 16 // CHECK-NEXT: [[TMP1:%.*]] = load <16 x i32>, <16 x i32>* [[COERCE1]], align 16, !tbaa [[TBAA6:![0-9]+]] -// CHECK-NEXT: [[CASTSCALABLESVE2:%.*]] = tail call @llvm.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TMP1]], i64 0) +// CHECK-NEXT: [[CASTSCALABLESVE2:%.*]] = call @llvm.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TMP1]], i64 0) // CHECK-NEXT: ret [[CASTSCALABLESVE2]] // svint32_t sizeless_caller(svint32_t x) { @@ -58,7 +58,7 @@ // CHECK-LABEL: @call_int32_ff( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1_COERCE:%.*]], [[OP2_COERCE:%.*]] // CHECK-NEXT: ret [[TMP1]] // @@ -68,7 +68,7 @@ // CHECK-LABEL: @call_float64_ff( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1_COERCE:%.*]], [[OP2_COERCE:%.*]] // CHECK-NEXT: ret [[TMP1]] // @@ -91,7 +91,7 @@ // CHECK-LABEL: @call_int32_fs( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1_COERCE:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // @@ -101,7 +101,7 @@ // CHECK-LABEL: @call_float64_fs( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1_COERCE:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // @@ -124,7 +124,7 @@ // CHECK-LABEL: @call_int32_ss( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // @@ -134,7 +134,7 @@ // CHECK-LABEL: @call_float64_ss( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = select [[TMP0]], [[OP1:%.*]], [[OP2:%.*]] // CHECK-NEXT: ret [[TMP1]] // diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c @@ -46,7 +46,7 @@ // CHECK-LABEL: @to_svbool_t( // CHECK-NEXT: entry: -// CHECK-NEXT: ret [[TMP0:%.*]] +// CHECK-NEXT: ret [[TYPE:%.*]] // svbool_t to_svbool_t(fixed_bool_t type) { return type; @@ -62,12 +62,12 @@ // CHECK-LABEL: @lax_cast( // CHECK-NEXT: entry: -// CHECK-NEXT: [[SAVED_VALUE:%.*]] = alloca <16 x i32>, align 64 -// CHECK-NEXT: [[TYPE:%.*]] = tail call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( [[TYPE_COERCE:%.*]], i64 0) -// CHECK-NEXT: store <16 x i32> [[TYPE]], <16 x i32>* [[SAVED_VALUE]], align 64, !tbaa [[TBAA6:![0-9]+]] -// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <16 x i32>* [[SAVED_VALUE]] to * -// CHECK-NEXT: [[TMP0:%.*]] = load , * [[CASTFIXEDSVE]], align 64, !tbaa [[TBAA6]] -// CHECK-NEXT: ret [[TMP0]] +// CHECK-NEXT: [[TMP0:%.*]] = alloca <16 x i32>, align 64 +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( [[TYPE_COERCE:%.*]], i64 0) +// CHECK-NEXT: store <16 x i32> [[CASTFIXEDSVE]], <16 x i32>* [[TMP0:%.*]], align 64, !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i32>* [[TMP0]] to * +// CHECK-NEXT: [[TMP2:%.*]] = load , * [[TMP1]], align 64, !tbaa [[TBAA6]] +// CHECK-NEXT: ret [[TMP2]] // svint64_t lax_cast(fixed_int32_t type) { return type; @@ -75,8 +75,8 @@ // CHECK-LABEL: @to_svint32_t__from_gnu_int32_t( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TYPE:%.*]] = load <16 x i32>, <16 x i32>* [[TMP0:%.*]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TYPE]], i64 0) +// CHECK-NEXT: [[TYPE:%.*]] = load <16 x i32>, <16 x i32>* [[TMP0:%.*]], align 16, !tbaa [[TBAA6:![0-9]+]] +// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TYPE]], i64 0) // CHECK-NEXT: ret [[CASTSCALABLESVE]] // svint32_t to_svint32_t__from_gnu_int32_t(gnu_int32_t type) { @@ -85,7 +85,7 @@ // CHECK-LABEL: @from_svint32_t__to_gnu_int32_t( // CHECK-NEXT: entry: -// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( [[TYPE:%.*]], i64 0) +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( [[TYPE:%.*]], i64 0) // CHECK-NEXT: store <16 x i32> [[CASTFIXEDSVE]], <16 x i32>* [[AGG_RESULT:%.*]], align 16, !tbaa [[TBAA6]] // CHECK-NEXT: ret void // @@ -96,7 +96,7 @@ // CHECK-LABEL: @to_fixed_int32_t__from_gnu_int32_t( // CHECK-NEXT: entry: // CHECK-NEXT: [[TYPE:%.*]] = load <16 x i32>, <16 x i32>* [[TMP0:%.*]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TYPE]], i64 0) +// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TYPE]], i64 0) // CHECK-NEXT: ret [[CASTSCALABLESVE]] // fixed_int32_t to_fixed_int32_t__from_gnu_int32_t(gnu_int32_t type) { @@ -105,7 +105,7 @@ // CHECK-LABEL: @from_fixed_int32_t__to_gnu_int32_t( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TYPE:%.*]] = tail call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( [[TYPE_COERCE:%.*]], i64 0) +// CHECK-NEXT: [[TYPE:%.*]] = call <16 x i32> @llvm.vector.extract.v16i32.nxv4i32( [[TYPE_COERCE:%.*]], i64 0) // CHECK-NEXT: store <16 x i32> [[TYPE]], <16 x i32>* [[AGG_RESULT:%.*]], align 16, !tbaa [[TBAA6]] // CHECK-NEXT: ret void // diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c @@ -22,13 +22,13 @@ // CHECK-128-LABEL: @write_global_i64( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[V:%.*]], i64 0) +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x i64> @llvm.vector.extract.v2i64.nxv2i64( [[V:%.*]], i64 0) // CHECK-128-NEXT: store <2 x i64> [[CASTFIXEDSVE]], <2 x i64>* @global_i64, align 16, !tbaa [[TBAA6:![0-9]+]] // CHECK-128-NEXT: ret void // // CHECK-512-LABEL: @write_global_i64( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <8 x i64> @llvm.vector.extract.v8i64.nxv2i64( [[V:%.*]], i64 0) +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x i64> @llvm.vector.extract.v8i64.nxv2i64( [[V:%.*]], i64 0) // CHECK-512-NEXT: store <8 x i64> [[CASTFIXEDSVE]], <8 x i64>* @global_i64, align 16, !tbaa [[TBAA6:![0-9]+]] // CHECK-512-NEXT: ret void // @@ -36,13 +36,13 @@ // CHECK-128-LABEL: @write_global_bf16( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[V:%.*]], i64 0) +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x bfloat> @llvm.vector.extract.v8bf16.nxv8bf16( [[V:%.*]], i64 0) // CHECK-128-NEXT: store <8 x bfloat> [[CASTFIXEDSVE]], <8 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-512-LABEL: @write_global_bf16( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <32 x bfloat> @llvm.vector.extract.v32bf16.nxv8bf16( [[V:%.*]], i64 0) +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <32 x bfloat> @llvm.vector.extract.v32bf16.nxv8bf16( [[V:%.*]], i64 0) // CHECK-512-NEXT: store <32 x bfloat> [[CASTFIXEDSVE]], <32 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // @@ -51,14 +51,14 @@ // CHECK-128-LABEL: @write_global_bool( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[TMP0:%.*]] = bitcast [[V:%.*]] to -// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <2 x i8> @llvm.vector.extract.v2i8.nxv2i8( [[TMP0]], i64 0) -// CHECK-128-NEXT: store <2 x i8> [[CASTFIXEDSVE]], <2 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x i8> @llvm.vector.extract.v2i8.nxv2i8( [[TMP0]], i64 0) +// CHECK-128-NEXT: store <2 x i8> [[CASTFIXEDSVE]], <2 x i8>* @global_bool, align 2, !tbaa [[TBAA6:![0-9]+]] // CHECK-128-NEXT: ret void // // CHECK-512-LABEL: @write_global_bool( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[TMP0:%.*]] = bitcast [[V:%.*]] to -// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <8 x i8> @llvm.vector.extract.v8i8.nxv2i8( [[TMP0]], i64 0) +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x i8> @llvm.vector.extract.v8i8.nxv2i8( [[TMP0]], i64 0) // CHECK-512-NEXT: store <8 x i8> [[CASTFIXEDSVE]], <8 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // @@ -71,13 +71,13 @@ // CHECK-128-LABEL: @read_global_i64( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* @global_i64, align 16, !tbaa [[TBAA6]] -// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP0]], i64 0) +// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_global_i64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* @global_i64, align 16, !tbaa [[TBAA6]] -// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i64.v8i64( undef, <8 x i64> [[TMP0]], i64 0) +// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv2i64.v8i64( undef, <8 x i64> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // svint64_t read_global_i64() { return global_i64; } @@ -85,13 +85,13 @@ // CHECK-128-LABEL: @read_global_bf16( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, <8 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] -// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP0]], i64 0) +// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_global_bf16( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[TMP0:%.*]] = load <32 x bfloat>, <32 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] -// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv8bf16.v32bf16( undef, <32 x bfloat> [[TMP0]], i64 0) +// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.vector.insert.nxv8bf16.v32bf16( undef, <32 x bfloat> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // svbfloat16_t read_global_bf16() { return global_bf16; } @@ -99,15 +99,15 @@ // CHECK-128-LABEL: @read_global_bool( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i8>, <2 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] -// CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i8.v2i8( undef, <2 x i8> [[TMP0]], i64 0) -// CHECK-128-NEXT: [[TMP1:%.*]] = bitcast [[CASTSCALABLESVE]] to +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call @llvm.vector.insert.nxv2i8.v2i8( undef, <2 x i8> [[TMP0]], i64 0) +// CHECK-128-NEXT: [[TMP1:%.*]] = bitcast [[CASTFIXEDSVE]] to // CHECK-128-NEXT: ret [[TMP1]] // // CHECK-512-LABEL: @read_global_bool( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] -// CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call @llvm.vector.insert.nxv2i8.v8i8( undef, <8 x i8> [[TMP0]], i64 0) -// CHECK-512-NEXT: [[TMP1:%.*]] = bitcast [[CASTSCALABLESVE]] to +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call @llvm.vector.insert.nxv2i8.v8i8( undef, <8 x i8> [[TMP0]], i64 0) +// CHECK-512-NEXT: [[TMP1:%.*]] = bitcast [[CASTFIXEDSVE]] to // CHECK-512-NEXT: ret [[TMP1]] // svbool_t read_global_bool() { return global_bool; } diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp @@ -60,7 +60,7 @@ // CHECK-NEXT: [[a:%[0-9]+]] = bitcast i8* [[add_ptr]] to %class.A* // CHECK-NEXT: [[a_i8_ptr:%[0-9]+]] = bitcast i8* [[add_ptr]] to i8** // CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[a_i8_ptr]], align 8 -// CHECK-NEXT: [[ptr:%[0-9]+]] = tail call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 0) +// CHECK-NEXT: [[ptr:%[0-9]+]] = call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 0) // CHECK-NEXT: [[method:%[0-9]+]] = bitcast i8* [[ptr]] to void (%class.A*)* // CHECK-NEXT: call void [[method]](%class.A* {{[^,]*}} [[a]]) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp b/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp --- a/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp +++ b/clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp @@ -19,13 +19,13 @@ // CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[c]], align 8 // Offset 0 to get first method -// CHECK-NEXT: [[ptr1:%[0-9]+]] = tail call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 0) +// CHECK-NEXT: [[ptr1:%[0-9]+]] = call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 0) // CHECK-NEXT: [[method1:%[0-9]+]] = bitcast i8* [[ptr1]] to void (%class.C*)* // CHECK-NEXT: call void [[method1]](%class.C* {{[^,]*}} %c) // CHECK-NEXT: [[vtable:%[a-z0-9]+]] = load i8*, i8** [[c]], align 8 // Offset by 4 to get the next bar() -// CHECK-NEXT: [[ptr2:%[0-9]+]] = tail call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 4) +// CHECK-NEXT: [[ptr2:%[0-9]+]] = call i8* @llvm.load.relative.i32(i8* [[vtable]], i32 4) // CHECK-NEXT: [[method2:%[0-9]+]] = bitcast i8* [[ptr2]] to void (%class.C*)* // CHECK-NEXT: call void [[method2]](%class.C* {{[^,]*}} %c) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp b/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp @@ -13,7 +13,7 @@ T* test1(V* x) { return &dynamic_cast(*x); } // CHECK-LABEL: define dso_local noundef %struct.T* @"?test1@@YAPAUT@@PAUV@@@Z"(%struct.V* noundef %x) // CHECK: [[CAST:%.*]] = bitcast %struct.V* %x to i8* -// CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* [[CAST]], i32 0, i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUV@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 1) +// CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* [[CAST]], i32 0, i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUV@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 1) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: ret %struct.T* [[RET]] @@ -25,7 +25,7 @@ // CHECK-NEXT: [[VBOFFP:%.*]] = getelementptr inbounds i32, i32* [[VBTBL]], i32 1 // CHECK-NEXT: [[VBOFFS:%.*]] = load i32, i32* [[VBOFFP]], align 4 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[CAST]], i32 [[VBOFFS]] -// CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* [[ADJ]], i32 [[VBOFFS]], i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUA@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 1) +// CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* [[ADJ]], i32 [[VBOFFS]], i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUA@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 1) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: ret %struct.T* [[RET]] @@ -39,14 +39,14 @@ // CHECK-NEXT: [[VBOFFS:%.*]] = load i32, i32* [[VBOFFP]], align 4 // CHECK-NEXT: [[DELTA:%.*]] = add nsw i32 [[VBOFFS]], 4 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[VOIDP]], i32 [[DELTA]] -// CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* [[ADJ]], i32 [[DELTA]], i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUB@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 1) +// CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* [[ADJ]], i32 [[DELTA]], i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUB@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 1) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: ret %struct.T* [[RET]] T* test4(V* x) { return dynamic_cast(x); } // CHECK-LABEL: define dso_local noundef %struct.T* @"?test4@@YAPAUT@@PAUV@@@Z"(%struct.V* noundef %x) // CHECK: [[CAST:%.*]] = bitcast %struct.V* %x to i8* -// CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* [[CAST]], i32 0, i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUV@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 0) +// CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* [[CAST]], i32 0, i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUV@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 0) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: ret %struct.T* [[RET]] @@ -60,7 +60,7 @@ // CHECK-NEXT: [[VBOFFP:%.*]] = getelementptr inbounds i32, i32* [[VBTBL]], i32 1 // CHECK-NEXT: [[VBOFFS:%.*]] = load i32, i32* [[VBOFFP]], align 4 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[VOIDP]], i32 [[VBOFFS]] -// CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* nonnull [[ADJ]], i32 [[VBOFFS]], i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUA@@@8" to i8*), i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 0) +// CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* nonnull [[ADJ]], i32 [[VBOFFS]], i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUA@@@8" to i8*), i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 0) // CHECK-NEXT: [[RES:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: br label // CHECK: [[RET:%.*]] = phi %struct.T* @@ -78,7 +78,7 @@ // CHECK-NEXT: [[VBOFFS:%.*]] = load i32, i32* [[VBOFFP]], align 4 // CHECK-NEXT: [[DELTA:%.*]] = add nsw i32 [[VBOFFS]], 4 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[CAST]], i32 [[DELTA]] -// CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* [[ADJ]], i32 [[DELTA]], i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUB@@@8" to i8*), i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 0) +// CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTDynamicCast(i8* [[ADJ]], i32 [[DELTA]], i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUB@@@8" to i8*), i8* {{.*}}bitcast (%rtti.TypeDescriptor7* @"??_R0?AUT@@@8" to i8*), i32 0) // CHECK-NEXT: [[RES:%.*]] = bitcast i8* [[CALL]] to %struct.T* // CHECK-NEXT: br label // CHECK: [[RET:%.*]] = phi %struct.T* @@ -87,7 +87,7 @@ void* test7(V* x) { return dynamic_cast(x); } // CHECK-LABEL: define dso_local noundef i8* @"?test7@@YAPAXPAUV@@@Z"(%struct.V* noundef %x) // CHECK: [[CAST:%.*]] = bitcast %struct.V* %x to i8* -// CHECK-NEXT: [[RET:%.*]] = tail call i8* @__RTCastToVoid(i8* [[CAST]]) +// CHECK-NEXT: [[RET:%.*]] = call i8* @__RTCastToVoid(i8* [[CAST]]) // CHECK-NEXT: ret i8* [[RET]] void* test8(A* x) { return dynamic_cast(x); } @@ -100,7 +100,7 @@ // CHECK-NEXT: [[VBOFFP:%.*]] = getelementptr inbounds i32, i32* [[VBTBL]], i32 1 // CHECK-NEXT: [[VBOFFS:%.*]] = load i32, i32* [[VBOFFP]], align 4 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[VOIDP]], i32 [[VBOFFS]] -// CHECK-NEXT: [[RES:%.*]] = tail call i8* @__RTCastToVoid(i8* nonnull [[ADJ]]) +// CHECK-NEXT: [[RES:%.*]] = call i8* @__RTCastToVoid(i8* nonnull [[ADJ]]) // CHECK-NEXT: br label // CHECK: [[RET:%.*]] = phi i8* // CHECK-NEXT: ret i8* [[RET]] @@ -117,7 +117,7 @@ // CHECK-NEXT: [[VBOFFS:%.*]] = load i32, i32* [[VBOFFP]], align 4 // CHECK-NEXT: [[DELTA:%.*]] = add nsw i32 [[VBOFFS]], 4 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[CAST]], i32 [[DELTA]] -// CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTCastToVoid(i8* [[ADJ]]) +// CHECK-NEXT: [[CALL:%.*]] = call i8* @__RTCastToVoid(i8* [[ADJ]]) // CHECK-NEXT: br label // CHECK: [[RET:%.*]] = phi i8* // CHECK-NEXT: ret i8* [[RET]] diff --git a/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp b/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp --- a/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-typeid.cpp @@ -25,7 +25,7 @@ const std::type_info* test3_typeid() { return &typeid(*fn()); } // CHECK-LABEL: define dso_local noundef %struct.type_info* @"?test3_typeid@@YAPBUtype_info@@XZ"() -// CHECK: [[CALL:%.*]] = tail call noundef %struct.A* @"?fn@@YAPAUA@@XZ"() +// CHECK: [[CALL:%.*]] = call noundef %struct.A* @"?fn@@YAPAUA@@XZ"() // CHECK-NEXT: [[CMP:%.*]] = icmp eq %struct.A* [[CALL]], null // CHECK-NEXT: br i1 [[CMP]] // CHECK: call i8* @__RTtypeid(i8* null) @@ -36,7 +36,7 @@ // CHECK-NEXT: [[VBSLOT:%.*]] = getelementptr inbounds i32, i32* [[VBTBL]], i32 1 // CHECK-NEXT: [[VBASE_OFFS:%.*]] = load i32, i32* [[VBSLOT]], align 4 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[THIS]], i32 [[VBASE_OFFS]] -// CHECK-NEXT: [[RT:%.*]] = tail call i8* @__RTtypeid(i8* nonnull [[ADJ]]) +// CHECK-NEXT: [[RT:%.*]] = call i8* @__RTtypeid(i8* nonnull [[ADJ]]) // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[RT]] to %struct.type_info* // CHECK-NEXT: ret %struct.type_info* [[RET]] diff --git a/clang/test/CodeGenCXX/wasm-args-returns.cpp b/clang/test/CodeGenCXX/wasm-args-returns.cpp --- a/clang/test/CodeGenCXX/wasm-args-returns.cpp +++ b/clang/test/CodeGenCXX/wasm-args-returns.cpp @@ -19,7 +19,7 @@ // CHECK: define double @_Z7forward9one_field(double returned %{{.*}}) // // CHECK: define void @_Z14test_one_fieldv() -// CHECK: %[[call:.*]] = tail call double @_Z13def_one_fieldv() +// CHECK: %[[call:.*]] = call double @_Z13def_one_fieldv() // CHECK: call void @_Z3use9one_field(double %[[call]]) // CHECK: ret void // @@ -96,7 +96,7 @@ // CHECK: define i32 @_Z7forward12one_bitfield(i32 returned %{{.*}}) // // CHECK: define void @_Z17test_one_bitfieldv() -// CHECK: %[[call:.*]] = tail call i32 @_Z16def_one_bitfieldv() +// CHECK: %[[call:.*]] = call i32 @_Z16def_one_bitfieldv() // CHECK: call void @_Z3use12one_bitfield(i32 %[[call]]) // CHECK: ret void // diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp b/llvm/lib/Passes/PassBuilderPipelines.cpp --- a/llvm/lib/Passes/PassBuilderPipelines.cpp +++ b/llvm/lib/Passes/PassBuilderPipelines.cpp @@ -242,7 +242,6 @@ Phase == ThinOrFullLTOPhase::FullLTOPreLink; } -// TODO: Investigate the cost/benefit of tail call elimination on debugging. FunctionPassManager PassBuilder::buildO1FunctionSimplificationPipeline(OptimizationLevel Level, ThinOrFullLTOPhase Phase) { @@ -1250,7 +1249,9 @@ OptimizePM.addPass(DivRemPairsPass()); // Try to annotate calls that were created during optimization. - OptimizePM.addPass(TailCallElimPass()); + // Don't run on -O1 as this can hurt debuggability. + if (Level.getSpeedupLevel() > 1) + OptimizePM.addPass(TailCallElimPass()); // LoopSink (and other loop passes since the last simplifyCFG) might have // resulted in single-entry-single-exit or empty blocks. Clean up the CFG. diff --git a/llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll b/llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll --- a/llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll +++ b/llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll @@ -276,7 +276,7 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_pow_half ; GCN-POSTLINK: call fast float @_Z3powff(float %tmp, float 5.000000e-01) -; GCN-PRELINK: %__pow2sqrt = tail call fast float @_Z4sqrtf(float %tmp) +; GCN-PRELINK: %__pow2sqrt = call fast float @_Z4sqrtf(float %tmp) define amdgpu_kernel void @test_pow_half(float addrspace(1)* nocapture %a) { entry: %arrayidx = getelementptr inbounds float, float addrspace(1)* %a, i64 1 @@ -288,7 +288,7 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_pow_mhalf ; GCN-POSTLINK: call fast float @_Z3powff(float %tmp, float -5.000000e-01) -; GCN-PRELINK: %__pow2rsqrt = tail call fast float @_Z5rsqrtf(float %tmp) +; GCN-PRELINK: %__pow2rsqrt = call fast float @_Z5rsqrtf(float %tmp) define amdgpu_kernel void @test_pow_mhalf(float addrspace(1)* nocapture %a) { entry: %arrayidx = getelementptr inbounds float, float addrspace(1)* %a, i64 1 @@ -349,10 +349,10 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_pow ; GCN-POSTLINK: call fast float @_Z3powff(float %tmp, float 1.013000e+03) -; GCN-PRELINK: %__fabs = tail call fast float @_Z4fabsf(float %tmp) -; GCN-PRELINK: %__log2 = tail call fast float @_Z4log2f(float %__fabs) +; GCN-PRELINK: %__fabs = call fast float @_Z4fabsf(float %tmp) +; GCN-PRELINK: %__log2 = call fast float @_Z4log2f(float %__fabs) ; GCN-PRELINK: %__ylogx = fmul fast float %__log2, 1.013000e+03 -; GCN-PRELINK: %__exp2 = tail call fast float @_Z4exp2f(float %__ylogx) +; GCN-PRELINK: %__exp2 = call fast float @_Z4exp2f(float %__ylogx) ; GCN-PRELINK: %[[r0:.*]] = bitcast float %tmp to i32 ; GCN-PRELINK: %__pow_sign = and i32 %[[r0]], -2147483648 ; GCN-PRELINK: %[[r1:.*]] = bitcast float %__exp2 to i32 @@ -369,13 +369,13 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_powr ; GCN-POSTLINK: call fast float @_Z4powrff(float %tmp, float %tmp1) -; GCN-PRELINK: %__log2 = tail call fast float @_Z4log2f(float %tmp) +; GCN-PRELINK: %__log2 = call fast float @_Z4log2f(float %tmp) ; GCN-PRELINK: %__ylogx = fmul fast float %__log2, %tmp1 -; GCN-PRELINK: %__exp2 = tail call fast float @_Z4exp2f(float %__ylogx) +; GCN-PRELINK: %__exp2 = call fast float @_Z4exp2f(float %__ylogx) ; GCN-PRELINK: store float %__exp2, float addrspace(1)* %a, align 4 -; GCN-NATIVE: %__log2 = tail call fast float @_Z11native_log2f(float %tmp) +; GCN-NATIVE: %__log2 = call fast float @_Z11native_log2f(float %tmp) ; GCN-NATIVE: %__ylogx = fmul fast float %__log2, %tmp1 -; GCN-NATIVE: %__exp2 = tail call fast float @_Z11native_exp2f(float %__ylogx) +; GCN-NATIVE: %__exp2 = call fast float @_Z11native_exp2f(float %__ylogx) ; GCN-NATIVE: store float %__exp2, float addrspace(1)* %a, align 4 define amdgpu_kernel void @test_powr(float addrspace(1)* nocapture %a) { entry: @@ -390,11 +390,11 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_pown ; GCN-POSTLINK: call fast float @_Z4pownfi(float %tmp, i32 %conv) ; GCN-PRELINK: %conv = fptosi float %tmp1 to i32 -; GCN-PRELINK: %__fabs = tail call fast float @_Z4fabsf(float %tmp) -; GCN-PRELINK: %__log2 = tail call fast float @_Z4log2f(float %__fabs) +; GCN-PRELINK: %__fabs = call fast float @_Z4fabsf(float %tmp) +; GCN-PRELINK: %__log2 = call fast float @_Z4log2f(float %__fabs) ; GCN-PRELINK: %pownI2F = sitofp i32 %conv to float ; GCN-PRELINK: %__ylogx = fmul fast float %__log2, %pownI2F -; GCN-PRELINK: %__exp2 = tail call fast float @_Z4exp2f(float %__ylogx) +; GCN-PRELINK: %__exp2 = call fast float @_Z4exp2f(float %__ylogx) ; GCN-PRELINK: %__yeven = shl i32 %conv, 31 ; GCN-PRELINK: %[[r0:.*]] = bitcast float %tmp to i32 ; GCN-PRELINK: %__pow_sign = and i32 %__yeven, %[[r0]] @@ -429,7 +429,7 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_rootn_2 ; GCN-POSTLINK: call fast float @_Z5rootnfi(float %tmp, i32 2) -; GCN-PRELINK: %__rootn2sqrt = tail call fast float @_Z4sqrtf(float %tmp) +; GCN-PRELINK: %__rootn2sqrt = call fast float @_Z4sqrtf(float %tmp) define amdgpu_kernel void @test_rootn_2(float addrspace(1)* nocapture %a) { entry: %tmp = load float, float addrspace(1)* %a, align 4 @@ -440,7 +440,7 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_rootn_3 ; GCN-POSTLINK: call fast float @_Z5rootnfi(float %tmp, i32 3) -; GCN-PRELINK: %__rootn2cbrt = tail call fast float @_Z4cbrtf(float %tmp) +; GCN-PRELINK: %__rootn2cbrt = call fast float @_Z4cbrtf(float %tmp) define amdgpu_kernel void @test_rootn_3(float addrspace(1)* nocapture %a) { entry: %tmp = load float, float addrspace(1)* %a, align 4 @@ -461,7 +461,7 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_rootn_m2 ; GCN-POSTLINK: call fast float @_Z5rootnfi(float %tmp, i32 -2) -; GCN-PRELINK: %__rootn2rsqrt = tail call fast float @_Z5rsqrtf(float %tmp) +; GCN-PRELINK: %__rootn2rsqrt = call fast float @_Z5rsqrtf(float %tmp) define amdgpu_kernel void @test_rootn_m2(float addrspace(1)* nocapture %a) { entry: %tmp = load float, float addrspace(1)* %a, align 4 @@ -620,9 +620,9 @@ ; GCN-LABEL: {{^}}define amdgpu_kernel void @test_use_native_powr ; GCN-NATIVE: %tmp1 = load float, float addrspace(1)* %arrayidx1, align 4 -; GCN-NATIVE: %__log2 = tail call fast float @_Z11native_log2f(float %tmp) +; GCN-NATIVE: %__log2 = call fast float @_Z11native_log2f(float %tmp) ; GCN-NATIVE: %__ylogx = fmul fast float %__log2, %tmp1 -; GCN-NATIVE: %__exp2 = tail call fast float @_Z11native_exp2f(float %__ylogx) +; GCN-NATIVE: %__exp2 = call fast float @_Z11native_exp2f(float %__ylogx) ; GCN-NATIVE: store float %__exp2, float addrspace(1)* %a, align 4 define amdgpu_kernel void @test_use_native_powr(float addrspace(1)* nocapture %a) { entry: diff --git a/llvm/test/Other/new-pm-defaults.ll b/llvm/test/Other/new-pm-defaults.ll --- a/llvm/test/Other/new-pm-defaults.ll +++ b/llvm/test/Other/new-pm-defaults.ll @@ -263,7 +263,7 @@ ; CHECK-O-NEXT: Running pass: LoopSinkPass ; CHECK-O-NEXT: Running pass: InstSimplifyPass ; CHECK-O-NEXT: Running pass: DivRemPairsPass -; CHECK-O-NEXT: Running pass: TailCallElimPass +; CHECK-O23SZ-NEXT: Running pass: TailCallElimPass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-EP-OPTIMIZER-LAST: Running pass: NoOpModulePass ; CHECK-HOT-COLD-SPLIT-NEXT: Running pass: HotColdSplittingPass diff --git a/llvm/test/Other/new-pm-thinlto-defaults.ll b/llvm/test/Other/new-pm-thinlto-defaults.ll --- a/llvm/test/Other/new-pm-thinlto-defaults.ll +++ b/llvm/test/Other/new-pm-thinlto-defaults.ll @@ -42,7 +42,7 @@ ; RUN: | FileCheck %s --check-prefixes=CHECK-O,CHECK-Os,CHECK-O23SZ,CHECK-POSTLINK-O,%llvmcheckext,CHECK-POSTLINK-Os ; RUN: opt -disable-verify -verify-cfg-preserved=0 -eagerly-invalidate-analyses=0 -debug-pass-manager \ ; RUN: -passes='thinlto' -S %s 2>&1 \ -; RUN: | FileCheck %s --check-prefixes=CHECK-O,CHECK-Oz,CHECK-O23SZ,CHECK-POSTLINK-O,%llvmcheckext +; RUN: | FileCheck %s --check-prefixes=CHECK-O,CHECK-Oz,CHECK-O23SZ,CHECK-POSTLINK-O,%llvmcheckext,CHECK-POSTLINK-Oz ; RUN: opt -disable-verify -verify-cfg-preserved=0 -eagerly-invalidate-analyses=0 -debug-pass-manager -new-pm-debug-info-for-profiling \ ; RUN: -passes='thinlto' -S %s 2>&1 \ ; RUN: | FileCheck %s --check-prefixes=CHECK-O,CHECK-O2,CHECK-O23SZ,CHECK-POSTLINK-O,%llvmcheckext,CHECK-POSTLINK-O2 @@ -227,7 +227,10 @@ ; CHECK-POSTLINK-O-NEXT: Running pass: LoopSinkPass ; CHECK-POSTLINK-O-NEXT: Running pass: InstSimplifyPass ; CHECK-POSTLINK-O-NEXT: Running pass: DivRemPairsPass -; CHECK-POSTLINK-O-NEXT: Running pass: TailCallElimPass +; CHECK-POSTLINK-O2-NEXT: Running pass: TailCallElimPass +; CHECK-POSTLINK-O3-NEXT: Running pass: TailCallElimPass +; CHECK-POSTLINK-Os-NEXT: Running pass: TailCallElimPass +; CHECK-POSTLINK-Oz-NEXT: Running pass: TailCallElimPass ; CHECK-POSTLINK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-POSTLINK-O-NEXT: Running pass: GlobalDCEPass ; CHECK-POSTLINK-O-NEXT: Running pass: ConstantMergePass diff --git a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll --- a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll +++ b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll @@ -196,7 +196,7 @@ ; CHECK-O-NEXT: Running pass: LoopSinkPass ; CHECK-O-NEXT: Running pass: InstSimplifyPass ; CHECK-O-NEXT: Running pass: DivRemPairsPass -; CHECK-O-NEXT: Running pass: TailCallElimPass +; CHECK-O23SZ-NEXT: Running pass: TailCallElimPass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: GlobalDCEPass ; CHECK-O-NEXT: Running pass: ConstantMergePass diff --git a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll --- a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll +++ b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll @@ -208,7 +208,7 @@ ; CHECK-O-NEXT: Running pass: LoopSinkPass ; CHECK-O-NEXT: Running pass: InstSimplifyPass ; CHECK-O-NEXT: Running pass: DivRemPairsPass -; CHECK-O-NEXT: Running pass: TailCallElimPass +; CHECK-O23SZ-NEXT: Running pass: TailCallElimPass ; CHECK-O-NEXT: Running pass: SimplifyCFGPass ; CHECK-O-NEXT: Running pass: GlobalDCEPass ; CHECK-O-NEXT: Running pass: ConstantMergePass diff --git a/llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll b/llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll --- a/llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll +++ b/llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll @@ -25,7 +25,7 @@ ; CHECK-NEXT: [[TOBOOL_NOT1:%.*]] = icmp eq i32 [[N:%.*]], 0 ; CHECK-NEXT: br i1 [[TOBOOL_NOT1]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] ; CHECK: while.body.preheader: -; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.abs.i32(i32 [[N]], i1 true) +; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.abs.i32(i32 [[N]], i1 true) ; CHECK-NEXT: br label [[WHILE_BODY:%.*]] ; CHECK: while.body: ; CHECK-NEXT: [[N_ADDR_03:%.*]] = phi i32 [ [[TMP1:%.*]], [[WHILE_BODY]] ], [ [[TMP0]], [[WHILE_BODY_PREHEADER]] ] diff --git a/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll b/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll --- a/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll +++ b/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll @@ -14,7 +14,7 @@ ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i8 [[A:%.*]], [[B:%.*]] ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], [[B]] ; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 0, i8 [[SUB]] -; CHECK-NEXT: [[TMP1:%.*]] = tail call i8 @llvm.smax.i8(i8 [[SUB]], i8 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[SUB]], i8 0) ; CHECK-NEXT: [[R:%.*]] = sub i8 [[TMP1]], [[M1]] ; CHECK-NEXT: ret i8 [[R]] ; @@ -31,7 +31,7 @@ define i8 @abs_swapped(i8 %a) { ; CHECK-LABEL: @abs_swapped( -; CHECK-NEXT: [[TMP1:%.*]] = tail call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false) +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false) ; CHECK-NEXT: ret i8 [[TMP1]] ; %neg = sub i8 0, %a @@ -77,7 +77,7 @@ define i8 @nabs_different_constants(i8 %a) { ; CHECK-LABEL: @nabs_different_constants( -; CHECK-NEXT: [[TMP1:%.*]] = tail call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false) +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false) ; CHECK-NEXT: [[M1:%.*]] = sub i8 0, [[TMP1]] ; CHECK-NEXT: ret i8 [[M1]] ; diff --git a/llvm/test/Transforms/PhaseOrdering/minmax.ll b/llvm/test/Transforms/PhaseOrdering/minmax.ll --- a/llvm/test/Transforms/PhaseOrdering/minmax.ll +++ b/llvm/test/Transforms/PhaseOrdering/minmax.ll @@ -10,13 +10,13 @@ define void @cmyk(i8 %r, i8 %g, i8 %b) { ; CHECK-LABEL: @cmyk( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @llvm.smax.i8(i8 [[R:%.*]], i8 [[G:%.*]]) -; CHECK-NEXT: [[TMP1:%.*]] = tail call i8 @llvm.smax.i8(i8 [[B:%.*]], i8 [[TMP0]]) +; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.smax.i8(i8 [[R:%.*]], i8 [[G:%.*]]) +; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[B:%.*]], i8 [[TMP0]]) ; CHECK-NEXT: [[K_0:%.*]] = xor i8 [[TMP1]], -1 ; CHECK-NEXT: [[SUB31:%.*]] = sub i8 [[TMP1]], [[R]] ; CHECK-NEXT: [[SUB35:%.*]] = sub i8 [[TMP1]], [[G]] ; CHECK-NEXT: [[SUB39:%.*]] = sub i8 [[TMP1]], [[B]] -; CHECK-NEXT: tail call void @use(i8 [[SUB31]], i8 [[SUB35]], i8 [[SUB39]], i8 [[K_0]]) +; CHECK-NEXT: call void @use(i8 [[SUB31]], i8 [[SUB35]], i8 [[SUB39]], i8 [[K_0]]) ; CHECK-NEXT: ret void ; entry: