diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -396,17 +396,19 @@
 
   // Look for uarch line to determine cpu name
   StringRef UArch;
+  // Look for isa line to determine rv32 or rv64
+  StringRef ISA;
   for (unsigned I = 0, E = Lines.size(); I != E; ++I) {
-    if (Lines[I].startswith("uarch")) {
+    if (Lines[I].startswith("uarch"))
       UArch = Lines[I].substr(5).ltrim("\t :");
-      break;
-    }
+    if (Lines[I].startswith("isa"))
+      ISA = Lines[I].substr(3).ltrim("\t :");
   }
 
   return StringSwitch<const char *>(UArch)
       .Case("sifive,u74-mc", "sifive-u74")
       .Case("sifive,bullet0", "sifive-u74")
-      .Default("generic");
+      .Default(ISA.startswith("rv64") ? "generic-rv64" : "generic-rv32");
 }
 
 StringRef sys::detail::getHostCPUNameForBPF() {
diff --git a/llvm/unittests/Support/Host.cpp b/llvm/unittests/Support/Host.cpp
--- a/llvm/unittests/Support/Host.cpp
+++ b/llvm/unittests/Support/Host.cpp
@@ -386,8 +386,25 @@
 mmu             : sv39
 uarch           : sifive,u74-mc
 )";
+  const StringRef QemuRV64CPUInfo = R"(
+processor       : 0
+hart            : 1
+isa             : rv64imafdc
+mmu             : sv39
+)";
+  const StringRef QemuRV32CPUInfo = R"(
+processor       : 0
+hart            : 1
+isa             : rv32imafdc
+mmu             : sv39
+)";
+
   EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(SifiveU74MCProcCPUInfo),
             "sifive-u74");
+  EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(QemuRV64CPUInfo),
+            "generic-rv64");
+  EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(QemuRV32CPUInfo),
+            "generic-rv32");
   EXPECT_EQ(
       sys::detail::getHostCPUNameForRISCV("uarch           : sifive,bullet0\n"),
       "sifive-u74");