diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -495,6 +495,7 @@
 defvar hip = LangOpts<"HIP">;
 defvar gnu_mode = LangOpts<"GNUMode">;
 defvar asm_preprocessor = LangOpts<"AsmPreprocessor">;
+defvar hlsl = LangOpts<"HLSL">;
 
 defvar std = !strconcat("LangStandard::getLangStandardForKind(", lang_std.KeyPath, ")");
 
@@ -6122,7 +6123,7 @@
 def fnative_half_arguments_and_returns : Flag<["-"], "fnative-half-arguments-and-returns">,
   HelpText<"Use the native __fp16 type for arguments and returns (and skip ABI-specific lowering)">,
   MarshallingInfoFlag<LangOpts<"NativeHalfArgsAndReturns">>,
-  ImpliedByAnyOf<[open_cl.KeyPath, render_script.KeyPath]>;
+  ImpliedByAnyOf<[open_cl.KeyPath, render_script.KeyPath, hlsl.KeyPath]>;
 def fallow_half_arguments_and_returns : Flag<["-"], "fallow-half-arguments-and-returns">,
   HelpText<"Allow function arguments and returns of type half">,
   MarshallingInfoFlag<LangOpts<"HalfArgsAndReturns">>,
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3524,7 +3524,6 @@
   // Add the default headers if dxc_no_stdinc is not set.
   if (!Args.hasArg(options::OPT_dxc_no_stdinc))
     CmdArgs.push_back("-finclude-default-header");
-  CmdArgs.push_back("-fallow-half-arguments-and-returns");
 }
 
 static void RenderARCMigrateToolOptions(const Driver &D, const ArgList &Args,
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -12,4 +12,13 @@
 __attribute__((clang_builtin_alias(__builtin_hlsl_wave_active_count_bits))) uint
 WaveActiveCountBits(bool bBit);
 
+__attribute__((clang_builtin_alias(__builtin_abs))) int abs(int In);
+__attribute__((clang_builtin_alias(__builtin_labs))) int64_t abs(int64_t In);
+__attribute__((clang_builtin_alias(__builtin_fabsf))) float abs(float In);
+__attribute__((clang_builtin_alias(__builtin_fabs))) double abs(double In);
+
+#ifdef __HLSL_ENABLE_16_BIT
+__attribute__((clang_builtin_alias(__builtin_fabsf16))) half abs(half In);
+#endif
+
 #endif //_HLSL_HLSL_INTRINSICS_H_
diff --git a/clang/test/CodeGenHLSL/builtins/abs.hlsl b/clang/test/CodeGenHLSL/builtins/abs.hlsl
new file mode 100644
--- /dev/null
+++ b/clang/test/CodeGenHLSL/builtins/abs.hlsl
@@ -0,0 +1,57 @@
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s
+// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
+// RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN:   -o - | FileCheck %s --check-prefix=NO_HALF
+
+
+float abs_float(float X) {
+  return abs(X);
+}
+
+// CHECK: define noundef float @"?abs_float@@YAMM@Z"(
+// CHECK: call float @llvm.fabs.f32(float %0)
+
+double abs_double(double X) {
+  return abs(X);
+}
+
+// CHECK: define noundef double @"?abs_double@@YANN@Z"(
+// CHECK: call double @llvm.fabs.f64(double %0)
+
+half abs_half(half X) {
+  return abs(X);
+}
+
+// CHECK: define noundef half @"?abs_half@@YA$f16@$f16@@Z"(
+// CHECK: call half @llvm.fabs.f16(half %0)
+// NO_HALF: define noundef float @"?abs_half@@YA$halff@$halff@@Z"(
+// NO_HALF: call float @llvm.fabs.f32(float %0)
+
+int abs_int(int X) {
+  return abs(X);
+}
+
+// NO_HALF: define noundef i32 @"?abs_int@@YAHH@Z"(i32
+// CHECK: define noundef i32 @"?abs_int@@YAHH@Z"(i32
+// CHECK:         [[A_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:    store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
+// CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// CHECK-NEXT:    [[NEG:%.*]] = sub nsw i32 0, [[TMP0]]
+// CHECK-NEXT:    [[ABSCOND:%.*]] = icmp slt i32 [[TMP0]], 0
+// CHECK-NEXT:    [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[TMP0]]
+// CHECK-NEXT:    ret i32 [[ABS]]
+
+int64_t abs_int64(int64_t X) {
+  return abs(X);
+}
+
+// CHECK: define noundef i64 @"?abs_int64@@YAJJ@Z"(i64
+// CHECK:         [[A_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:    store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
+// CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
+// CHECK-NEXT:    [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
+// CHECK-NEXT:    [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
+// CHECK-NEXT:    [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
+// CHECK-NEXT:    ret i64 [[ABS]]