diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp @@ -135,23 +135,12 @@ return lowerShiftRightParts(Op, DAG, true); case ISD::SRL_PARTS: return lowerShiftRightParts(Op, DAG, false); - case ISD::SHL: - case ISD::SRA: - case ISD::SRL: - // This can be called for an i32 shift amount that needs to be promoted. - assert(Op.getOperand(1).getValueType() == MVT::i32 && Subtarget.is64Bit() && - "Unexpected custom legalisation"); - return SDValue(); - case ISD::BSWAP: - return SDValue(); case ISD::ConstantPool: return lowerConstantPool(Op, DAG); case ISD::FP_TO_SINT: return lowerFP_TO_SINT(Op, DAG); case ISD::BITCAST: return lowerBITCAST(Op, DAG); - case ISD::FP_TO_UINT: - return SDValue(); case ISD::UINT_TO_FP: return lowerUINT_TO_FP(Op, DAG); case ISD::VASTART: