diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h @@ -64,6 +64,8 @@ const LoongArchSubtarget &getSubtarget() const { return Subtarget; } + bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; + // Provide custom lowering hooks for some operations. SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; void ReplaceNodeResults(SDNode *N, SmallVectorImpl &Results, diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp @@ -132,6 +132,15 @@ setTargetDAGCombine(ISD::SRL); } +bool LoongArchTargetLowering::isOffsetFoldingLegal( + const GlobalAddressSDNode *GA) const { + // In order to maximise the opportunity for common subexpression elimination, + // keep a separate ADD node for the global address offset instead of folding + // it in the global address node. Later peephole optimisations may choose to + // fold it back in when profitable. + return false; +} + SDValue LoongArchTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { switch (Op.getOpcode()) { diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll --- a/llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll +++ b/llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll @@ -45,8 +45,8 @@ ; LA32PIC-NEXT: addi.w $a2, $a1, .Larr$local ; LA32-NEXT: ld.w $a1, $a2, 0 ; LA32-NEXT: st.w $a0, $a2, 0 -; LA32NOPIC-NEXT: ld.w $a3, $a2, 0 -; LA32NOPIC-NEXT: st.w $a0, $a2, 0 +; LA32NOPIC-NEXT: ld.w $a3, $a2, 36 +; LA32NOPIC-NEXT: st.w $a0, $a2, 36 ; LA32PIC-NEXT: ld.w $a3, $a2, 36 ; LA32PIC-NEXT: st.w $a0, $a2, 36 @@ -56,8 +56,8 @@ ; LA64PIC-NEXT: addi.d $a2, $a1, .Larr$local ; LA64-NEXT: ld.w $a1, $a2, 0 ; LA64-NEXT: st.w $a0, $a2, 0 -; LA64NOPIC-NEXT: ld.w $a3, $a2, 0 -; LA64NOPIC-NEXT: st.w $a0, $a2, 0 +; LA64NOPIC-NEXT: ld.w $a3, $a2, 36 +; LA64NOPIC-NEXT: st.w $a0, $a2, 36 ; LA64PIC-NEXT: ld.w $a3, $a2, 36 ; LA64PIC-NEXT: st.w $a0, $a2, 36