diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -355,7 +355,8 @@
 bool RISCVAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
                                    const MCSubtargetInfo *STI) const {
   bool HasStdExtC = STI->getFeatureBits()[RISCV::FeatureStdExtC];
-  unsigned MinNopLen = HasStdExtC ? 2 : 4;
+  bool HasStdExtZca = STI->getFeatureBits()[RISCV::FeatureExtZca];
+  unsigned MinNopLen = (HasStdExtC || HasStdExtZca) ? 2 : 4;
 
   if ((Count % MinNopLen) != 0)
     return false;
@@ -365,7 +366,7 @@
     OS.write("\x13\0\0\0", 4);
 
   // The canonical nop on RVC is c.nop.
-  if (Count && HasStdExtC)
+  if (Count && (HasStdExtC || HasStdExtZca))
     OS.write("\x01\0", 2);
 
   return true;
@@ -588,7 +589,8 @@
     return false;
 
   bool HasStdExtC = STI->getFeatureBits()[RISCV::FeatureStdExtC];
-  unsigned MinNopLen = HasStdExtC ? 2 : 4;
+  bool HasStdExtZca = STI->getFeatureBits()[RISCV::FeatureExtZca];
+  unsigned MinNopLen = (HasStdExtC || HasStdExtZca) ? 2 : 4;
 
   if (AF.getAlignment() <= MinNopLen) {
     return false;
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp
@@ -19,5 +19,8 @@
 
 unsigned RISCVMCObjectFileInfo::getTextSectionAlignment() const {
   const MCSubtargetInfo *STI = getContext().getSubtargetInfo();
-  return STI->hasFeature(RISCV::FeatureStdExtC) ? 2 : 4;
+  return (STI->hasFeature(RISCV::FeatureStdExtC) ||
+          STI->hasFeature(RISCV::FeatureExtZca))
+             ? 2
+             : 4;
 }
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -942,7 +942,7 @@
   }
 
   // Function alignments.
-  const Align FunctionAlignment(Subtarget.hasStdExtC() ? 2 : 4);
+  const Align FunctionAlignment(Subtarget.hasStdExtCOrZca() ? 2 : 4);
   setMinFunctionAlignment(FunctionAlignment);
   setPrefFunctionAlignment(FunctionAlignment);
 
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -56,7 +56,7 @@
       STI(STI) {}
 
 MCInst RISCVInstrInfo::getNop() const {
-  if (STI.getFeatureBits()[RISCV::FeatureStdExtC])
+  if (STI.hasStdExtCOrZca())
     return MCInstBuilder(RISCV::C_NOP);
   return MCInstBuilder(RISCV::ADDI)
       .addReg(RISCV::X0)
@@ -1298,8 +1298,10 @@
 
   // jr t0 = 4 bytes, 2 bytes if compressed instructions are enabled.
   unsigned FrameOverhead = 4;
-  if (RepeatedSequenceLocs[0].getMF()->getSubtarget()
-          .getFeatureBits()[RISCV::FeatureStdExtC])
+  if (RepeatedSequenceLocs[0]
+          .getMF()
+          ->getSubtarget<RISCVSubtarget>()
+          .hasStdExtCOrZca())
     FrameOverhead = 2;
 
   return outliner::OutlinedFunction(RepeatedSequenceLocs, SequenceSize,
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
@@ -733,69 +733,69 @@
 // on page 82 of the ISA manual.
 
 // Quadrant 0
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(ADDI GPRC:$rd, SP:$rs1, uimm10_lsb00nonzero:$imm),
                   (C_ADDI4SPN GPRC:$rd, SP:$rs1, uimm10_lsb00nonzero:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 let Predicates = [HasStdExtC, HasStdExtD] in {
 def : CompressPat<(FLD FPR64C:$rd, GPRC:$rs1, uimm8_lsb000:$imm),
                   (C_FLD FPR64C:$rd, GPRC:$rs1, uimm8_lsb000:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtD]
 
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(LW GPRC:$rd, GPRC:$rs1, uimm7_lsb00:$imm),
                   (C_LW GPRC:$rd, GPRC:$rs1, uimm7_lsb00:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 let Predicates = [HasStdExtC, HasStdExtF, IsRV32] in {
 def : CompressPat<(FLW FPR32C:$rd, GPRC:$rs1, uimm7_lsb00:$imm),
                   (C_FLW FPR32C:$rd, GPRC:$rs1, uimm7_lsb00:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtF, IsRV32]
 
-let Predicates = [HasStdExtC, IsRV64] in {
+let Predicates = [HasStdExtCOrZca, IsRV64] in {
 def : CompressPat<(LD GPRC:$rd, GPRC:$rs1, uimm8_lsb000:$imm),
                   (C_LD GPRC:$rd, GPRC:$rs1, uimm8_lsb000:$imm)>;
-} // Predicates = [HasStdExtC, IsRV64]
+} // Predicates = [HasStdExtCOrZca, IsRV64]
 
 let Predicates = [HasStdExtC, HasStdExtD] in {
 def : CompressPat<(FSD FPR64C:$rs2, GPRC:$rs1, uimm8_lsb000:$imm),
                   (C_FSD FPR64C:$rs2, GPRC:$rs1, uimm8_lsb000:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtD]
 
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(SW GPRC:$rs2, GPRC:$rs1, uimm7_lsb00:$imm),
                   (C_SW GPRC:$rs2, GPRC:$rs1, uimm7_lsb00:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 let Predicates = [HasStdExtC, HasStdExtF, IsRV32] in {
 def : CompressPat<(FSW FPR32C:$rs2, GPRC:$rs1, uimm7_lsb00:$imm),
                   (C_FSW FPR32C:$rs2, GPRC:$rs1, uimm7_lsb00:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtF, IsRV32]
 
-let Predicates = [HasStdExtC, IsRV64] in {
+let Predicates = [HasStdExtCOrZca, IsRV64] in {
 def : CompressPat<(SD GPRC:$rs2, GPRC:$rs1, uimm8_lsb000:$imm),
                   (C_SD GPRC:$rs2, GPRC:$rs1, uimm8_lsb000:$imm)>;
-} // Predicates = [HasStdExtC, IsRV64]
+} // Predicates = [HasStdExtCOrZca, IsRV64]
 
 // Quadrant 1
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(ADDI X0, X0, 0), (C_NOP)>;
 def : CompressPat<(ADDI GPRNoX0:$rs1, GPRNoX0:$rs1, simm6nonzero:$imm),
                   (C_ADDI GPRNoX0:$rs1, simm6nonzero:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
-let Predicates = [HasStdExtC, IsRV32] in {
+let Predicates = [HasStdExtCOrZca, IsRV32] in {
 def : CompressPat<(JAL X1, simm12_lsb0:$offset),
                   (C_JAL simm12_lsb0:$offset)>;
-} // Predicates = [HasStdExtC, IsRV32]
+} // Predicates = [HasStdExtCOrZca, IsRV32]
 
-let Predicates = [HasStdExtC, IsRV64] in {
+let Predicates = [HasStdExtCOrZca, IsRV64] in {
 def : CompressPat<(ADDIW GPRNoX0:$rs1, GPRNoX0:$rs1, simm6:$imm),
                   (C_ADDIW GPRNoX0:$rs1, simm6:$imm)>;
-} // Predicates = [HasStdExtC, IsRV64]
+} // Predicates = [HasStdExtCOrZca, IsRV64]
 
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(ADDI GPRNoX0:$rd, X0, simm6:$imm),
                   (C_LI GPRNoX0:$rd, simm6:$imm)>;
 def : CompressPat<(ADDI X2, X2, simm10_lsb0000nonzero:$imm),
@@ -825,9 +825,9 @@
 let isCompressOnly = true in
 def : CompressPat<(AND GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
                   (C_AND GPRC:$rs1, GPRC:$rs2)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
-let Predicates = [HasStdExtC, IsRV64] in {
+let Predicates = [HasStdExtCOrZca, IsRV64] in {
 let isCompressOnly = true in
 def : CompressPat<(ADDIW GPRNoX0:$rd, X0, simm6:$imm),
                   (C_LI GPRNoX0:$rd, simm6:$imm)>;
@@ -838,44 +838,44 @@
 let isCompressOnly = true in
 def : CompressPat<(ADDW GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
                    (C_ADDW GPRC:$rs1, GPRC:$rs2)>;
-} // Predicates = [HasStdExtC, IsRV64]
+} // Predicates = [HasStdExtCOrZca, IsRV64]
 
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(JAL X0, simm12_lsb0:$offset),
                   (C_J simm12_lsb0:$offset)>;
 def : CompressPat<(BEQ GPRC:$rs1, X0, simm9_lsb0:$imm),
                   (C_BEQZ GPRC:$rs1, simm9_lsb0:$imm)>;
 def : CompressPat<(BNE GPRC:$rs1, X0, simm9_lsb0:$imm),
                   (C_BNEZ GPRC:$rs1, simm9_lsb0:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 // Quadrant 2
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(SLLI GPRNoX0:$rs1, GPRNoX0:$rs1, uimmlog2xlennonzero:$imm),
                   (C_SLLI GPRNoX0:$rs1, uimmlog2xlennonzero:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 let Predicates = [HasStdExtC, HasStdExtD] in {
 def : CompressPat<(FLD FPR64:$rd, SP:$rs1, uimm9_lsb000:$imm),
                   (C_FLDSP FPR64:$rd, SP:$rs1, uimm9_lsb000:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtD]
 
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(LW GPRNoX0:$rd, SP:$rs1,  uimm8_lsb00:$imm),
                   (C_LWSP GPRNoX0:$rd, SP:$rs1, uimm8_lsb00:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 let Predicates = [HasStdExtC, HasStdExtF, IsRV32] in {
 def : CompressPat<(FLW FPR32:$rd, SP:$rs1, uimm8_lsb00:$imm),
                   (C_FLWSP FPR32:$rd, SP:$rs1, uimm8_lsb00:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtF, IsRV32]
 
-let Predicates = [HasStdExtC, IsRV64] in {
+let Predicates = [HasStdExtCOrZca, IsRV64] in {
 def : CompressPat<(LD GPRNoX0:$rd, SP:$rs1, uimm9_lsb000:$imm),
                   (C_LDSP GPRNoX0:$rd, SP:$rs1, uimm9_lsb000:$imm)>;
-} // Predicates = [HasStdExtC, IsRV64]
+} // Predicates = [HasStdExtCOrZca, IsRV64]
 
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(JALR X0, GPRNoX0:$rs1, 0),
                   (C_JR GPRNoX0:$rs1)>;
 let isCompressOnly = true in {
@@ -895,24 +895,24 @@
 let isCompressOnly = true in
 def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs2, GPRNoX0:$rs1),
                   (C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 let Predicates = [HasStdExtC, HasStdExtD] in {
 def : CompressPat<(FSD FPR64:$rs2, SP:$rs1, uimm9_lsb000:$imm),
                   (C_FSDSP FPR64:$rs2, SP:$rs1, uimm9_lsb000:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtD]
 
-let Predicates = [HasStdExtC] in {
+let Predicates = [HasStdExtCOrZca] in {
 def : CompressPat<(SW GPR:$rs2, SP:$rs1, uimm8_lsb00:$imm),
                   (C_SWSP GPR:$rs2, SP:$rs1, uimm8_lsb00:$imm)>;
-} // Predicates = [HasStdExtC]
+} // Predicates = [HasStdExtCOrZca]
 
 let Predicates = [HasStdExtC, HasStdExtF, IsRV32] in {
 def : CompressPat<(FSW FPR32:$rs2, SP:$rs1, uimm8_lsb00:$imm),
                   (C_FSWSP FPR32:$rs2, SP:$rs1, uimm8_lsb00:$imm)>;
 } // Predicates = [HasStdExtC, HasStdExtF, IsRV32]
 
-let Predicates = [HasStdExtC, IsRV64] in {
+let Predicates = [HasStdExtCOrZca, IsRV64] in {
 def : CompressPat<(SD GPR:$rs2, SP:$rs1, uimm9_lsb000:$imm),
                   (C_SDSP GPR:$rs2, SP:$rs1, uimm9_lsb000:$imm)>;
-} // Predicates = [HasStdExtC, IsRV64]
+} // Predicates = [HasStdExtCOrZca, IsRV64]
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -155,6 +155,7 @@
   bool hasStdExtF() const { return HasStdExtF; }
   bool hasStdExtD() const { return HasStdExtD; }
   bool hasStdExtC() const { return HasStdExtC; }
+  bool hasStdExtCOrZca() const { return HasStdExtC || HasStdExtZca; }
   bool hasStdExtV() const { return HasStdExtV; }
   bool hasStdExtZihintpause() const { return HasStdExtZihintpause; }
   bool hasStdExtZba() const { return HasStdExtZba; }
diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll
--- a/llvm/test/CodeGen/RISCV/attributes.ll
+++ b/llvm/test/CodeGen/RISCV/attributes.ll
@@ -41,6 +41,8 @@
 ; RUN: llc -mtriple=riscv32 -mattr=+zicbom %s -o - | FileCheck --check-prefix=RV32ZICBOM %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zicboz %s -o - | FileCheck --check-prefix=RV32ZICBOZ %s
 ; RUN: llc -mtriple=riscv32 -mattr=+zicbop %s -o - | FileCheck --check-prefix=RV32ZICBOP %s
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-zca %s -o - | FileCheck --check-prefix=RV32ZCA %s
+
 ; RUN: llc -mtriple=riscv64 -mattr=+m %s -o - | FileCheck --check-prefix=RV64M %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zmmul %s -o - | FileCheck --check-prefix=RV64ZMMUL %s
 ; RUN: llc -mtriple=riscv64 -mattr=+m,+zmmul %s -o - | FileCheck --check-prefix=RV64MZMMUL %s
@@ -82,6 +84,7 @@
 ; RUN: llc -mtriple=riscv64 -mattr=+zicbom %s -o - | FileCheck --check-prefix=RV64ZICBOM %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zicboz %s -o - | FileCheck --check-prefix=RV64ZICBOZ %s
 ; RUN: llc -mtriple=riscv64 -mattr=+zicbop %s -o - | FileCheck --check-prefix=RV64ZICBOP %s
+; RUN: llc -mtriple=riscv64 -mattr=+experimental-zca %s -o - | FileCheck --check-prefix=RV64ZCA %s
 
 ; RV32M: .attribute 5, "rv32i2p0_m2p0"
 ; RV32ZMMUL: .attribute 5, "rv32i2p0_zmmul1p0"
@@ -124,6 +127,7 @@
 ; RV32ZICBOM: .attribute 5, "rv32i2p0_zicbom1p0"
 ; RV32ZICBOZ: .attribute 5, "rv32i2p0_zicboz1p0"
 ; RV32ZICBOP: .attribute 5, "rv32i2p0_zicbop1p0"
+; RV32ZCA: .attribute 5, "rv32i2p0_zca0p70"
 
 ; RV64M: .attribute 5, "rv64i2p0_m2p0"
 ; RV64ZMMUL: .attribute 5, "rv64i2p0_zmmul1p0"
@@ -166,6 +170,7 @@
 ; RV64ZICBOM: .attribute 5, "rv64i2p0_zicbom1p0"
 ; RV64ZICBOZ: .attribute 5, "rv64i2p0_zicboz1p0"
 ; RV64ZICBOP: .attribute 5, "rv64i2p0_zicbop1p0"
+; RV64ZCA: .attribute 5, "rv64i2p0_zca0p70"
 
 define i32 @addi(i32 %a) {
   %1 = add i32 %a, 1
diff --git a/llvm/test/MC/RISCV/rv32c-aliases-valid.s b/llvm/test/MC/RISCV/rv32c-aliases-valid.s
--- a/llvm/test/MC/RISCV/rv32c-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rv32c-aliases-valid.s
@@ -3,6 +3,11 @@
 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c < %s \
 # RUN:     | llvm-objdump -d -M no-aliases - \
 # RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
+# RUN: llvm-mc -triple=riscv32 -mattr=+experimental-zca -riscv-no-aliases < %s \
+# RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zca < %s \
+# RUN:     | llvm-objdump --mattr=+experimental-zca -d -M no-aliases - \
+# RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
 
 # The following check prefixes are used in this test:
 # CHECK-INST.....Match the canonical instr (tests alias to instr. mapping)
diff --git a/llvm/test/MC/RISCV/rv64zca-aliases-valid.s b/llvm/test/MC/RISCV/rv64zca-aliases-valid.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/RISCV/rv64zca-aliases-valid.s
@@ -0,0 +1,105 @@
+# RUN: llvm-mc -triple=riscv64 -mattr=+experimental-zca -riscv-no-aliases < %s \
+# RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zca < %s \
+# RUN:     | llvm-objdump --mattr=+experimental-zca -d -M no-aliases - \
+# RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
+
+# The following check prefixes are used in this test:
+# CHECK-INST.....Match the canonical instr (tests alias to instr. mapping)
+# CHECK-EXPAND...Match canonical instr. unconditionally (tests alias expansion)
+# CHECK-INST: {{^}}
+
+# CHECK-EXPAND: c.li a0, 0
+li x10, 0
+# CHECK-EXPAND: c.li a0, 1
+li x10, 1
+# CHECK-EXPAND: c.li a0, -1
+li x10, -1
+# CHECK-EXPAND: addi a0, zero, 2047
+li x10, 2047
+# CHECK-EXPAND: addi a0, zero, -2047
+li x10, -2047
+# CHECK-EXPAND: c.lui a1, 1
+# CHECK-EXPAND: addiw a1, a1, -2048
+li x11, 2048
+# CHECK-EXPAND: addi a1, zero, -2048
+li x11, -2048
+# CHECK-EXPAND: c.lui a1, 1
+# CHECK-EXPAND: addiw a1, a1, -2047
+li x11, 2049
+# CHECK-EXPAND: c.lui a1, 1048575
+# CHECK-EXPAND: addiw a1, a1, 2047
+li x11, -2049
+# CHECK-EXPAND: c.lui a1, 1
+# CHECK-EXPAND: c.addiw a1, -1
+li x11, 4095
+# CHECK-EXPAND: lui a1, 1048575
+# CHECK-EXPAND: c.addiw a1, 1
+li x11, -4095
+# CHECK-EXPAND: c.lui a2, 1
+li x12, 4096
+# CHECK-EXPAND: lui a2, 1048575
+li x12, -4096
+# CHECK-EXPAND: c.lui a2, 1
+# CHECK-EXPAND: c.addiw a2, 1
+li x12, 4097
+# CHECK-EXPAND: lui a2, 1048575
+# CHECK-EXPAND: c.addiw a2, -1
+li x12, -4097
+# CHECK-EXPAND: lui a2, 524288
+# CHECK-EXPAND: c.addiw a2, -1
+li x12, 2147483647
+# CHECK-EXPAND: lui a2, 524288
+# CHECK-EXPAND: c.addiw a2, 1
+li x12, -2147483647
+# CHECK-EXPAND: lui a2, 524288
+li x12, -2147483648
+# CHECK-EXPAND: lui a2, 524288
+li x12, -0x80000000
+
+# CHECK-EXPAND: c.li a2, 1
+# CHECK-EXPAND: c.slli a2, 31
+li x12, 0x80000000
+# CHECK-EXPAND: c.li a2, -1
+# CHECK-EXPAND: c.srli a2, 32
+li x12, 0xFFFFFFFF
+
+# CHECK-EXPAND: c.li t0, 1
+# CHECK-EXPAND: c.slli t0, 32
+li t0, 0x100000000
+# CHECK-EXPAND: c.li t1, -1
+# CHECK-EXPAND: c.slli t1, 63
+li t1, 0x8000000000000000
+# CHECK-EXPAND: c.li t1, -1
+# CHECK-EXPAND: c.slli t1, 63
+li t1, -0x8000000000000000
+# CHECK-EXPAND: lui t2, 9321
+# CHECK-EXPAND: addiw t2, t2, -1329
+# CHECK-EXPAND: c.slli t2, 35
+li t2, 0x1234567800000000
+# CHECK-EXPAND: c.li t3, 7
+# CHECK-EXPAND: c.slli t3, 36
+# CHECK-EXPAND: c.addi t3, 11
+# CHECK-EXPAND: c.slli t3, 24
+# CHECK-EXPAND: c.addi t3, 15
+li t3, 0x700000000B00000F
+# CHECK-EXPAND: lui t4, 583
+# CHECK-EXPAND: addiw t4, t4, -1875
+# CHECK-EXPAND: c.slli t4, 14
+# CHECK-EXPAND: addi t4, t4, -947
+# CHECK-EXPAND: c.slli t4, 12
+# CHECK-EXPAND: addi t4, t4, 1511
+# CHECK-EXPAND: c.slli t4, 13
+# CHECK-EXPAND: addi t4, t4, -272
+li t4, 0x123456789abcdef0
+# CHECK-EXPAND: c.li t5, -1
+li t5, 0xFFFFFFFFFFFFFFFF
+
+# CHECK-EXPAND: c.ld s0, 0(s1)
+c.ld x8, (x9)
+# CHECK-EXPAND: c.sd s0, 0(s1)
+c.sd x8, (x9)
+# CHECK-EXPAND: c.ldsp s0, 0(sp)
+c.ldsp x8, (x2)
+# CHECK-EXPAND: c.sdsp s0, 0(sp)
+c.sdsp x8, (x2)
diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -1838,6 +1838,10 @@
   if (!MAttrs.empty()) {
     for (unsigned I = 0; I != MAttrs.size(); ++I)
       Features.AddFeature(MAttrs[I]);
+
+    if (Features.getString().find("experimental-zca") != std::string::npos) {
+      Features.AddFeature("c", false);
+    }
   } else if (MCPU.empty() && Obj->getArch() == llvm::Triple::aarch64) {
     Features.AddFeature("+all");
   }