diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s @@ -3,8 +3,8 @@ ## Use '|' to show where the tabs line up. # CHECK:0000000000000000 <$x.0>: -# CHECK-NEXT: 0: 62 10 00 91 |add|x2, x3, #4{{$}} -# CHECK-NEXT: 4: 1f 20 03 d5 |nop +# CHECK-NEXT: 0: 91001062 |add|x2, x3, #4{{$}} +# CHECK-NEXT: 4: d503201f |nop # CHECK-EMPTY: # CHECK-NEXT:0000000000000008 <$d.1>: # CHECK-NEXT: 8:|ff ff 00 00|.word|0x0000ffff diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test @@ -16,7 +16,7 @@ # CHECK: Disassembly of section .mysection: # CHECK: <_start>: -# CHECK: 0: 21 00 00 10 adr x1, #4 +# CHECK: 0: 10000021 adr x1, #4 # CHECK: : # CHECK: 4: 48 65 6c 6c .word # CHECK: 8: 6f 2c 20 77 .word @@ -24,7 +24,7 @@ # CHECK: 10: 0a 00 .short 0x000a # CHECK: Disassembly of section .myothersection: # CHECK: <$x.2>: -# CHECK: 0: 01 00 00 90 adrp x1, 0x0 +# CHECK: 0: 90000001 adrp x1, 0x0 # CHECK: : # CHECK: 4: 62 6c 61 68 .word # CHECK: 8: 00 .byte 0x01 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s b/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s @@ -51,15 +51,15 @@ # RAW-NEXT: ┃ ┠─ b = R1 # RAW-NEXT: ┃ ┃ ┠─ c = R2 # RAW-NEXT: ┃ ┃ ┃ ┌─ x = R0 -# RAW-NEXT: 0: 00 00 81 e0 add r0, r1, r0 ┻ ┃ ┃ ╈ +# RAW-NEXT: 0: e0810000 add r0, r1, r0 ┻ ┃ ┃ ╈ # RAW-NEXT: ┌─ y = R0 -# RAW-NEXT: 4: 02 00 80 e0 add r0, r0, r2 ╈ ┃ ┃ ┻ -# RAW-NEXT: 8: 1e ff 2f e1 bx lr ┻ ┻ ┻ +# RAW-NEXT: 4: e0800002 add r0, r0, r2 ╈ ┃ ┃ ┻ +# RAW-NEXT: 8: e12fff1e bx lr ┻ ┻ ┻ # RAW-EMPTY: # RAW-NEXT: 0000000c : # RAW-NEXT: ┠─ a = R0 -# RAW-NEXT: c: 01 00 80 e2 add r0, r0, #1 ┃ -# RAW-NEXT: 10: 1e ff 2f e1 bx lr ┻ +# RAW-NEXT: c: e2800001 add r0, r0, #1 ┃ +# RAW-NEXT: 10: e12fff1e bx lr ┻ # INDENT: 00000000 : @@ -67,15 +67,15 @@ # INDENT-NEXT: ┃ ┠─ b = R1 # INDENT-NEXT: ┃ ┃ ┠─ c = R2 # INDENT-NEXT: ┃ ┃ ┃ ┌─ x = R0 -# INDENT-NEXT: 0: 00 00 81 e0 add r0, r1, r0 ┻ ┃ ┃ ╈ +# INDENT-NEXT: 0: e0810000 add r0, r1, r0 ┻ ┃ ┃ ╈ # INDENT-NEXT: ┌─ y = R0 -# INDENT-NEXT: 4: 02 00 80 e0 add r0, r0, r2 ╈ ┃ ┃ ┻ -# INDENT-NEXT: 8: 1e ff 2f e1 bx lr ┻ ┻ ┻ +# INDENT-NEXT: 4: e0800002 add r0, r0, r2 ╈ ┃ ┃ ┻ +# INDENT-NEXT: 8: e12fff1e bx lr ┻ ┻ ┻ # INDENT-EMPTY: # INDENT-NEXT: 0000000c : # INDENT-NEXT: ┠─ a = R0 -# INDENT-NEXT: c: 01 00 80 e2 add r0, r0, #1 ┃ -# INDENT-NEXT: 10: 1e ff 2f e1 bx lr ┻ +# INDENT-NEXT: c: e2800001 add r0, r0, #1 ┃ +# INDENT-NEXT: 10: e12fff1e bx lr ┻ # NO-RAW: 00000000 : # NO-RAW-NEXT: ┠─ a = R0 @@ -133,15 +133,15 @@ # ASCII-NEXT: | |- b = R1 # ASCII-NEXT: | | |- c = R2 # ASCII-NEXT: | | | /- x = R0 -# ASCII-NEXT: 0: 00 00 81 e0 add r0, r1, r0 v | | ^ +# ASCII-NEXT: 0: e0810000 add r0, r1, r0 v | | ^ # ASCII-NEXT: /- y = R0 -# ASCII-NEXT: 4: 02 00 80 e0 add r0, r0, r2 ^ | | v -# ASCII-NEXT: 8: 1e ff 2f e1 bx lr v v v +# ASCII-NEXT: 4: e0800002 add r0, r0, r2 ^ | | v +# ASCII-NEXT: 8: e12fff1e bx lr v v v # ASCII-EMPTY: # ASCII-NEXT: 0000000c : # ASCII-NEXT: |- a = R0 -# ASCII-NEXT: c: 01 00 80 e2 add r0, r0, #1 | -# ASCII-NEXT: 10: 1e ff 2f e1 bx lr v +# ASCII-NEXT: c: e2800001 add r0, r0, #1 | +# ASCII-NEXT: 10: e12fff1e bx lr v # ERROR: error: 'bad_value' is not a valid value for '--debug-vars=' diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-wide-chars.s b/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-wide-chars.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-wide-chars.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-wide-chars.s @@ -14,8 +14,8 @@ # CHECK: 00000000 : # CHECK-NEXT: ; return *喵; ┠─ 喵 = R0 -# CHECK-NEXT: 0: 00 00 90 e5 ldr r0, [r0] ┻ -# CHECK-NEXT: 4: 1e ff 2f e1 bx lr +# CHECK-NEXT: 0: e5900000 ldr r0, [r0] ┻ +# CHECK-NEXT: 4: e12fff1e bx lr .text .syntax unified diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s b/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s @@ -5,5 +5,5 @@ .inst 0xffffffff l0: -@CHECK: 0: 00 00 00 ea b 0x8 @ imm = #0 -@CHECK-NEXT: 4: ff ff ff ff +@CHECK: 0: ea000000 b 0x8 @ imm = #0 +@CHECK-NEXT: 4: ffffffff diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr-resync.test b/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr-resync.test --- a/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr-resync.test +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr-resync.test @@ -1,15 +1,15 @@ # RUN: yaml2obj %s | llvm-objdump -d --mcpu=cortex-a8 - | FileCheck %s -# CHECK: 0: 64 00 a0 e3 mov r0, #100 -# CHECK-NEXT: 4: ff ff ff ff -# CHECK-NEXT: 8: 12 03 81 e0 add r0, r1, r2, lsl r3 +# CHECK: 0: e3a00064 mov r0, #100 +# CHECK-NEXT: 4: ffffffff +# CHECK-NEXT: 8: e0810312 add r0, r1, r2, lsl r3 -# CHECK: c: 64 20 movs r0, #100 -# CHECK-NEXT: e: 0e b8 -# CHECK-NEXT: 10: 40 18 adds r0, r0, r1 -# CHECK-NEXT: 12: 4f f0 64 00 mov.w r0, #100 -# CHECK-NEXT: 16: ee ff cc dd -# CHECK-NEXT: 1a: 01 eb c2 00 add.w r0, r1, r2, lsl #3 +# CHECK: c: 2064 movs r0, #100 +# CHECK-NEXT: e: b80e +# CHECK-NEXT: 10: 1840 adds r0, r0, r1 +# CHECK-NEXT: 12: f04f 0064 mov.w r0, #100 +# CHECK-NEXT: 16: ffee ddcc +# CHECK-NEXT: 1a: eb01 00c2 add.w r0, r1, r2, lsl #3 --- !ELF FileHeader: diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test b/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test --- a/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test @@ -13,7 +13,7 @@ ## llvm-objdump --mattr=+ext1 # CHECK: 00000000 <.text>: -# CHECK-NEXT: 0: cb f3 f7 8b +# CHECK-NEXT: 0: f3cb 8bf7 # CHECK-NEXT: 4: be --- !ELF diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v5t-subarch.s @@ -6,5 +6,5 @@ clz r0, r1 @ CHECK-LABEL: clz -@ CHECK: 11 0f 6f e1 +@ CHECK: e16f0f11 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v5te-subarch.s @@ -6,5 +6,5 @@ strd r0, r1, [r2, +r3] @ CHECK-LABEL strd -@ CHECK: f3 00 82 e1 strd r0, r1, [r2, r3] +@ CHECK: e18200f3 strd r0, r1, [r2, r3] diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v5tej-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v5tej-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v5tej-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v5tej-subarch.s @@ -4,4 +4,4 @@ bxj r0 @ CHECK-LABEL: bxj -@ CHECK: 20 ff 2f e1 bxj r0 +@ CHECK: e12fff20 bxj r0 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subarch.s @@ -6,4 +6,4 @@ umaal r0, r1, r2, r3 @ CHECK-LABEL:umaal -@ CHECK: 92 03 41 e0 umaal r0, r1, r2, r3 +@ CHECK: e0410392 umaal r0, r1, r2, r3 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subfeatures.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subfeatures.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subfeatures.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v6-subfeatures.s @@ -6,4 +6,4 @@ vadd.f32 s0, s1, s2 @CHECK-LABEL: vfp2 -@CHECK: 81 0a 30 ee vadd.f32 s0, s1, s2 +@CHECK: ee300a81 vadd.f32 s0, s1, s2 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v6k-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v6k-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v6k-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v6k-subarch.s @@ -6,4 +6,4 @@ clrex @ CHECK-LABEL: clrex -@ CHECK: 1f f0 7f f5 clrex +@ CHECK: f57ff01f clrex diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v6m-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v6m-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v6m-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v6m-subarch.s @@ -6,4 +6,4 @@ dmb @ CHECK-LABEL: dmb -@ CHECK: bf f3 5f 8f dmb sy +@ CHECK: f3bf 8f5f dmb sy diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v6t2-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v6t2-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v6t2-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v6t2-subarch.s @@ -7,4 +7,4 @@ umaal r0, r1, r2, r3 @ CHECK-LABEL: umaalt2 -@ CHECK: e2 fb 63 01 umaal r0, r1, r2, r3 +@ CHECK: fbe2 0163 umaal r0, r1, r2, r3 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v7a-subfeature.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v7a-subfeature.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v7a-subfeature.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v7a-subfeature.s @@ -8,29 +8,29 @@ vmla.f32 s0, s1, s2 @CHECK-LABEL: vfp2 -@CHECK: 81 0a 00 ee vmla.f32 s0, s1, s2 +@CHECK: ee000a81 vmla.f32 s0, s1, s2 vfp3: vmov.f32 s0, #0.5 @CHECK-LABEL: vfp3 -@CHECK: 00 0a b6 ee vmov.f32 s0, #5.000000e-01 +@CHECK: eeb60a00 vmov.f32 s0, #5.000000e-01 neon: vmla.f32 d0, d1, d2 @CHECK-LABEL: neon -@CHECK: 12 0d 01 f2 vmla.f32 d0, d1, d2 +@CHECK: f2010d12 vmla.f32 d0, d1, d2 fp16: vcvt.f32.f16 q0, d2 @CHECK-LABEL: fp16 -@CHECK: 02 07 b6 f3 vcvt.f32.f16 q0, d2 +@CHECK: f3b60702 vcvt.f32.f16 q0, d2 div: udiv r0, r1, r2 @CHECK-LABEL: div -@CHECK: 11 f2 30 e7 udiv r0, r1, r2 +@CHECK: e730f211 udiv r0, r1, r2 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subarch.s @@ -6,5 +6,5 @@ umlal r0, r1, r2, r3 @ CHECK-LABEL: umlal -@ CHECK: e2 fb 03 01 umlal r0, r1, r2, r3 +@ CHECK: fbe2 0103 umlal r0, r1, r2, r3 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subfeatures.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subfeatures.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subfeatures.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v7m-subfeatures.s @@ -9,18 +9,18 @@ vmla.f32 s0, s1, s2 @CHECK-LABEL: vfp2 -@CHECK: 00 ee 81 0a vmla.f32 s0, s1, s2 +@CHECK: ee00 0a81 vmla.f32 s0, s1, s2 .thumb vfp4: vmov.f32 s0, #0.5 @CHECK-LABEL: vfp4 -@CHECK: b6 ee 00 0a vmov.f32 s0, #5.000000e-01 +@CHECK: eeb6 0a00 vmov.f32 s0, #5.000000e-01 .thumb div: udiv r0, r1, r2 @CHECK-LABEL: div -@CHECK: b1 fb f2 f0 udiv r0, r1, r2 +@CHECK: fbb1 f0f2 udiv r0, r1, r2 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v7r-subfeatures.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v7r-subfeatures.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v7r-subfeatures.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v7r-subfeatures.s @@ -10,11 +10,11 @@ udiv r0, r1, r2 @CHECK-LABEL: div_arm -@CHECK: 11 f2 30 e7 +@CHECK: e730f211 .thumb div_thumb: udiv r0, r1, r2 @CHECK-LABEL: div_thumb -@CHECK: b1 fb f2 f0 udiv r0, r1, r2 +@CHECK: fbb1 f0f2 udiv r0, r1, r2 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v8a-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v8a-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v8a-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v8a-subarch.s @@ -6,4 +6,4 @@ lda r0, [r1] @ CHECK-LABEL:lda -@ CHECK: 9f 0c 91 e1 lda r0, [r1] +@ CHECK: e1910c9f lda r0, [r1] diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/v8r-subarch.s b/llvm/test/tools/llvm-objdump/ELF/ARM/v8r-subarch.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/v8r-subarch.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/v8r-subarch.s @@ -9,4 +9,4 @@ lda r0, [r1] @ CHECK-LABEL:lda -@ CHECK: 9f 0c 91 e1 lda r0, [r1] +@ CHECK: e1910c9f lda r0, [r1] diff --git a/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test b/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test --- a/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test +++ b/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test @@ -1,3 +1,3 @@ // RUN: llvm-objdump -d %p/Inputs/kextbundle.macho-aarch64 | FileCheck %s -CHECK: 4008: 03 00 00 94 bl 0x4014 <_bar.stub> +CHECK: 4008: 94000003 bl 0x4014 <_bar.stub> diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -466,6 +466,15 @@ OS << format(Fmt.data(), Address) << Name << "\t" << Val; } +static void AlignToInstStartColumn(size_t Start, const MCSubtargetInfo &STI, + raw_ostream &OS) { + // The output of printInst starts with a tab. Print some spaces so that + // the tab has 1 column and advances to the target tab stop. + unsigned TabStop = getInstStartColumn(STI); + unsigned Column = OS.tell() - Start; + OS.indent(Column < TabStop - 1 ? TabStop - 1 - Column : 7 - Column % 8); +} + class PrettyPrinter { public: virtual ~PrettyPrinter() = default; @@ -487,11 +496,7 @@ dumpBytes(Bytes, OS); } - // The output of printInst starts with a tab. Print some spaces so that - // the tab has 1 column and advances to the target tab stop. - unsigned TabStop = getInstStartColumn(STI); - unsigned Column = OS.tell() - Start; - OS.indent(Column < TabStop - 1 ? TabStop - 1 - Column : 7 - Column % 8); + AlignToInstStartColumn(Start, STI, OS); if (MI) { // See MCInstPrinter::printInst. On targets where a PC relative immediate @@ -664,6 +669,91 @@ }; BPFPrettyPrinter BPFPrettyPrinterInst; +class ARMPrettyPrinter : public PrettyPrinter { +public: + void printInst(MCInstPrinter &IP, const MCInst *MI, ArrayRef Bytes, + object::SectionedAddress Address, formatted_raw_ostream &OS, + StringRef Annot, MCSubtargetInfo const &STI, SourcePrinter *SP, + StringRef ObjectFilename, std::vector *Rels, + LiveVariablePrinter &LVP) override { + if (SP && (PrintSource || PrintLines)) + SP->printSourceLine(OS, Address, ObjectFilename, LVP); + LVP.printBetweenInsts(OS, false); + + size_t Start = OS.tell(); + if (LeadingAddr) + OS << format("%8" PRIx64 ":", Address.Address); + if (ShowRawInsn) { + size_t Pos = 0, End = Bytes.size(); + if (STI.checkFeatures("+thumb-mode")) { + for (; Pos + 2 <= End; Pos += 2) + OS << ' ' + << format_hex_no_prefix( + llvm::support::endian::read( + Bytes.data() + Pos, llvm::support::little), + 4); + } else { + for (; Pos + 4 <= End; Pos += 4) + OS << ' ' + << format_hex_no_prefix( + llvm::support::endian::read( + Bytes.data() + Pos, llvm::support::little), + 8); + } + if (Pos < End) { + OS << ' '; + dumpBytes(Bytes.slice(Pos), OS); + } + } + + AlignToInstStartColumn(Start, STI, OS); + + if (MI) { + IP.printInst(MI, Address.Address, "", STI, OS); + } else + OS << "\t"; + } +}; +ARMPrettyPrinter ARMPrettyPrinterInst; + +class AArch64PrettyPrinter : public PrettyPrinter { +public: + void printInst(MCInstPrinter &IP, const MCInst *MI, ArrayRef Bytes, + object::SectionedAddress Address, formatted_raw_ostream &OS, + StringRef Annot, MCSubtargetInfo const &STI, SourcePrinter *SP, + StringRef ObjectFilename, std::vector *Rels, + LiveVariablePrinter &LVP) override { + if (SP && (PrintSource || PrintLines)) + SP->printSourceLine(OS, Address, ObjectFilename, LVP); + LVP.printBetweenInsts(OS, false); + + size_t Start = OS.tell(); + if (LeadingAddr) + OS << format("%8" PRIx64 ":", Address.Address); + if (ShowRawInsn) { + size_t Pos = 0, End = Bytes.size(); + for (; Pos + 4 <= End; Pos += 4) + OS << ' ' + << format_hex_no_prefix( + llvm::support::endian::read(Bytes.data() + Pos, + llvm::support::little), + 8); + if (Pos < End) { + OS << ' '; + dumpBytes(Bytes.slice(Pos), OS); + } + } + + AlignToInstStartColumn(Start, STI, OS); + + if (MI) { + IP.printInst(MI, Address.Address, "", STI, OS); + } else + OS << "\t"; + } +}; +AArch64PrettyPrinter AArch64PrettyPrinterInst; + PrettyPrinter &selectPrettyPrinter(Triple const &Triple) { switch(Triple.getArch()) { default: @@ -675,6 +765,15 @@ case Triple::bpfel: case Triple::bpfeb: return BPFPrettyPrinterInst; + case Triple::arm: + case Triple::armeb: + case Triple::thumb: + case Triple::thumbeb: + return ARMPrettyPrinterInst; + case Triple::aarch64: + case Triple::aarch64_be: + case Triple::aarch64_32: + return AArch64PrettyPrinterInst; } } }