diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -3891,6 +3891,16 @@ translateSetCCForBranch(DL, LHS, RHS, CCVal, DAG); SDValue TargetCC = DAG.getCondCode(CCVal); + + if (isa(TrueV)) { + // (select (setcc lhs, rhs, CC), constant, falsev) + // -> (select (setcc lhs, rhs, OppositeCC), falsev, constant) + TargetCC = + DAG.getCondCode(ISD::getSetCCInverse(CCVal, LHS.getValueType())); + SDValue Ops[] = {LHS, RHS, TargetCC, FalseV, TrueV}; + return DAG.getNode(RISCVISD::SELECT_CC, DL, Op.getValueType(), Ops); + } + SDValue Ops[] = {LHS, RHS, TargetCC, TrueV, FalseV}; return DAG.getNode(RISCVISD::SELECT_CC, DL, Op.getValueType(), Ops); } diff --git a/llvm/test/CodeGen/RISCV/double-convert-strict.ll b/llvm/test/CodeGen/RISCV/double-convert-strict.ll --- a/llvm/test/CodeGen/RISCV/double-convert-strict.ll +++ b/llvm/test/CodeGen/RISCV/double-convert-strict.ll @@ -133,11 +133,10 @@ define i32 @fcvt_wu_d_multiple_use(double %x, i32* %y) nounwind { ; CHECKIFD-LABEL: fcvt_wu_d_multiple_use: ; CHECKIFD: # %bb.0: -; CHECKIFD-NEXT: fcvt.wu.d a1, fa0, rtz -; CHECKIFD-NEXT: li a0, 1 -; CHECKIFD-NEXT: beqz a1, .LBB4_2 +; CHECKIFD-NEXT: fcvt.wu.d a0, fa0, rtz +; CHECKIFD-NEXT: bnez a0, .LBB4_2 ; CHECKIFD-NEXT: # %bb.1: -; CHECKIFD-NEXT: mv a0, a1 +; CHECKIFD-NEXT: li a0, 1 ; CHECKIFD-NEXT: .LBB4_2: ; CHECKIFD-NEXT: ret ; @@ -146,11 +145,9 @@ ; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: call __fixunsdfsi@plt -; RV32I-NEXT: mv a1, a0 -; RV32I-NEXT: li a0, 1 -; RV32I-NEXT: beqz a1, .LBB4_2 +; RV32I-NEXT: bnez a0, .LBB4_2 ; RV32I-NEXT: # %bb.1: -; RV32I-NEXT: mv a0, a1 +; RV32I-NEXT: li a0, 1 ; RV32I-NEXT: .LBB4_2: ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 16 @@ -161,11 +158,9 @@ ; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: call __fixunsdfsi@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, 1 -; RV64I-NEXT: beqz a1, .LBB4_2 +; RV64I-NEXT: bnez a0, .LBB4_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, 1 ; RV64I-NEXT: .LBB4_2: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 diff --git a/llvm/test/CodeGen/RISCV/double-convert.ll b/llvm/test/CodeGen/RISCV/double-convert.ll --- a/llvm/test/CodeGen/RISCV/double-convert.ll +++ b/llvm/test/CodeGen/RISCV/double-convert.ll @@ -108,50 +108,47 @@ ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill -; RV32I-NEXT: mv s1, a1 -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: mv s0, a1 +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: lui a3, 794112 -; RV32I-NEXT: li s0, 0 ; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: call __gedf2@plt ; RV32I-NEXT: mv s3, a0 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __fixdfsi@plt -; RV32I-NEXT: lui s5, 524288 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: lui s4, 524288 -; RV32I-NEXT: blt s3, s0, .LBB3_2 +; RV32I-NEXT: bgez s3, .LBB3_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s4, a0 +; RV32I-NEXT: lui s2, 524288 ; RV32I-NEXT: .LBB3_2: # %start ; RV32I-NEXT: lui a0, 269824 ; RV32I-NEXT: addi a3, a0, -1 ; RV32I-NEXT: lui a2, 1047552 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __gtdf2@plt -; RV32I-NEXT: bge s0, a0, .LBB3_4 -; RV32I-NEXT: # %bb.3: -; RV32I-NEXT: addi s4, s5, -1 +; RV32I-NEXT: blez a0, .LBB3_4 +; RV32I-NEXT: # %bb.3: # %start +; RV32I-NEXT: addi s2, s4, -1 ; RV32I-NEXT: .LBB3_4: # %start -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 -; RV32I-NEXT: mv a2, s2 -; RV32I-NEXT: mv a3, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 +; RV32I-NEXT: mv a2, s1 +; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: call __unorddf2@plt -; RV32I-NEXT: bne a0, s0, .LBB3_6 +; RV32I-NEXT: beqz a0, .LBB3_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s0, s4 +; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: .LBB3_6: # %start -; RV32I-NEXT: mv a0, s0 +; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; @@ -163,7 +160,6 @@ ; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a0, -497 ; RV64I-NEXT: slli a1, a0, 53 @@ -172,12 +168,11 @@ ; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixdfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: lui s4, 524288 +; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: lui s3, 524288 -; RV64I-NEXT: bltz s2, .LBB3_2 +; RV64I-NEXT: bgez s2, .LBB3_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: lui s1, 524288 ; RV64I-NEXT: .LBB3_2: # %start ; RV64I-NEXT: li a0, 527 ; RV64I-NEXT: slli a0, a0, 31 @@ -185,16 +180,16 @@ ; RV64I-NEXT: slli a1, a0, 22 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtdf2@plt -; RV64I-NEXT: bge s1, a0, .LBB3_4 -; RV64I-NEXT: # %bb.3: -; RV64I-NEXT: addiw s3, s4, -1 +; RV64I-NEXT: blez a0, .LBB3_4 +; RV64I-NEXT: # %bb.3: # %start +; RV64I-NEXT: addiw s1, s3, -1 ; RV64I-NEXT: .LBB3_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unorddf2@plt -; RV64I-NEXT: bne a0, s1, .LBB3_6 +; RV64I-NEXT: beqz a0, .LBB3_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s1, s3 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB3_6: # %start ; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload @@ -202,7 +197,6 @@ ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: ret start: @@ -245,11 +239,10 @@ define i32 @fcvt_wu_d_multiple_use(double %x, i32* %y) nounwind { ; CHECKIFD-LABEL: fcvt_wu_d_multiple_use: ; CHECKIFD: # %bb.0: -; CHECKIFD-NEXT: fcvt.wu.d a1, fa0, rtz -; CHECKIFD-NEXT: li a0, 1 -; CHECKIFD-NEXT: beqz a1, .LBB5_2 +; CHECKIFD-NEXT: fcvt.wu.d a0, fa0, rtz +; CHECKIFD-NEXT: bnez a0, .LBB5_2 ; CHECKIFD-NEXT: # %bb.1: -; CHECKIFD-NEXT: mv a0, a1 +; CHECKIFD-NEXT: li a0, 1 ; CHECKIFD-NEXT: .LBB5_2: ; CHECKIFD-NEXT: ret ; @@ -258,11 +251,9 @@ ; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: call __fixunsdfsi@plt -; RV32I-NEXT: mv a1, a0 -; RV32I-NEXT: li a0, 1 -; RV32I-NEXT: beqz a1, .LBB5_2 +; RV32I-NEXT: bnez a0, .LBB5_2 ; RV32I-NEXT: # %bb.1: -; RV32I-NEXT: mv a0, a1 +; RV32I-NEXT: li a0, 1 ; RV32I-NEXT: .LBB5_2: ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 16 @@ -273,11 +264,9 @@ ; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: call __fixunsdfsi@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, 1 -; RV64I-NEXT: beqz a1, .LBB5_2 +; RV64I-NEXT: bnez a0, .LBB5_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, 1 ; RV64I-NEXT: .LBB5_2: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 @@ -323,15 +312,13 @@ ; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: call __fixunsdfsi@plt -; RV32I-NEXT: li a1, 0 -; RV32I-NEXT: bltz s3, .LBB6_2 +; RV32I-NEXT: bgez s3, .LBB6_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv a1, a0 +; RV32I-NEXT: li a0, 0 ; RV32I-NEXT: .LBB6_2: # %start -; RV32I-NEXT: li a0, -1 -; RV32I-NEXT: bgtz s0, .LBB6_4 +; RV32I-NEXT: blez s0, .LBB6_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a0, a1 +; RV32I-NEXT: li a0, -1 ; RV32I-NEXT: .LBB6_4: # %start ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload @@ -354,10 +341,10 @@ ; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunsdfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: bltz s2, .LBB6_2 -; RV64I-NEXT: # %bb.1: # %start ; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB6_2 +; RV64I-NEXT: # %bb.1: # %start +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB6_2: # %start ; RV64I-NEXT: li a0, 1055 ; RV64I-NEXT: slli a0, a0, 31 @@ -366,7 +353,7 @@ ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtdf2@plt ; RV64I-NEXT: blez a0, .LBB6_4 -; RV64I-NEXT: # %bb.3: +; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: srli s1, a0, 32 ; RV64I-NEXT: .LBB6_4: # %start @@ -610,27 +597,25 @@ ; ; RV32I-LABEL: fcvt_l_d_sat: ; RV32I: # %bb.0: # %start -; RV32I-NEXT: addi sp, sp, -48 -; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 40(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s1, 36(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s2, 32(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s3, 28(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s4, 24(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s5, 20(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s6, 16(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s7, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi sp, sp, -32 +; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: lui a0, 278016 -; RV32I-NEXT: addi s3, a0, -1 +; RV32I-NEXT: addi s2, a0, -1 ; RV32I-NEXT: li a2, -1 ; RV32I-NEXT: mv a0, s1 -; RV32I-NEXT: mv a3, s3 +; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: call __gtdf2@plt -; RV32I-NEXT: mv s4, a0 +; RV32I-NEXT: mv s5, a0 ; RV32I-NEXT: lui a3, 802304 -; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: li a2, 0 @@ -639,68 +624,64 @@ ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __fixdfdi@plt -; RV32I-NEXT: mv s5, a1 -; RV32I-NEXT: mv a1, s2 -; RV32I-NEXT: blt s6, s2, .LBB12_2 +; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: mv s4, a1 +; RV32I-NEXT: bgez s6, .LBB12_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv a1, a0 +; RV32I-NEXT: li s3, 0 ; RV32I-NEXT: .LBB12_2: # %start -; RV32I-NEXT: li s6, -1 -; RV32I-NEXT: blt s2, s4, .LBB12_4 +; RV32I-NEXT: blez s5, .LBB12_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s6, a1 +; RV32I-NEXT: li s3, -1 ; RV32I-NEXT: .LBB12_4: # %start ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: call __unorddf2@plt -; RV32I-NEXT: mv s4, s2 -; RV32I-NEXT: bne a0, s2, .LBB12_6 +; RV32I-NEXT: beqz a0, .LBB12_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s4, s6 +; RV32I-NEXT: li s3, 0 ; RV32I-NEXT: .LBB12_6: # %start ; RV32I-NEXT: lui a3, 802304 ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s0 -; RV32I-NEXT: mv a2, s2 +; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: call __gedf2@plt -; RV32I-NEXT: lui s7, 524288 -; RV32I-NEXT: lui s6, 524288 -; RV32I-NEXT: blt a0, s2, .LBB12_8 +; RV32I-NEXT: lui s5, 524288 +; RV32I-NEXT: bgez a0, .LBB12_8 ; RV32I-NEXT: # %bb.7: # %start -; RV32I-NEXT: mv s6, s5 +; RV32I-NEXT: lui s4, 524288 ; RV32I-NEXT: .LBB12_8: # %start ; RV32I-NEXT: li a2, -1 ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s0 -; RV32I-NEXT: mv a3, s3 +; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: call __gtdf2@plt -; RV32I-NEXT: bge s2, a0, .LBB12_10 -; RV32I-NEXT: # %bb.9: -; RV32I-NEXT: addi s6, s7, -1 +; RV32I-NEXT: blez a0, .LBB12_10 +; RV32I-NEXT: # %bb.9: # %start +; RV32I-NEXT: addi s4, s5, -1 ; RV32I-NEXT: .LBB12_10: # %start ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: call __unorddf2@plt -; RV32I-NEXT: bne a0, s2, .LBB12_12 +; RV32I-NEXT: beqz a0, .LBB12_12 ; RV32I-NEXT: # %bb.11: # %start -; RV32I-NEXT: mv s2, s6 +; RV32I-NEXT: li s4, 0 ; RV32I-NEXT: .LBB12_12: # %start -; RV32I-NEXT: mv a0, s4 -; RV32I-NEXT: mv a1, s2 -; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 48 +; RV32I-NEXT: mv a0, s3 +; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_l_d_sat: @@ -711,47 +692,42 @@ ; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a0, -481 ; RV64I-NEXT: slli a1, a0, 53 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gedf2@plt -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixdfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: li s4, -1 -; RV64I-NEXT: bltz s3, .LBB12_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: li s3, -1 +; RV64I-NEXT: bgez s2, .LBB12_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 -; RV64I-NEXT: j .LBB12_3 -; RV64I-NEXT: .LBB12_2: -; RV64I-NEXT: slli s2, s4, 63 -; RV64I-NEXT: .LBB12_3: # %start +; RV64I-NEXT: slli s1, s3, 63 +; RV64I-NEXT: .LBB12_2: # %start ; RV64I-NEXT: li a0, 543 ; RV64I-NEXT: slli a0, a0, 53 ; RV64I-NEXT: addi a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtdf2@plt -; RV64I-NEXT: bge s1, a0, .LBB12_5 -; RV64I-NEXT: # %bb.4: -; RV64I-NEXT: srli s2, s4, 1 -; RV64I-NEXT: .LBB12_5: # %start +; RV64I-NEXT: blez a0, .LBB12_4 +; RV64I-NEXT: # %bb.3: # %start +; RV64I-NEXT: srli s1, s3, 1 +; RV64I-NEXT: .LBB12_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unorddf2@plt -; RV64I-NEXT: bne a0, s1, .LBB12_7 -; RV64I-NEXT: # %bb.6: # %start -; RV64I-NEXT: mv s1, s2 -; RV64I-NEXT: .LBB12_7: # %start +; RV64I-NEXT: beqz a0, .LBB12_6 +; RV64I-NEXT: # %bb.5: # %start +; RV64I-NEXT: li s1, 0 +; RV64I-NEXT: .LBB12_6: # %start ; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: ret start: @@ -859,58 +835,55 @@ ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill -; RV32I-NEXT: mv s1, a1 -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: mv s0, a1 +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: lui a0, 278272 -; RV32I-NEXT: addi s3, a0, -1 +; RV32I-NEXT: addi s2, a0, -1 ; RV32I-NEXT: li a2, -1 -; RV32I-NEXT: li s0, -1 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a3, s3 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: call __gtdf2@plt -; RV32I-NEXT: mv s6, a0 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv s5, a0 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: li a3, 0 ; RV32I-NEXT: call __gedf2@plt -; RV32I-NEXT: mv s4, a0 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv s6, a0 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __fixunsdfdi@plt -; RV32I-NEXT: mv s5, a1 -; RV32I-NEXT: li a1, 0 -; RV32I-NEXT: bltz s4, .LBB14_2 +; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: mv s4, a1 +; RV32I-NEXT: bgez s6, .LBB14_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv a1, a0 +; RV32I-NEXT: li s3, 0 ; RV32I-NEXT: .LBB14_2: # %start -; RV32I-NEXT: li s4, -1 -; RV32I-NEXT: bgtz s6, .LBB14_4 +; RV32I-NEXT: blez s5, .LBB14_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s4, a1 +; RV32I-NEXT: li s3, -1 ; RV32I-NEXT: .LBB14_4: # %start ; RV32I-NEXT: li a2, -1 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 -; RV32I-NEXT: mv a3, s3 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 +; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: call __gtdf2@plt -; RV32I-NEXT: mv s3, a0 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: li a3, 0 ; RV32I-NEXT: call __gedf2@plt -; RV32I-NEXT: li a1, 0 -; RV32I-NEXT: bltz a0, .LBB14_6 +; RV32I-NEXT: bgez a0, .LBB14_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv a1, s5 +; RV32I-NEXT: li s4, 0 ; RV32I-NEXT: .LBB14_6: # %start -; RV32I-NEXT: bgtz s3, .LBB14_8 +; RV32I-NEXT: blez s2, .LBB14_8 ; RV32I-NEXT: # %bb.7: # %start -; RV32I-NEXT: mv s0, a1 +; RV32I-NEXT: li s4, -1 ; RV32I-NEXT: .LBB14_8: # %start -; RV32I-NEXT: mv a0, s4 -; RV32I-NEXT: mv a1, s0 +; RV32I-NEXT: mv a0, s3 +; RV32I-NEXT: mv a1, s4 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload @@ -932,25 +905,24 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gedf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunsdfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB14_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB14_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB14_2: # %start ; RV64I-NEXT: li a0, 1087 ; RV64I-NEXT: slli a0, a0, 52 ; RV64I-NEXT: addi a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtdf2@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, -1 -; RV64I-NEXT: bgtz a1, .LBB14_4 +; RV64I-NEXT: blez a0, .LBB14_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a0, s2 +; RV64I-NEXT: li s1, -1 ; RV64I-NEXT: .LBB14_4: # %start +; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -1414,100 +1386,94 @@ ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill -; RV32I-NEXT: mv s1, a1 -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: mv s0, a1 +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: lui a3, 790016 -; RV32I-NEXT: li s0, 0 ; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: call __gedf2@plt ; RV32I-NEXT: mv s3, a0 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __fixdfsi@plt -; RV32I-NEXT: lui s4, 1048568 -; RV32I-NEXT: blt s3, s0, .LBB26_2 +; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: bgez s3, .LBB26_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s4, a0 +; RV32I-NEXT: lui s2, 1048568 ; RV32I-NEXT: .LBB26_2: # %start ; RV32I-NEXT: lui a0, 265728 ; RV32I-NEXT: addi a3, a0, -64 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 -; RV32I-NEXT: mv a2, s0 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 +; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: call __gtdf2@plt -; RV32I-NEXT: bge s0, a0, .LBB26_4 -; RV32I-NEXT: # %bb.3: +; RV32I-NEXT: blez a0, .LBB26_4 +; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: lui a0, 8 -; RV32I-NEXT: addi s4, a0, -1 +; RV32I-NEXT: addi s2, a0, -1 ; RV32I-NEXT: .LBB26_4: # %start -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 -; RV32I-NEXT: mv a2, s2 -; RV32I-NEXT: mv a3, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 +; RV32I-NEXT: mv a2, s1 +; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: call __unorddf2@plt -; RV32I-NEXT: bne a0, s0, .LBB26_6 +; RV32I-NEXT: beqz a0, .LBB26_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s0, s4 +; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: .LBB26_6: # %start -; RV32I-NEXT: slli a0, s0, 16 +; RV32I-NEXT: slli a0, s2, 16 ; RV32I-NEXT: srai a0, a0, 16 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_w_s_sat_i16: ; RV64I: # %bb.0: # %start -; RV64I-NEXT: addi sp, sp, -48 -; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a0, -505 ; RV64I-NEXT: slli a1, a0, 53 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gedf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixdfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: lui s3, 1048568 -; RV64I-NEXT: bltz s1, .LBB26_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB26_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: lui s1, 1048568 ; RV64I-NEXT: .LBB26_2: # %start ; RV64I-NEXT: lui a0, 4152 ; RV64I-NEXT: addiw a0, a0, -1 ; RV64I-NEXT: slli a1, a0, 38 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtdf2@plt -; RV64I-NEXT: bge s2, a0, .LBB26_4 -; RV64I-NEXT: # %bb.3: +; RV64I-NEXT: blez a0, .LBB26_4 +; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: lui a0, 8 -; RV64I-NEXT: addiw s3, a0, -1 +; RV64I-NEXT: addiw s1, a0, -1 ; RV64I-NEXT: .LBB26_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unorddf2@plt -; RV64I-NEXT: bne a0, s2, .LBB26_6 +; RV64I-NEXT: beqz a0, .LBB26_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s2, s3 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB26_6: # %start -; RV64I-NEXT: slli a0, s2, 48 +; RV64I-NEXT: slli a0, s1, 48 ; RV64I-NEXT: srai a0, a0, 48 -; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 48 +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret start: %0 = tail call i16 @llvm.fptosi.sat.i16.f64(double %a) @@ -1593,19 +1559,17 @@ ; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: call __fixunsdfsi@plt -; RV32I-NEXT: li a1, 0 -; RV32I-NEXT: bltz s3, .LBB28_2 +; RV32I-NEXT: bgez s3, .LBB28_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv a1, a0 +; RV32I-NEXT: li a0, 0 ; RV32I-NEXT: .LBB28_2: # %start -; RV32I-NEXT: lui a0, 16 -; RV32I-NEXT: addi a0, a0, -1 -; RV32I-NEXT: mv a2, a0 -; RV32I-NEXT: bgtz s0, .LBB28_4 +; RV32I-NEXT: lui a1, 16 +; RV32I-NEXT: addi a1, a1, -1 +; RV32I-NEXT: blez s0, .LBB28_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a2, a1 +; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: .LBB28_4: # %start -; RV32I-NEXT: and a0, a2, a0 +; RV32I-NEXT: and a0, a0, a1 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload @@ -1624,13 +1588,13 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gedf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunsdfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB28_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB28_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB28_2: # %start ; RV64I-NEXT: lui a0, 8312 ; RV64I-NEXT: addiw a0, a0, -1 @@ -1639,12 +1603,11 @@ ; RV64I-NEXT: call __gtdf2@plt ; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: addiw a1, a1, -1 -; RV64I-NEXT: mv a2, a1 -; RV64I-NEXT: bgtz a0, .LBB28_4 +; RV64I-NEXT: blez a0, .LBB28_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a2, s2 +; RV64I-NEXT: mv s1, a1 ; RV64I-NEXT: .LBB28_4: # %start -; RV64I-NEXT: and a0, a2, a1 +; RV64I-NEXT: and a0, s1, a1 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -1728,98 +1691,90 @@ ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill -; RV32I-NEXT: mv s1, a1 -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: mv s0, a1 +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: lui a3, 787968 -; RV32I-NEXT: li s0, 0 ; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: call __gedf2@plt ; RV32I-NEXT: mv s3, a0 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __fixdfsi@plt -; RV32I-NEXT: li s4, -128 -; RV32I-NEXT: blt s3, s0, .LBB30_2 +; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: bgez s3, .LBB30_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s4, a0 +; RV32I-NEXT: li s2, -128 ; RV32I-NEXT: .LBB30_2: # %start ; RV32I-NEXT: lui a3, 263676 -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 -; RV32I-NEXT: mv a2, s0 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 +; RV32I-NEXT: li a2, 0 ; RV32I-NEXT: call __gtdf2@plt -; RV32I-NEXT: li s3, 127 -; RV32I-NEXT: blt s0, a0, .LBB30_4 +; RV32I-NEXT: blez a0, .LBB30_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s3, s4 +; RV32I-NEXT: li s2, 127 ; RV32I-NEXT: .LBB30_4: # %start -; RV32I-NEXT: mv a0, s2 -; RV32I-NEXT: mv a1, s1 -; RV32I-NEXT: mv a2, s2 -; RV32I-NEXT: mv a3, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s0 +; RV32I-NEXT: mv a2, s1 +; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: call __unorddf2@plt -; RV32I-NEXT: bne a0, s0, .LBB30_6 +; RV32I-NEXT: beqz a0, .LBB30_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s0, s3 +; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: .LBB30_6: # %start -; RV32I-NEXT: slli a0, s0, 24 +; RV32I-NEXT: slli a0, s2, 24 ; RV32I-NEXT: srai a0, a0, 24 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_w_s_sat_i8: ; RV64I: # %bb.0: # %start -; RV64I-NEXT: addi sp, sp, -48 -; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a0, -509 ; RV64I-NEXT: slli a1, a0, 53 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gedf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixdfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: li s3, -128 -; RV64I-NEXT: bltz s1, .LBB30_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB30_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: li s1, -128 ; RV64I-NEXT: .LBB30_2: # %start ; RV64I-NEXT: lui a0, 65919 ; RV64I-NEXT: slli a1, a0, 34 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtdf2@plt -; RV64I-NEXT: li s1, 127 -; RV64I-NEXT: blt s2, a0, .LBB30_4 +; RV64I-NEXT: blez a0, .LBB30_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv s1, s3 +; RV64I-NEXT: li s1, 127 ; RV64I-NEXT: .LBB30_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unorddf2@plt -; RV64I-NEXT: bne a0, s2, .LBB30_6 +; RV64I-NEXT: beqz a0, .LBB30_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s2, s1 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB30_6: # %start -; RV64I-NEXT: slli a0, s2, 56 +; RV64I-NEXT: slli a0, s1, 56 ; RV64I-NEXT: srai a0, a0, 56 -; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 48 +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret start: %0 = tail call i8 @llvm.fptosi.sat.i8.f64(double %a) @@ -1907,15 +1862,13 @@ ; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: call __fixunsdfsi@plt -; RV32I-NEXT: li a1, 0 -; RV32I-NEXT: bltz s3, .LBB32_2 +; RV32I-NEXT: bgez s3, .LBB32_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv a1, a0 +; RV32I-NEXT: li a0, 0 ; RV32I-NEXT: .LBB32_2: # %start -; RV32I-NEXT: li a0, 255 -; RV32I-NEXT: bgtz s0, .LBB32_4 +; RV32I-NEXT: blez s0, .LBB32_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a0, a1 +; RV32I-NEXT: li a0, 255 ; RV32I-NEXT: .LBB32_4: # %start ; RV32I-NEXT: andi a0, a0, 255 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload @@ -1936,24 +1889,23 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gedf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunsdfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB32_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB32_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB32_2: # %start ; RV64I-NEXT: lui a0, 131967 ; RV64I-NEXT: slli a1, a0, 33 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtdf2@plt -; RV64I-NEXT: li a1, 255 -; RV64I-NEXT: bgtz a0, .LBB32_4 +; RV64I-NEXT: blez a0, .LBB32_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a1, s2 +; RV64I-NEXT: li s1, 255 ; RV64I-NEXT: .LBB32_4: # %start -; RV64I-NEXT: andi a0, a1, 255 +; RV64I-NEXT: andi a0, s1, 255 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload diff --git a/llvm/test/CodeGen/RISCV/float-convert-strict.ll b/llvm/test/CodeGen/RISCV/float-convert-strict.ll --- a/llvm/test/CodeGen/RISCV/float-convert-strict.ll +++ b/llvm/test/CodeGen/RISCV/float-convert-strict.ll @@ -75,11 +75,10 @@ define i32 @fcvt_wu_s_multiple_use(float %x, i32* %y) nounwind { ; CHECKIF-LABEL: fcvt_wu_s_multiple_use: ; CHECKIF: # %bb.0: -; CHECKIF-NEXT: fcvt.wu.s a1, fa0, rtz -; CHECKIF-NEXT: li a0, 1 -; CHECKIF-NEXT: beqz a1, .LBB2_2 +; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rtz +; CHECKIF-NEXT: bnez a0, .LBB2_2 ; CHECKIF-NEXT: # %bb.1: -; CHECKIF-NEXT: mv a0, a1 +; CHECKIF-NEXT: li a0, 1 ; CHECKIF-NEXT: .LBB2_2: ; CHECKIF-NEXT: ret ; @@ -88,11 +87,9 @@ ; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: mv a1, a0 -; RV32I-NEXT: li a0, 1 -; RV32I-NEXT: beqz a1, .LBB2_2 +; RV32I-NEXT: bnez a0, .LBB2_2 ; RV32I-NEXT: # %bb.1: -; RV32I-NEXT: mv a0, a1 +; RV32I-NEXT: li a0, 1 ; RV32I-NEXT: .LBB2_2: ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 16 @@ -103,11 +100,9 @@ ; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: call __fixunssfsi@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, 1 -; RV64I-NEXT: beqz a1, .LBB2_2 +; RV64I-NEXT: bnez a0, .LBB2_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, 1 ; RV64I-NEXT: .LBB2_2: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 diff --git a/llvm/test/CodeGen/RISCV/float-convert.ll b/llvm/test/CodeGen/RISCV/float-convert.ll --- a/llvm/test/CodeGen/RISCV/float-convert.ll +++ b/llvm/test/CodeGen/RISCV/float-convert.ll @@ -53,34 +53,32 @@ ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: lui a1, 847872 ; RV32I-NEXT: call __gesf2@plt ; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfsi@plt -; RV32I-NEXT: li s1, 0 -; RV32I-NEXT: lui s4, 524288 +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: lui s3, 524288 -; RV32I-NEXT: bltz s2, .LBB1_2 +; RV32I-NEXT: bgez s2, .LBB1_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: lui s1, 524288 ; RV32I-NEXT: .LBB1_2: # %start ; RV32I-NEXT: lui a0, 323584 ; RV32I-NEXT: addi a1, a0, -1 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bge s1, a0, .LBB1_4 -; RV32I-NEXT: # %bb.3: -; RV32I-NEXT: addi s3, s4, -1 +; RV32I-NEXT: blez a0, .LBB1_4 +; RV32I-NEXT: # %bb.3: # %start +; RV32I-NEXT: addi s1, s3, -1 ; RV32I-NEXT: .LBB1_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s1, .LBB1_6 +; RV32I-NEXT: beqz a0, .LBB1_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s1, s3 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB1_6: # %start ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload @@ -88,7 +86,6 @@ ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; @@ -100,34 +97,32 @@ ; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: lui a1, 847872 ; RV64I-NEXT: call __gesf2@plt ; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: lui s4, 524288 +; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: lui s3, 524288 -; RV64I-NEXT: bltz s2, .LBB1_2 +; RV64I-NEXT: bgez s2, .LBB1_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: lui s1, 524288 ; RV64I-NEXT: .LBB1_2: # %start ; RV64I-NEXT: lui a0, 323584 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bge s1, a0, .LBB1_4 -; RV64I-NEXT: # %bb.3: -; RV64I-NEXT: addiw s3, s4, -1 +; RV64I-NEXT: blez a0, .LBB1_4 +; RV64I-NEXT: # %bb.3: # %start +; RV64I-NEXT: addiw s1, s3, -1 ; RV64I-NEXT: .LBB1_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s1, .LBB1_6 +; RV64I-NEXT: beqz a0, .LBB1_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s1, s3 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB1_6: # %start ; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload @@ -135,7 +130,6 @@ ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: ret start: @@ -176,11 +170,10 @@ define i32 @fcvt_wu_s_multiple_use(float %x, i32* %y) nounwind { ; CHECKIF-LABEL: fcvt_wu_s_multiple_use: ; CHECKIF: # %bb.0: -; CHECKIF-NEXT: fcvt.wu.s a1, fa0, rtz -; CHECKIF-NEXT: li a0, 1 -; CHECKIF-NEXT: beqz a1, .LBB3_2 +; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rtz +; CHECKIF-NEXT: bnez a0, .LBB3_2 ; CHECKIF-NEXT: # %bb.1: -; CHECKIF-NEXT: mv a0, a1 +; CHECKIF-NEXT: li a0, 1 ; CHECKIF-NEXT: .LBB3_2: ; CHECKIF-NEXT: ret ; @@ -189,11 +182,9 @@ ; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: mv a1, a0 -; RV32I-NEXT: li a0, 1 -; RV32I-NEXT: beqz a1, .LBB3_2 +; RV32I-NEXT: bnez a0, .LBB3_2 ; RV32I-NEXT: # %bb.1: -; RV32I-NEXT: mv a0, a1 +; RV32I-NEXT: li a0, 1 ; RV32I-NEXT: .LBB3_2: ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 16 @@ -204,11 +195,9 @@ ; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: call __fixunssfsi@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, 1 -; RV64I-NEXT: beqz a1, .LBB3_2 +; RV64I-NEXT: bnez a0, .LBB3_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, 1 ; RV64I-NEXT: .LBB3_2: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 @@ -239,24 +228,23 @@ ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: bltz s1, .LBB4_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB4_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB4_2: # %start ; RV32I-NEXT: lui a0, 325632 ; RV32I-NEXT: addi a1, a0, -1 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: mv a1, a0 -; RV32I-NEXT: li a0, -1 -; RV32I-NEXT: bgtz a1, .LBB4_4 +; RV32I-NEXT: blez a0, .LBB4_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a0, s2 +; RV32I-NEXT: li s1, -1 ; RV32I-NEXT: .LBB4_4: # %start +; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload @@ -277,17 +265,17 @@ ; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: bltz s2, .LBB4_2 -; RV64I-NEXT: # %bb.1: # %start ; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB4_2 +; RV64I-NEXT: # %bb.1: # %start +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB4_2: # %start ; RV64I-NEXT: lui a0, 325632 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: blez a0, .LBB4_4 -; RV64I-NEXT: # %bb.3: +; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: srli s1, a0, 32 ; RV64I-NEXT: .LBB4_4: # %start @@ -600,72 +588,64 @@ ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: lui a1, 913408 ; RV32I-NEXT: call __gesf2@plt ; RV32I-NEXT: mv s3, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfdi@plt +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s2, a1 -; RV32I-NEXT: li s1, 0 -; RV32I-NEXT: li s5, 0 -; RV32I-NEXT: bltz s3, .LBB12_2 +; RV32I-NEXT: bgez s3, .LBB12_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s5, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB12_2: # %start ; RV32I-NEXT: lui a0, 389120 -; RV32I-NEXT: addi s4, a0, -1 +; RV32I-NEXT: addi s3, a0, -1 ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li s6, -1 -; RV32I-NEXT: blt s1, a0, .LBB12_4 +; RV32I-NEXT: blez a0, .LBB12_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s6, s5 +; RV32I-NEXT: li s1, -1 ; RV32I-NEXT: .LBB12_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: mv s3, s1 -; RV32I-NEXT: bne a0, s1, .LBB12_6 +; RV32I-NEXT: beqz a0, .LBB12_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s3, s6 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB12_6: # %start ; RV32I-NEXT: lui a1, 913408 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: lui s6, 524288 -; RV32I-NEXT: lui s5, 524288 -; RV32I-NEXT: blt a0, s1, .LBB12_8 +; RV32I-NEXT: lui s4, 524288 +; RV32I-NEXT: bgez a0, .LBB12_8 ; RV32I-NEXT: # %bb.7: # %start -; RV32I-NEXT: mv s5, s2 +; RV32I-NEXT: lui s2, 524288 ; RV32I-NEXT: .LBB12_8: # %start ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bge s1, a0, .LBB12_10 -; RV32I-NEXT: # %bb.9: -; RV32I-NEXT: addi s5, s6, -1 +; RV32I-NEXT: blez a0, .LBB12_10 +; RV32I-NEXT: # %bb.9: # %start +; RV32I-NEXT: addi s2, s4, -1 ; RV32I-NEXT: .LBB12_10: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s1, .LBB12_12 +; RV32I-NEXT: beqz a0, .LBB12_12 ; RV32I-NEXT: # %bb.11: # %start -; RV32I-NEXT: mv s1, s5 +; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: .LBB12_12: # %start -; RV32I-NEXT: mv a0, s3 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; @@ -677,44 +657,39 @@ ; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: lui a1, 913408 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: li s4, -1 -; RV64I-NEXT: bltz s3, .LBB12_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: li s3, -1 +; RV64I-NEXT: bgez s2, .LBB12_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 -; RV64I-NEXT: j .LBB12_3 -; RV64I-NEXT: .LBB12_2: -; RV64I-NEXT: slli s2, s4, 63 -; RV64I-NEXT: .LBB12_3: # %start +; RV64I-NEXT: slli s1, s3, 63 +; RV64I-NEXT: .LBB12_2: # %start ; RV64I-NEXT: lui a0, 389120 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bge s1, a0, .LBB12_5 -; RV64I-NEXT: # %bb.4: -; RV64I-NEXT: srli s2, s4, 1 -; RV64I-NEXT: .LBB12_5: # %start +; RV64I-NEXT: blez a0, .LBB12_4 +; RV64I-NEXT: # %bb.3: # %start +; RV64I-NEXT: srli s1, s3, 1 +; RV64I-NEXT: .LBB12_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s1, .LBB12_7 -; RV64I-NEXT: # %bb.6: # %start -; RV64I-NEXT: mv s1, s2 -; RV64I-NEXT: .LBB12_7: # %start +; RV64I-NEXT: beqz a0, .LBB12_6 +; RV64I-NEXT: # %bb.5: # %start +; RV64I-NEXT: li s1, 0 +; RV64I-NEXT: .LBB12_6: # %start ; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: ret start: @@ -819,55 +794,48 @@ ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: mv s3, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfdi@plt -; RV32I-NEXT: mv s1, a1 -; RV32I-NEXT: li s5, 0 -; RV32I-NEXT: bltz s2, .LBB14_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a1 +; RV32I-NEXT: bgez s3, .LBB14_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s5, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB14_2: # %start ; RV32I-NEXT: lui a0, 391168 -; RV32I-NEXT: addi s4, a0, -1 +; RV32I-NEXT: addi s3, a0, -1 ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li s2, -1 -; RV32I-NEXT: li s3, -1 -; RV32I-NEXT: bgtz a0, .LBB14_4 +; RV32I-NEXT: blez a0, .LBB14_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s3, s5 +; RV32I-NEXT: li s1, -1 ; RV32I-NEXT: .LBB14_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: li s5, 0 -; RV32I-NEXT: bltz a0, .LBB14_6 +; RV32I-NEXT: bgez a0, .LBB14_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s5, s1 +; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: .LBB14_6: # %start ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bgtz a0, .LBB14_8 +; RV32I-NEXT: blez a0, .LBB14_8 ; RV32I-NEXT: # %bb.7: # %start -; RV32I-NEXT: mv s2, s5 +; RV32I-NEXT: li s2, -1 ; RV32I-NEXT: .LBB14_8: # %start -; RV32I-NEXT: mv a0, s3 +; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; @@ -881,24 +849,23 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB14_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB14_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB14_2: # %start ; RV64I-NEXT: lui a0, 391168 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, -1 -; RV64I-NEXT: bgtz a1, .LBB14_4 +; RV64I-NEXT: blez a0, .LBB14_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a0, s2 +; RV64I-NEXT: li s1, -1 ; RV64I-NEXT: .LBB14_4: # %start +; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -1270,94 +1237,88 @@ ; ; RV32I-LABEL: fcvt_w_s_sat_i16: ; RV32I: # %bb.0: # %start -; RV32I-NEXT: addi sp, sp, -32 -; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: lui a1, 815104 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: lui s3, 1048568 -; RV32I-NEXT: bltz s1, .LBB24_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB24_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: lui s1, 1048568 ; RV32I-NEXT: .LBB24_2: # %start ; RV32I-NEXT: lui a0, 290816 ; RV32I-NEXT: addi a1, a0, -512 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bge s2, a0, .LBB24_4 -; RV32I-NEXT: # %bb.3: +; RV32I-NEXT: blez a0, .LBB24_4 +; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: lui a0, 8 -; RV32I-NEXT: addi s3, a0, -1 +; RV32I-NEXT: addi s1, a0, -1 ; RV32I-NEXT: .LBB24_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s2, .LBB24_6 +; RV32I-NEXT: beqz a0, .LBB24_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s2, s3 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB24_6: # %start -; RV32I-NEXT: slli a0, s2, 16 +; RV32I-NEXT: slli a0, s1, 16 ; RV32I-NEXT: srai a0, a0, 16 -; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 32 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_w_s_sat_i16: ; RV64I: # %bb.0: # %start -; RV64I-NEXT: addi sp, sp, -48 -; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: lui a1, 815104 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: lui s3, 1048568 -; RV64I-NEXT: bltz s1, .LBB24_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB24_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: lui s1, 1048568 ; RV64I-NEXT: .LBB24_2: # %start ; RV64I-NEXT: lui a0, 290816 ; RV64I-NEXT: addiw a1, a0, -512 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bge s2, a0, .LBB24_4 -; RV64I-NEXT: # %bb.3: +; RV64I-NEXT: blez a0, .LBB24_4 +; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: lui a0, 8 -; RV64I-NEXT: addiw s3, a0, -1 +; RV64I-NEXT: addiw s1, a0, -1 ; RV64I-NEXT: .LBB24_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s2, .LBB24_6 +; RV64I-NEXT: beqz a0, .LBB24_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s2, s3 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB24_6: # %start -; RV64I-NEXT: slli a0, s2, 48 +; RV64I-NEXT: slli a0, s1, 48 ; RV64I-NEXT: srai a0, a0, 48 -; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 48 +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret start: %0 = tail call i16 @llvm.fptosi.sat.i16.f32(float %a) @@ -1428,13 +1389,13 @@ ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: bltz s1, .LBB26_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB26_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB26_2: # %start ; RV32I-NEXT: lui a0, 292864 ; RV32I-NEXT: addi a1, a0, -256 @@ -1442,12 +1403,11 @@ ; RV32I-NEXT: call __gtsf2@plt ; RV32I-NEXT: lui a1, 16 ; RV32I-NEXT: addi a1, a1, -1 -; RV32I-NEXT: mv a2, a1 -; RV32I-NEXT: bgtz a0, .LBB26_4 +; RV32I-NEXT: blez a0, .LBB26_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a2, s2 +; RV32I-NEXT: mv s1, a1 ; RV32I-NEXT: .LBB26_4: # %start -; RV32I-NEXT: and a0, a2, a1 +; RV32I-NEXT: and a0, s1, a1 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload @@ -1465,13 +1425,13 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB26_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB26_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB26_2: # %start ; RV64I-NEXT: lui a0, 292864 ; RV64I-NEXT: addiw a1, a0, -256 @@ -1479,12 +1439,11 @@ ; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: addiw a1, a1, -1 -; RV64I-NEXT: mv a2, a1 -; RV64I-NEXT: bgtz a0, .LBB26_4 +; RV64I-NEXT: blez a0, .LBB26_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a2, s2 +; RV64I-NEXT: mv s1, a1 ; RV64I-NEXT: .LBB26_4: # %start -; RV64I-NEXT: and a0, a2, a1 +; RV64I-NEXT: and a0, s1, a1 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -1562,92 +1521,84 @@ ; ; RV32I-LABEL: fcvt_w_s_sat_i8: ; RV32I: # %bb.0: # %start -; RV32I-NEXT: addi sp, sp, -32 -; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: lui a1, 798720 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: li s3, -128 -; RV32I-NEXT: bltz s1, .LBB28_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB28_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: li s1, -128 ; RV32I-NEXT: .LBB28_2: # %start ; RV32I-NEXT: lui a1, 274400 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li s1, 127 -; RV32I-NEXT: blt s2, a0, .LBB28_4 +; RV32I-NEXT: blez a0, .LBB28_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s1, s3 +; RV32I-NEXT: li s1, 127 ; RV32I-NEXT: .LBB28_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s2, .LBB28_6 +; RV32I-NEXT: beqz a0, .LBB28_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s2, s1 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB28_6: # %start -; RV32I-NEXT: slli a0, s2, 24 +; RV32I-NEXT: slli a0, s1, 24 ; RV32I-NEXT: srai a0, a0, 24 -; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 32 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_w_s_sat_i8: ; RV64I: # %bb.0: # %start -; RV64I-NEXT: addi sp, sp, -48 -; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: lui a1, 798720 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: li s3, -128 -; RV64I-NEXT: bltz s1, .LBB28_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB28_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: li s1, -128 ; RV64I-NEXT: .LBB28_2: # %start ; RV64I-NEXT: lui a1, 274400 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: li s1, 127 -; RV64I-NEXT: blt s2, a0, .LBB28_4 +; RV64I-NEXT: blez a0, .LBB28_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv s1, s3 +; RV64I-NEXT: li s1, 127 ; RV64I-NEXT: .LBB28_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s2, .LBB28_6 +; RV64I-NEXT: beqz a0, .LBB28_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s2, s1 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB28_6: # %start -; RV64I-NEXT: slli a0, s2, 56 +; RV64I-NEXT: slli a0, s1, 56 ; RV64I-NEXT: srai a0, a0, 56 -; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 48 +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret start: %0 = tail call i8 @llvm.fptosi.sat.i8.f32(float %a) @@ -1718,23 +1669,22 @@ ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: bltz s1, .LBB30_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB30_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB30_2: # %start ; RV32I-NEXT: lui a1, 276464 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li a1, 255 -; RV32I-NEXT: bgtz a0, .LBB30_4 +; RV32I-NEXT: blez a0, .LBB30_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a1, s2 +; RV32I-NEXT: li s1, 255 ; RV32I-NEXT: .LBB30_4: # %start -; RV32I-NEXT: andi a0, a1, 255 +; RV32I-NEXT: andi a0, s1, 255 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload @@ -1752,23 +1702,22 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB30_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB30_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB30_2: # %start ; RV64I-NEXT: lui a1, 276464 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: li a1, 255 -; RV64I-NEXT: bgtz a0, .LBB30_4 +; RV64I-NEXT: blez a0, .LBB30_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a1, s2 +; RV64I-NEXT: li s1, 255 ; RV64I-NEXT: .LBB30_4: # %start -; RV64I-NEXT: andi a0, a1, 255 +; RV64I-NEXT: andi a0, s1, 255 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload diff --git a/llvm/test/CodeGen/RISCV/fpclamptosat.ll b/llvm/test/CodeGen/RISCV/fpclamptosat.ll --- a/llvm/test/CodeGen/RISCV/fpclamptosat.ll +++ b/llvm/test/CodeGen/RISCV/fpclamptosat.ll @@ -1274,24 +1274,23 @@ ; RV32IF-NEXT: addi a0, sp, 8 ; RV32IF-NEXT: call __fixunsdfti@plt ; RV32IF-NEXT: lw a0, 20(sp) -; RV32IF-NEXT: lw a1, 16(sp) +; RV32IF-NEXT: lw a2, 16(sp) ; RV32IF-NEXT: beqz a0, .LBB19_2 ; RV32IF-NEXT: # %bb.1: # %entry -; RV32IF-NEXT: li a2, 0 +; RV32IF-NEXT: li a1, 0 ; RV32IF-NEXT: j .LBB19_3 ; RV32IF-NEXT: .LBB19_2: -; RV32IF-NEXT: seqz a2, a1 +; RV32IF-NEXT: seqz a1, a2 ; RV32IF-NEXT: .LBB19_3: # %entry -; RV32IF-NEXT: xori a1, a1, 1 -; RV32IF-NEXT: or a1, a1, a0 -; RV32IF-NEXT: li a0, 0 -; RV32IF-NEXT: beqz a1, .LBB19_5 +; RV32IF-NEXT: xori a2, a2, 1 +; RV32IF-NEXT: or a0, a2, a0 +; RV32IF-NEXT: bnez a0, .LBB19_5 ; RV32IF-NEXT: # %bb.4: # %entry -; RV32IF-NEXT: mv a0, a2 +; RV32IF-NEXT: li a1, 0 ; RV32IF-NEXT: .LBB19_5: # %entry -; RV32IF-NEXT: bnez a0, .LBB19_7 +; RV32IF-NEXT: bnez a1, .LBB19_7 ; RV32IF-NEXT: # %bb.6: # %entry -; RV32IF-NEXT: li a1, 0 +; RV32IF-NEXT: li a0, 0 ; RV32IF-NEXT: j .LBB19_8 ; RV32IF-NEXT: .LBB19_7: ; RV32IF-NEXT: lw a1, 12(sp) @@ -1325,24 +1324,23 @@ ; RV32IFD-NEXT: addi a0, sp, 8 ; RV32IFD-NEXT: call __fixunsdfti@plt ; RV32IFD-NEXT: lw a0, 20(sp) -; RV32IFD-NEXT: lw a1, 16(sp) +; RV32IFD-NEXT: lw a2, 16(sp) ; RV32IFD-NEXT: beqz a0, .LBB19_2 ; RV32IFD-NEXT: # %bb.1: # %entry -; RV32IFD-NEXT: li a2, 0 +; RV32IFD-NEXT: li a1, 0 ; RV32IFD-NEXT: j .LBB19_3 ; RV32IFD-NEXT: .LBB19_2: -; RV32IFD-NEXT: seqz a2, a1 +; RV32IFD-NEXT: seqz a1, a2 ; RV32IFD-NEXT: .LBB19_3: # %entry -; RV32IFD-NEXT: xori a1, a1, 1 -; RV32IFD-NEXT: or a1, a1, a0 -; RV32IFD-NEXT: li a0, 0 -; RV32IFD-NEXT: beqz a1, .LBB19_5 +; RV32IFD-NEXT: xori a2, a2, 1 +; RV32IFD-NEXT: or a0, a2, a0 +; RV32IFD-NEXT: bnez a0, .LBB19_5 ; RV32IFD-NEXT: # %bb.4: # %entry -; RV32IFD-NEXT: mv a0, a2 +; RV32IFD-NEXT: li a1, 0 ; RV32IFD-NEXT: .LBB19_5: # %entry -; RV32IFD-NEXT: bnez a0, .LBB19_7 +; RV32IFD-NEXT: bnez a1, .LBB19_7 ; RV32IFD-NEXT: # %bb.6: # %entry -; RV32IFD-NEXT: li a1, 0 +; RV32IFD-NEXT: li a0, 0 ; RV32IFD-NEXT: j .LBB19_8 ; RV32IFD-NEXT: .LBB19_7: ; RV32IFD-NEXT: lw a1, 12(sp) @@ -1380,15 +1378,14 @@ ; RV32IF-NEXT: seqz a0, a3 ; RV32IF-NEXT: .LBB20_3: # %entry ; RV32IF-NEXT: xori a1, a3, 1 -; RV32IF-NEXT: or a4, a1, a2 -; RV32IF-NEXT: li a1, 0 -; RV32IF-NEXT: beqz a4, .LBB20_5 +; RV32IF-NEXT: or a1, a1, a2 +; RV32IF-NEXT: bnez a1, .LBB20_5 ; RV32IF-NEXT: # %bb.4: # %entry -; RV32IF-NEXT: mv a1, a0 +; RV32IF-NEXT: li a0, 0 ; RV32IF-NEXT: .LBB20_5: # %entry -; RV32IF-NEXT: bnez a1, .LBB20_9 +; RV32IF-NEXT: bnez a0, .LBB20_9 ; RV32IF-NEXT: # %bb.6: # %entry -; RV32IF-NEXT: li a0, 0 +; RV32IF-NEXT: li a1, 0 ; RV32IF-NEXT: li a2, 0 ; RV32IF-NEXT: li a3, 1 ; RV32IF-NEXT: bnez a2, .LBB20_10 @@ -1468,15 +1465,14 @@ ; RV32IFD-NEXT: seqz a0, a3 ; RV32IFD-NEXT: .LBB20_3: # %entry ; RV32IFD-NEXT: xori a1, a3, 1 -; RV32IFD-NEXT: or a4, a1, a2 -; RV32IFD-NEXT: li a1, 0 -; RV32IFD-NEXT: beqz a4, .LBB20_5 +; RV32IFD-NEXT: or a1, a1, a2 +; RV32IFD-NEXT: bnez a1, .LBB20_5 ; RV32IFD-NEXT: # %bb.4: # %entry -; RV32IFD-NEXT: mv a1, a0 +; RV32IFD-NEXT: li a0, 0 ; RV32IFD-NEXT: .LBB20_5: # %entry -; RV32IFD-NEXT: bnez a1, .LBB20_9 +; RV32IFD-NEXT: bnez a0, .LBB20_9 ; RV32IFD-NEXT: # %bb.6: # %entry -; RV32IFD-NEXT: li a0, 0 +; RV32IFD-NEXT: li a1, 0 ; RV32IFD-NEXT: li a2, 0 ; RV32IFD-NEXT: li a3, 1 ; RV32IFD-NEXT: bnez a2, .LBB20_10 @@ -1608,24 +1604,23 @@ ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: call __fixunssfti@plt ; RV32-NEXT: lw a0, 20(sp) -; RV32-NEXT: lw a1, 16(sp) +; RV32-NEXT: lw a2, 16(sp) ; RV32-NEXT: beqz a0, .LBB22_2 ; RV32-NEXT: # %bb.1: # %entry -; RV32-NEXT: li a2, 0 +; RV32-NEXT: li a1, 0 ; RV32-NEXT: j .LBB22_3 ; RV32-NEXT: .LBB22_2: -; RV32-NEXT: seqz a2, a1 +; RV32-NEXT: seqz a1, a2 ; RV32-NEXT: .LBB22_3: # %entry -; RV32-NEXT: xori a1, a1, 1 -; RV32-NEXT: or a1, a1, a0 -; RV32-NEXT: li a0, 0 -; RV32-NEXT: beqz a1, .LBB22_5 +; RV32-NEXT: xori a2, a2, 1 +; RV32-NEXT: or a0, a2, a0 +; RV32-NEXT: bnez a0, .LBB22_5 ; RV32-NEXT: # %bb.4: # %entry -; RV32-NEXT: mv a0, a2 +; RV32-NEXT: li a1, 0 ; RV32-NEXT: .LBB22_5: # %entry -; RV32-NEXT: bnez a0, .LBB22_7 +; RV32-NEXT: bnez a1, .LBB22_7 ; RV32-NEXT: # %bb.6: # %entry -; RV32-NEXT: li a1, 0 +; RV32-NEXT: li a0, 0 ; RV32-NEXT: j .LBB22_8 ; RV32-NEXT: .LBB22_7: ; RV32-NEXT: lw a1, 12(sp) @@ -1676,15 +1671,14 @@ ; RV32-NEXT: seqz a0, a3 ; RV32-NEXT: .LBB23_3: # %entry ; RV32-NEXT: xori a1, a3, 1 -; RV32-NEXT: or a4, a1, a2 -; RV32-NEXT: li a1, 0 -; RV32-NEXT: beqz a4, .LBB23_5 +; RV32-NEXT: or a1, a1, a2 +; RV32-NEXT: bnez a1, .LBB23_5 ; RV32-NEXT: # %bb.4: # %entry -; RV32-NEXT: mv a1, a0 +; RV32-NEXT: li a0, 0 ; RV32-NEXT: .LBB23_5: # %entry -; RV32-NEXT: bnez a1, .LBB23_9 +; RV32-NEXT: bnez a0, .LBB23_9 ; RV32-NEXT: # %bb.6: # %entry -; RV32-NEXT: li a0, 0 +; RV32-NEXT: li a1, 0 ; RV32-NEXT: li a2, 0 ; RV32-NEXT: li a3, 1 ; RV32-NEXT: bnez a2, .LBB23_10 @@ -1877,24 +1871,23 @@ ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: call __fixunssfti@plt ; RV32-NEXT: lw a0, 20(sp) -; RV32-NEXT: lw a1, 16(sp) +; RV32-NEXT: lw a2, 16(sp) ; RV32-NEXT: beqz a0, .LBB25_2 ; RV32-NEXT: # %bb.1: # %entry -; RV32-NEXT: li a2, 0 +; RV32-NEXT: li a1, 0 ; RV32-NEXT: j .LBB25_3 ; RV32-NEXT: .LBB25_2: -; RV32-NEXT: seqz a2, a1 +; RV32-NEXT: seqz a1, a2 ; RV32-NEXT: .LBB25_3: # %entry -; RV32-NEXT: xori a1, a1, 1 -; RV32-NEXT: or a1, a1, a0 -; RV32-NEXT: li a0, 0 -; RV32-NEXT: beqz a1, .LBB25_5 +; RV32-NEXT: xori a2, a2, 1 +; RV32-NEXT: or a0, a2, a0 +; RV32-NEXT: bnez a0, .LBB25_5 ; RV32-NEXT: # %bb.4: # %entry -; RV32-NEXT: mv a0, a2 +; RV32-NEXT: li a1, 0 ; RV32-NEXT: .LBB25_5: # %entry -; RV32-NEXT: bnez a0, .LBB25_7 +; RV32-NEXT: bnez a1, .LBB25_7 ; RV32-NEXT: # %bb.6: # %entry -; RV32-NEXT: li a1, 0 +; RV32-NEXT: li a0, 0 ; RV32-NEXT: j .LBB25_8 ; RV32-NEXT: .LBB25_7: ; RV32-NEXT: lw a1, 12(sp) @@ -1949,15 +1942,14 @@ ; RV32-NEXT: seqz a0, a3 ; RV32-NEXT: .LBB26_3: # %entry ; RV32-NEXT: xori a1, a3, 1 -; RV32-NEXT: or a4, a1, a2 -; RV32-NEXT: li a1, 0 -; RV32-NEXT: beqz a4, .LBB26_5 +; RV32-NEXT: or a1, a1, a2 +; RV32-NEXT: bnez a1, .LBB26_5 ; RV32-NEXT: # %bb.4: # %entry -; RV32-NEXT: mv a1, a0 +; RV32-NEXT: li a0, 0 ; RV32-NEXT: .LBB26_5: # %entry -; RV32-NEXT: bnez a1, .LBB26_9 +; RV32-NEXT: bnez a0, .LBB26_9 ; RV32-NEXT: # %bb.6: # %entry -; RV32-NEXT: li a0, 0 +; RV32-NEXT: li a1, 0 ; RV32-NEXT: li a2, 0 ; RV32-NEXT: li a3, 1 ; RV32-NEXT: bnez a2, .LBB26_10 @@ -3129,101 +3121,99 @@ ; RV32IF-NEXT: lui a4, 524288 ; RV32IF-NEXT: addi a6, a4, -1 ; RV32IF-NEXT: mv t0, a5 -; RV32IF-NEXT: bgeu a1, a6, .LBB45_19 +; RV32IF-NEXT: bgeu a1, a6, .LBB45_10 ; RV32IF-NEXT: # %bb.3: # %entry ; RV32IF-NEXT: lw a0, 16(sp) -; RV32IF-NEXT: bne a1, a6, .LBB45_20 +; RV32IF-NEXT: bne a1, a6, .LBB45_11 ; RV32IF-NEXT: .LBB45_4: # %entry ; RV32IF-NEXT: or t0, a0, a3 -; RV32IF-NEXT: bnez t0, .LBB45_21 +; RV32IF-NEXT: bnez t0, .LBB45_12 ; RV32IF-NEXT: .LBB45_5: # %entry ; RV32IF-NEXT: mv a7, a1 -; RV32IF-NEXT: bgez a3, .LBB45_22 +; RV32IF-NEXT: bgez a3, .LBB45_13 ; RV32IF-NEXT: .LBB45_6: # %entry -; RV32IF-NEXT: bgeu a1, a6, .LBB45_23 +; RV32IF-NEXT: bgeu a1, a6, .LBB45_14 ; RV32IF-NEXT: .LBB45_7: # %entry -; RV32IF-NEXT: bnez t0, .LBB45_24 +; RV32IF-NEXT: bnez t0, .LBB45_15 ; RV32IF-NEXT: .LBB45_8: # %entry -; RV32IF-NEXT: li a6, 0 -; RV32IF-NEXT: bnez a3, .LBB45_25 +; RV32IF-NEXT: bnez a3, .LBB45_16 ; RV32IF-NEXT: .LBB45_9: # %entry -; RV32IF-NEXT: bgez a3, .LBB45_26 +; RV32IF-NEXT: li a6, 0 +; RV32IF-NEXT: bgez a3, .LBB45_17 +; RV32IF-NEXT: j .LBB45_18 ; RV32IF-NEXT: .LBB45_10: # %entry -; RV32IF-NEXT: mv a7, a5 -; RV32IF-NEXT: bgeu a4, a1, .LBB45_27 -; RV32IF-NEXT: .LBB45_11: # %entry -; RV32IF-NEXT: mv a0, a5 -; RV32IF-NEXT: bne a1, a4, .LBB45_28 -; RV32IF-NEXT: .LBB45_12: # %entry -; RV32IF-NEXT: bltz a3, .LBB45_29 -; RV32IF-NEXT: .LBB45_13: # %entry -; RV32IF-NEXT: and a6, a6, a3 -; RV32IF-NEXT: bne a6, a2, .LBB45_30 -; RV32IF-NEXT: .LBB45_14: # %entry -; RV32IF-NEXT: mv a5, a1 -; RV32IF-NEXT: bltz a3, .LBB45_31 -; RV32IF-NEXT: .LBB45_15: # %entry -; RV32IF-NEXT: bgeu a4, a1, .LBB45_32 -; RV32IF-NEXT: .LBB45_16: # %entry -; RV32IF-NEXT: beq a6, a2, .LBB45_18 -; RV32IF-NEXT: .LBB45_17: # %entry -; RV32IF-NEXT: mv a1, a5 -; RV32IF-NEXT: .LBB45_18: # %entry -; RV32IF-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32IF-NEXT: addi sp, sp, 32 -; RV32IF-NEXT: ret -; RV32IF-NEXT: .LBB45_19: # %entry ; RV32IF-NEXT: li t0, -1 ; RV32IF-NEXT: lw a0, 16(sp) ; RV32IF-NEXT: beq a1, a6, .LBB45_4 -; RV32IF-NEXT: .LBB45_20: # %entry +; RV32IF-NEXT: .LBB45_11: # %entry ; RV32IF-NEXT: mv a5, t0 ; RV32IF-NEXT: or t0, a0, a3 ; RV32IF-NEXT: beqz t0, .LBB45_5 -; RV32IF-NEXT: .LBB45_21: # %entry +; RV32IF-NEXT: .LBB45_12: # %entry ; RV32IF-NEXT: mv a5, a7 ; RV32IF-NEXT: mv a7, a1 ; RV32IF-NEXT: bltz a3, .LBB45_6 -; RV32IF-NEXT: .LBB45_22: # %entry +; RV32IF-NEXT: .LBB45_13: # %entry ; RV32IF-NEXT: mv a7, a6 ; RV32IF-NEXT: bltu a1, a6, .LBB45_7 -; RV32IF-NEXT: .LBB45_23: # %entry +; RV32IF-NEXT: .LBB45_14: # %entry ; RV32IF-NEXT: mv a1, a6 ; RV32IF-NEXT: beqz t0, .LBB45_8 -; RV32IF-NEXT: .LBB45_24: # %entry +; RV32IF-NEXT: .LBB45_15: # %entry ; RV32IF-NEXT: mv a1, a7 -; RV32IF-NEXT: li a6, 0 ; RV32IF-NEXT: beqz a3, .LBB45_9 -; RV32IF-NEXT: .LBB45_25: # %entry +; RV32IF-NEXT: .LBB45_16: ; RV32IF-NEXT: srai a6, a3, 31 ; RV32IF-NEXT: and a6, a6, a0 -; RV32IF-NEXT: bltz a3, .LBB45_10 -; RV32IF-NEXT: .LBB45_26: # %entry +; RV32IF-NEXT: bltz a3, .LBB45_18 +; RV32IF-NEXT: .LBB45_17: # %entry ; RV32IF-NEXT: li a3, 0 +; RV32IF-NEXT: .LBB45_18: # %entry ; RV32IF-NEXT: mv a7, a5 -; RV32IF-NEXT: bltu a4, a1, .LBB45_11 +; RV32IF-NEXT: bgeu a4, a1, .LBB45_27 +; RV32IF-NEXT: # %bb.19: # %entry +; RV32IF-NEXT: mv a0, a5 +; RV32IF-NEXT: bne a1, a4, .LBB45_28 +; RV32IF-NEXT: .LBB45_20: # %entry +; RV32IF-NEXT: bltz a3, .LBB45_29 +; RV32IF-NEXT: .LBB45_21: # %entry +; RV32IF-NEXT: and a6, a6, a3 +; RV32IF-NEXT: bne a6, a2, .LBB45_30 +; RV32IF-NEXT: .LBB45_22: # %entry +; RV32IF-NEXT: mv a5, a1 +; RV32IF-NEXT: bltz a3, .LBB45_31 +; RV32IF-NEXT: .LBB45_23: # %entry +; RV32IF-NEXT: bgeu a4, a1, .LBB45_32 +; RV32IF-NEXT: .LBB45_24: # %entry +; RV32IF-NEXT: beq a6, a2, .LBB45_26 +; RV32IF-NEXT: .LBB45_25: # %entry +; RV32IF-NEXT: mv a1, a5 +; RV32IF-NEXT: .LBB45_26: # %entry +; RV32IF-NEXT: lw ra, 28(sp) # 4-byte Folded Reload +; RV32IF-NEXT: addi sp, sp, 32 +; RV32IF-NEXT: ret ; RV32IF-NEXT: .LBB45_27: # %entry ; RV32IF-NEXT: li a7, 0 ; RV32IF-NEXT: mv a0, a5 -; RV32IF-NEXT: beq a1, a4, .LBB45_12 +; RV32IF-NEXT: beq a1, a4, .LBB45_20 ; RV32IF-NEXT: .LBB45_28: # %entry ; RV32IF-NEXT: mv a0, a7 -; RV32IF-NEXT: bgez a3, .LBB45_13 +; RV32IF-NEXT: bgez a3, .LBB45_21 ; RV32IF-NEXT: .LBB45_29: # %entry ; RV32IF-NEXT: li a5, 0 ; RV32IF-NEXT: and a6, a6, a3 -; RV32IF-NEXT: beq a6, a2, .LBB45_14 +; RV32IF-NEXT: beq a6, a2, .LBB45_22 ; RV32IF-NEXT: .LBB45_30: # %entry ; RV32IF-NEXT: mv a0, a5 ; RV32IF-NEXT: mv a5, a1 -; RV32IF-NEXT: bgez a3, .LBB45_15 +; RV32IF-NEXT: bgez a3, .LBB45_23 ; RV32IF-NEXT: .LBB45_31: # %entry ; RV32IF-NEXT: lui a5, 524288 -; RV32IF-NEXT: bltu a4, a1, .LBB45_16 +; RV32IF-NEXT: bltu a4, a1, .LBB45_24 ; RV32IF-NEXT: .LBB45_32: # %entry ; RV32IF-NEXT: lui a1, 524288 -; RV32IF-NEXT: bne a6, a2, .LBB45_17 -; RV32IF-NEXT: j .LBB45_18 +; RV32IF-NEXT: bne a6, a2, .LBB45_25 +; RV32IF-NEXT: j .LBB45_26 ; ; RV64IF-LABEL: stest_f64i64_mm: ; RV64IF: # %bb.0: # %entry @@ -3296,101 +3286,99 @@ ; RV32IFD-NEXT: lui a4, 524288 ; RV32IFD-NEXT: addi a6, a4, -1 ; RV32IFD-NEXT: mv t0, a5 -; RV32IFD-NEXT: bgeu a1, a6, .LBB45_19 +; RV32IFD-NEXT: bgeu a1, a6, .LBB45_10 ; RV32IFD-NEXT: # %bb.3: # %entry ; RV32IFD-NEXT: lw a0, 16(sp) -; RV32IFD-NEXT: bne a1, a6, .LBB45_20 +; RV32IFD-NEXT: bne a1, a6, .LBB45_11 ; RV32IFD-NEXT: .LBB45_4: # %entry ; RV32IFD-NEXT: or t0, a0, a3 -; RV32IFD-NEXT: bnez t0, .LBB45_21 +; RV32IFD-NEXT: bnez t0, .LBB45_12 ; RV32IFD-NEXT: .LBB45_5: # %entry ; RV32IFD-NEXT: mv a7, a1 -; RV32IFD-NEXT: bgez a3, .LBB45_22 +; RV32IFD-NEXT: bgez a3, .LBB45_13 ; RV32IFD-NEXT: .LBB45_6: # %entry -; RV32IFD-NEXT: bgeu a1, a6, .LBB45_23 +; RV32IFD-NEXT: bgeu a1, a6, .LBB45_14 ; RV32IFD-NEXT: .LBB45_7: # %entry -; RV32IFD-NEXT: bnez t0, .LBB45_24 +; RV32IFD-NEXT: bnez t0, .LBB45_15 ; RV32IFD-NEXT: .LBB45_8: # %entry -; RV32IFD-NEXT: li a6, 0 -; RV32IFD-NEXT: bnez a3, .LBB45_25 +; RV32IFD-NEXT: bnez a3, .LBB45_16 ; RV32IFD-NEXT: .LBB45_9: # %entry -; RV32IFD-NEXT: bgez a3, .LBB45_26 +; RV32IFD-NEXT: li a6, 0 +; RV32IFD-NEXT: bgez a3, .LBB45_17 +; RV32IFD-NEXT: j .LBB45_18 ; RV32IFD-NEXT: .LBB45_10: # %entry -; RV32IFD-NEXT: mv a7, a5 -; RV32IFD-NEXT: bgeu a4, a1, .LBB45_27 -; RV32IFD-NEXT: .LBB45_11: # %entry -; RV32IFD-NEXT: mv a0, a5 -; RV32IFD-NEXT: bne a1, a4, .LBB45_28 -; RV32IFD-NEXT: .LBB45_12: # %entry -; RV32IFD-NEXT: bltz a3, .LBB45_29 -; RV32IFD-NEXT: .LBB45_13: # %entry -; RV32IFD-NEXT: and a6, a6, a3 -; RV32IFD-NEXT: bne a6, a2, .LBB45_30 -; RV32IFD-NEXT: .LBB45_14: # %entry -; RV32IFD-NEXT: mv a5, a1 -; RV32IFD-NEXT: bltz a3, .LBB45_31 -; RV32IFD-NEXT: .LBB45_15: # %entry -; RV32IFD-NEXT: bgeu a4, a1, .LBB45_32 -; RV32IFD-NEXT: .LBB45_16: # %entry -; RV32IFD-NEXT: beq a6, a2, .LBB45_18 -; RV32IFD-NEXT: .LBB45_17: # %entry -; RV32IFD-NEXT: mv a1, a5 -; RV32IFD-NEXT: .LBB45_18: # %entry -; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32IFD-NEXT: addi sp, sp, 32 -; RV32IFD-NEXT: ret -; RV32IFD-NEXT: .LBB45_19: # %entry ; RV32IFD-NEXT: li t0, -1 ; RV32IFD-NEXT: lw a0, 16(sp) ; RV32IFD-NEXT: beq a1, a6, .LBB45_4 -; RV32IFD-NEXT: .LBB45_20: # %entry +; RV32IFD-NEXT: .LBB45_11: # %entry ; RV32IFD-NEXT: mv a5, t0 ; RV32IFD-NEXT: or t0, a0, a3 ; RV32IFD-NEXT: beqz t0, .LBB45_5 -; RV32IFD-NEXT: .LBB45_21: # %entry +; RV32IFD-NEXT: .LBB45_12: # %entry ; RV32IFD-NEXT: mv a5, a7 ; RV32IFD-NEXT: mv a7, a1 ; RV32IFD-NEXT: bltz a3, .LBB45_6 -; RV32IFD-NEXT: .LBB45_22: # %entry +; RV32IFD-NEXT: .LBB45_13: # %entry ; RV32IFD-NEXT: mv a7, a6 ; RV32IFD-NEXT: bltu a1, a6, .LBB45_7 -; RV32IFD-NEXT: .LBB45_23: # %entry +; RV32IFD-NEXT: .LBB45_14: # %entry ; RV32IFD-NEXT: mv a1, a6 ; RV32IFD-NEXT: beqz t0, .LBB45_8 -; RV32IFD-NEXT: .LBB45_24: # %entry +; RV32IFD-NEXT: .LBB45_15: # %entry ; RV32IFD-NEXT: mv a1, a7 -; RV32IFD-NEXT: li a6, 0 ; RV32IFD-NEXT: beqz a3, .LBB45_9 -; RV32IFD-NEXT: .LBB45_25: # %entry +; RV32IFD-NEXT: .LBB45_16: ; RV32IFD-NEXT: srai a6, a3, 31 ; RV32IFD-NEXT: and a6, a6, a0 -; RV32IFD-NEXT: bltz a3, .LBB45_10 -; RV32IFD-NEXT: .LBB45_26: # %entry +; RV32IFD-NEXT: bltz a3, .LBB45_18 +; RV32IFD-NEXT: .LBB45_17: # %entry ; RV32IFD-NEXT: li a3, 0 +; RV32IFD-NEXT: .LBB45_18: # %entry ; RV32IFD-NEXT: mv a7, a5 -; RV32IFD-NEXT: bltu a4, a1, .LBB45_11 +; RV32IFD-NEXT: bgeu a4, a1, .LBB45_27 +; RV32IFD-NEXT: # %bb.19: # %entry +; RV32IFD-NEXT: mv a0, a5 +; RV32IFD-NEXT: bne a1, a4, .LBB45_28 +; RV32IFD-NEXT: .LBB45_20: # %entry +; RV32IFD-NEXT: bltz a3, .LBB45_29 +; RV32IFD-NEXT: .LBB45_21: # %entry +; RV32IFD-NEXT: and a6, a6, a3 +; RV32IFD-NEXT: bne a6, a2, .LBB45_30 +; RV32IFD-NEXT: .LBB45_22: # %entry +; RV32IFD-NEXT: mv a5, a1 +; RV32IFD-NEXT: bltz a3, .LBB45_31 +; RV32IFD-NEXT: .LBB45_23: # %entry +; RV32IFD-NEXT: bgeu a4, a1, .LBB45_32 +; RV32IFD-NEXT: .LBB45_24: # %entry +; RV32IFD-NEXT: beq a6, a2, .LBB45_26 +; RV32IFD-NEXT: .LBB45_25: # %entry +; RV32IFD-NEXT: mv a1, a5 +; RV32IFD-NEXT: .LBB45_26: # %entry +; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload +; RV32IFD-NEXT: addi sp, sp, 32 +; RV32IFD-NEXT: ret ; RV32IFD-NEXT: .LBB45_27: # %entry ; RV32IFD-NEXT: li a7, 0 ; RV32IFD-NEXT: mv a0, a5 -; RV32IFD-NEXT: beq a1, a4, .LBB45_12 +; RV32IFD-NEXT: beq a1, a4, .LBB45_20 ; RV32IFD-NEXT: .LBB45_28: # %entry ; RV32IFD-NEXT: mv a0, a7 -; RV32IFD-NEXT: bgez a3, .LBB45_13 +; RV32IFD-NEXT: bgez a3, .LBB45_21 ; RV32IFD-NEXT: .LBB45_29: # %entry ; RV32IFD-NEXT: li a5, 0 ; RV32IFD-NEXT: and a6, a6, a3 -; RV32IFD-NEXT: beq a6, a2, .LBB45_14 +; RV32IFD-NEXT: beq a6, a2, .LBB45_22 ; RV32IFD-NEXT: .LBB45_30: # %entry ; RV32IFD-NEXT: mv a0, a5 ; RV32IFD-NEXT: mv a5, a1 -; RV32IFD-NEXT: bgez a3, .LBB45_15 +; RV32IFD-NEXT: bgez a3, .LBB45_23 ; RV32IFD-NEXT: .LBB45_31: # %entry ; RV32IFD-NEXT: lui a5, 524288 -; RV32IFD-NEXT: bltu a4, a1, .LBB45_16 +; RV32IFD-NEXT: bltu a4, a1, .LBB45_24 ; RV32IFD-NEXT: .LBB45_32: # %entry ; RV32IFD-NEXT: lui a1, 524288 -; RV32IFD-NEXT: bne a6, a2, .LBB45_17 -; RV32IFD-NEXT: j .LBB45_18 +; RV32IFD-NEXT: bne a6, a2, .LBB45_25 +; RV32IFD-NEXT: j .LBB45_26 ; ; RV64IFD-LABEL: stest_f64i64_mm: ; RV64IFD: # %bb.0: # %entry @@ -3419,43 +3407,41 @@ ; RV32IF-NEXT: mv a1, a0 ; RV32IF-NEXT: addi a0, sp, 8 ; RV32IF-NEXT: call __fixunsdfti@plt -; RV32IF-NEXT: lw a0, 20(sp) +; RV32IF-NEXT: lw a2, 20(sp) ; RV32IF-NEXT: lw a3, 16(sp) -; RV32IF-NEXT: li a1, 0 -; RV32IF-NEXT: beqz a0, .LBB46_3 +; RV32IF-NEXT: beqz a2, .LBB46_3 ; RV32IF-NEXT: # %bb.1: # %entry -; RV32IF-NEXT: mv a2, a1 -; RV32IF-NEXT: beq a2, a1, .LBB46_4 +; RV32IF-NEXT: li a1, 0 +; RV32IF-NEXT: beqz a1, .LBB46_4 ; RV32IF-NEXT: .LBB46_2: -; RV32IF-NEXT: lw a4, 8(sp) +; RV32IF-NEXT: lw a0, 8(sp) ; RV32IF-NEXT: j .LBB46_5 ; RV32IF-NEXT: .LBB46_3: -; RV32IF-NEXT: seqz a2, a3 -; RV32IF-NEXT: bne a2, a1, .LBB46_2 +; RV32IF-NEXT: seqz a1, a3 +; RV32IF-NEXT: bnez a1, .LBB46_2 ; RV32IF-NEXT: .LBB46_4: # %entry -; RV32IF-NEXT: mv a4, a1 +; RV32IF-NEXT: li a0, 0 ; RV32IF-NEXT: .LBB46_5: # %entry ; RV32IF-NEXT: xori a3, a3, 1 -; RV32IF-NEXT: or a3, a3, a0 -; RV32IF-NEXT: mv a0, a1 -; RV32IF-NEXT: beq a3, a1, .LBB46_7 +; RV32IF-NEXT: or a2, a3, a2 +; RV32IF-NEXT: beqz a2, .LBB46_10 ; RV32IF-NEXT: # %bb.6: # %entry -; RV32IF-NEXT: mv a0, a4 +; RV32IF-NEXT: bnez a1, .LBB46_11 ; RV32IF-NEXT: .LBB46_7: # %entry -; RV32IF-NEXT: bne a2, a1, .LBB46_9 -; RV32IF-NEXT: # %bb.8: # %entry -; RV32IF-NEXT: mv a2, a1 -; RV32IF-NEXT: bne a3, a1, .LBB46_10 -; RV32IF-NEXT: j .LBB46_11 -; RV32IF-NEXT: .LBB46_9: -; RV32IF-NEXT: lw a2, 12(sp) -; RV32IF-NEXT: beq a3, a1, .LBB46_11 -; RV32IF-NEXT: .LBB46_10: # %entry -; RV32IF-NEXT: mv a1, a2 -; RV32IF-NEXT: .LBB46_11: # %entry +; RV32IF-NEXT: bnez a2, .LBB46_9 +; RV32IF-NEXT: .LBB46_8: # %entry +; RV32IF-NEXT: li a1, 0 +; RV32IF-NEXT: .LBB46_9: # %entry ; RV32IF-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IF-NEXT: addi sp, sp, 32 ; RV32IF-NEXT: ret +; RV32IF-NEXT: .LBB46_10: # %entry +; RV32IF-NEXT: li a0, 0 +; RV32IF-NEXT: beqz a1, .LBB46_7 +; RV32IF-NEXT: .LBB46_11: +; RV32IF-NEXT: lw a1, 12(sp) +; RV32IF-NEXT: beqz a2, .LBB46_8 +; RV32IF-NEXT: j .LBB46_9 ; ; RV64-LABEL: utest_f64i64_mm: ; RV64: # %bb.0: # %entry @@ -3464,16 +3450,14 @@ ; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-NEXT: .cfi_offset ra, -8 ; RV64-NEXT: call __fixunsdfti@plt -; RV64-NEXT: mv a2, a0 -; RV64-NEXT: li a0, 0 ; RV64-NEXT: beqz a1, .LBB46_2 ; RV64-NEXT: # %bb.1: # %entry -; RV64-NEXT: mv a2, a0 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: .LBB46_2: # %entry -; RV64-NEXT: li a3, 1 -; RV64-NEXT: beq a1, a3, .LBB46_4 +; RV64-NEXT: li a2, 1 +; RV64-NEXT: bne a1, a2, .LBB46_4 ; RV64-NEXT: # %bb.3: # %entry -; RV64-NEXT: mv a0, a2 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: .LBB46_4: # %entry ; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-NEXT: addi sp, sp, 16 @@ -3487,43 +3471,41 @@ ; RV32IFD-NEXT: .cfi_offset ra, -4 ; RV32IFD-NEXT: addi a0, sp, 8 ; RV32IFD-NEXT: call __fixunsdfti@plt -; RV32IFD-NEXT: lw a0, 20(sp) +; RV32IFD-NEXT: lw a2, 20(sp) ; RV32IFD-NEXT: lw a3, 16(sp) -; RV32IFD-NEXT: li a1, 0 -; RV32IFD-NEXT: beqz a0, .LBB46_3 +; RV32IFD-NEXT: beqz a2, .LBB46_3 ; RV32IFD-NEXT: # %bb.1: # %entry -; RV32IFD-NEXT: mv a2, a1 -; RV32IFD-NEXT: beq a2, a1, .LBB46_4 +; RV32IFD-NEXT: li a1, 0 +; RV32IFD-NEXT: beqz a1, .LBB46_4 ; RV32IFD-NEXT: .LBB46_2: -; RV32IFD-NEXT: lw a4, 8(sp) +; RV32IFD-NEXT: lw a0, 8(sp) ; RV32IFD-NEXT: j .LBB46_5 ; RV32IFD-NEXT: .LBB46_3: -; RV32IFD-NEXT: seqz a2, a3 -; RV32IFD-NEXT: bne a2, a1, .LBB46_2 +; RV32IFD-NEXT: seqz a1, a3 +; RV32IFD-NEXT: bnez a1, .LBB46_2 ; RV32IFD-NEXT: .LBB46_4: # %entry -; RV32IFD-NEXT: mv a4, a1 +; RV32IFD-NEXT: li a0, 0 ; RV32IFD-NEXT: .LBB46_5: # %entry ; RV32IFD-NEXT: xori a3, a3, 1 -; RV32IFD-NEXT: or a3, a3, a0 -; RV32IFD-NEXT: mv a0, a1 -; RV32IFD-NEXT: beq a3, a1, .LBB46_7 +; RV32IFD-NEXT: or a2, a3, a2 +; RV32IFD-NEXT: beqz a2, .LBB46_10 ; RV32IFD-NEXT: # %bb.6: # %entry -; RV32IFD-NEXT: mv a0, a4 +; RV32IFD-NEXT: bnez a1, .LBB46_11 ; RV32IFD-NEXT: .LBB46_7: # %entry -; RV32IFD-NEXT: bne a2, a1, .LBB46_9 -; RV32IFD-NEXT: # %bb.8: # %entry -; RV32IFD-NEXT: mv a2, a1 -; RV32IFD-NEXT: bne a3, a1, .LBB46_10 -; RV32IFD-NEXT: j .LBB46_11 -; RV32IFD-NEXT: .LBB46_9: -; RV32IFD-NEXT: lw a2, 12(sp) -; RV32IFD-NEXT: beq a3, a1, .LBB46_11 -; RV32IFD-NEXT: .LBB46_10: # %entry -; RV32IFD-NEXT: mv a1, a2 -; RV32IFD-NEXT: .LBB46_11: # %entry +; RV32IFD-NEXT: bnez a2, .LBB46_9 +; RV32IFD-NEXT: .LBB46_8: # %entry +; RV32IFD-NEXT: li a1, 0 +; RV32IFD-NEXT: .LBB46_9: # %entry ; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IFD-NEXT: addi sp, sp, 32 ; RV32IFD-NEXT: ret +; RV32IFD-NEXT: .LBB46_10: # %entry +; RV32IFD-NEXT: li a0, 0 +; RV32IFD-NEXT: beqz a1, .LBB46_7 +; RV32IFD-NEXT: .LBB46_11: +; RV32IFD-NEXT: lw a1, 12(sp) +; RV32IFD-NEXT: beqz a2, .LBB46_8 +; RV32IFD-NEXT: j .LBB46_9 entry: %conv = fptoui double %x to i128 %spec.store.select = call i128 @llvm.umin.i128(i128 %conv, i128 18446744073709551616) @@ -3557,7 +3539,7 @@ ; RV32IF-NEXT: mv a3, a4 ; RV32IF-NEXT: beqz a1, .LBB47_8 ; RV32IF-NEXT: .LBB47_4: -; RV32IF-NEXT: lw a5, 8(sp) +; RV32IF-NEXT: lw a4, 8(sp) ; RV32IF-NEXT: j .LBB47_9 ; RV32IF-NEXT: .LBB47_5: # %entry ; RV32IF-NEXT: li a4, 1 @@ -3570,52 +3552,49 @@ ; RV32IF-NEXT: seqz a1, a0 ; RV32IF-NEXT: bnez a1, .LBB47_4 ; RV32IF-NEXT: .LBB47_8: # %entry -; RV32IF-NEXT: li a5, 0 +; RV32IF-NEXT: li a4, 0 ; RV32IF-NEXT: .LBB47_9: # %entry ; RV32IF-NEXT: xori a0, a0, 1 ; RV32IF-NEXT: or a0, a0, a2 -; RV32IF-NEXT: li a4, 0 -; RV32IF-NEXT: beqz a0, .LBB47_11 +; RV32IF-NEXT: beqz a0, .LBB47_17 ; RV32IF-NEXT: # %bb.10: # %entry -; RV32IF-NEXT: mv a4, a5 +; RV32IF-NEXT: bnez a1, .LBB47_18 ; RV32IF-NEXT: .LBB47_11: # %entry -; RV32IF-NEXT: bnez a1, .LBB47_13 -; RV32IF-NEXT: # %bb.12: # %entry -; RV32IF-NEXT: li a5, 0 -; RV32IF-NEXT: li a1, 0 -; RV32IF-NEXT: bnez a0, .LBB47_14 -; RV32IF-NEXT: j .LBB47_15 -; RV32IF-NEXT: .LBB47_13: -; RV32IF-NEXT: lw a5, 12(sp) -; RV32IF-NEXT: li a1, 0 -; RV32IF-NEXT: beqz a0, .LBB47_15 -; RV32IF-NEXT: .LBB47_14: # %entry -; RV32IF-NEXT: mv a1, a5 -; RV32IF-NEXT: .LBB47_15: # %entry +; RV32IF-NEXT: beqz a0, .LBB47_19 +; RV32IF-NEXT: .LBB47_12: # %entry ; RV32IF-NEXT: bgez a2, .LBB47_20 -; RV32IF-NEXT: # %bb.16: # %entry +; RV32IF-NEXT: .LBB47_13: # %entry ; RV32IF-NEXT: mv a5, a4 ; RV32IF-NEXT: beqz a1, .LBB47_21 -; RV32IF-NEXT: .LBB47_17: # %entry +; RV32IF-NEXT: .LBB47_14: # %entry ; RV32IF-NEXT: mv a0, a4 ; RV32IF-NEXT: bnez a1, .LBB47_22 -; RV32IF-NEXT: .LBB47_18: # %entry +; RV32IF-NEXT: .LBB47_15: # %entry ; RV32IF-NEXT: beqz a2, .LBB47_23 -; RV32IF-NEXT: .LBB47_19: # %entry +; RV32IF-NEXT: .LBB47_16: # %entry ; RV32IF-NEXT: sgtz a5, a2 ; RV32IF-NEXT: beqz a5, .LBB47_24 ; RV32IF-NEXT: j .LBB47_25 +; RV32IF-NEXT: .LBB47_17: # %entry +; RV32IF-NEXT: li a4, 0 +; RV32IF-NEXT: beqz a1, .LBB47_11 +; RV32IF-NEXT: .LBB47_18: +; RV32IF-NEXT: lw a1, 12(sp) +; RV32IF-NEXT: bnez a0, .LBB47_12 +; RV32IF-NEXT: .LBB47_19: # %entry +; RV32IF-NEXT: li a1, 0 +; RV32IF-NEXT: bltz a2, .LBB47_13 ; RV32IF-NEXT: .LBB47_20: # %entry ; RV32IF-NEXT: li a2, 0 ; RV32IF-NEXT: mv a5, a4 -; RV32IF-NEXT: bnez a1, .LBB47_17 +; RV32IF-NEXT: bnez a1, .LBB47_14 ; RV32IF-NEXT: .LBB47_21: # %entry ; RV32IF-NEXT: li a5, 0 ; RV32IF-NEXT: mv a0, a4 -; RV32IF-NEXT: beqz a1, .LBB47_18 +; RV32IF-NEXT: beqz a1, .LBB47_15 ; RV32IF-NEXT: .LBB47_22: # %entry ; RV32IF-NEXT: mv a0, a5 -; RV32IF-NEXT: bnez a2, .LBB47_19 +; RV32IF-NEXT: bnez a2, .LBB47_16 ; RV32IF-NEXT: .LBB47_23: ; RV32IF-NEXT: snez a5, a3 ; RV32IF-NEXT: bnez a5, .LBB47_25 @@ -3651,18 +3630,16 @@ ; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-NEXT: .cfi_offset ra, -8 ; RV64-NEXT: call __fixdfti@plt -; RV64-NEXT: mv a2, a0 -; RV64-NEXT: li a4, 1 -; RV64-NEXT: mv a3, a1 +; RV64-NEXT: li a3, 1 +; RV64-NEXT: mv a2, a1 ; RV64-NEXT: bgtz a1, .LBB47_6 ; RV64-NEXT: # %bb.1: # %entry -; RV64-NEXT: li a0, 0 -; RV64-NEXT: bne a1, a4, .LBB47_7 +; RV64-NEXT: beq a1, a3, .LBB47_7 ; RV64-NEXT: .LBB47_2: # %entry ; RV64-NEXT: mv a1, a0 -; RV64-NEXT: blez a3, .LBB47_8 +; RV64-NEXT: blez a2, .LBB47_8 ; RV64-NEXT: .LBB47_3: # %entry -; RV64-NEXT: beqz a3, .LBB47_5 +; RV64-NEXT: beqz a2, .LBB47_5 ; RV64-NEXT: .LBB47_4: # %entry ; RV64-NEXT: mv a0, a1 ; RV64-NEXT: .LBB47_5: # %entry @@ -3670,17 +3647,16 @@ ; RV64-NEXT: addi sp, sp, 16 ; RV64-NEXT: ret ; RV64-NEXT: .LBB47_6: # %entry -; RV64-NEXT: li a2, 0 -; RV64-NEXT: li a3, 1 ; RV64-NEXT: li a0, 0 -; RV64-NEXT: beq a1, a4, .LBB47_2 +; RV64-NEXT: li a2, 1 +; RV64-NEXT: bne a1, a3, .LBB47_2 ; RV64-NEXT: .LBB47_7: # %entry -; RV64-NEXT: mv a0, a2 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: mv a1, a0 -; RV64-NEXT: bgtz a3, .LBB47_3 +; RV64-NEXT: bgtz a2, .LBB47_3 ; RV64-NEXT: .LBB47_8: # %entry ; RV64-NEXT: li a1, 0 -; RV64-NEXT: bnez a3, .LBB47_4 +; RV64-NEXT: bnez a2, .LBB47_4 ; RV64-NEXT: j .LBB47_5 ; ; RV32IFD-LABEL: ustest_f64i64_mm: @@ -3706,7 +3682,7 @@ ; RV32IFD-NEXT: mv a3, a4 ; RV32IFD-NEXT: beqz a1, .LBB47_8 ; RV32IFD-NEXT: .LBB47_4: -; RV32IFD-NEXT: lw a5, 8(sp) +; RV32IFD-NEXT: lw a4, 8(sp) ; RV32IFD-NEXT: j .LBB47_9 ; RV32IFD-NEXT: .LBB47_5: # %entry ; RV32IFD-NEXT: li a4, 1 @@ -3719,52 +3695,49 @@ ; RV32IFD-NEXT: seqz a1, a0 ; RV32IFD-NEXT: bnez a1, .LBB47_4 ; RV32IFD-NEXT: .LBB47_8: # %entry -; RV32IFD-NEXT: li a5, 0 +; RV32IFD-NEXT: li a4, 0 ; RV32IFD-NEXT: .LBB47_9: # %entry ; RV32IFD-NEXT: xori a0, a0, 1 ; RV32IFD-NEXT: or a0, a0, a2 -; RV32IFD-NEXT: li a4, 0 -; RV32IFD-NEXT: beqz a0, .LBB47_11 +; RV32IFD-NEXT: beqz a0, .LBB47_17 ; RV32IFD-NEXT: # %bb.10: # %entry -; RV32IFD-NEXT: mv a4, a5 +; RV32IFD-NEXT: bnez a1, .LBB47_18 ; RV32IFD-NEXT: .LBB47_11: # %entry -; RV32IFD-NEXT: bnez a1, .LBB47_13 -; RV32IFD-NEXT: # %bb.12: # %entry -; RV32IFD-NEXT: li a5, 0 -; RV32IFD-NEXT: li a1, 0 -; RV32IFD-NEXT: bnez a0, .LBB47_14 -; RV32IFD-NEXT: j .LBB47_15 -; RV32IFD-NEXT: .LBB47_13: -; RV32IFD-NEXT: lw a5, 12(sp) -; RV32IFD-NEXT: li a1, 0 -; RV32IFD-NEXT: beqz a0, .LBB47_15 -; RV32IFD-NEXT: .LBB47_14: # %entry -; RV32IFD-NEXT: mv a1, a5 -; RV32IFD-NEXT: .LBB47_15: # %entry +; RV32IFD-NEXT: beqz a0, .LBB47_19 +; RV32IFD-NEXT: .LBB47_12: # %entry ; RV32IFD-NEXT: bgez a2, .LBB47_20 -; RV32IFD-NEXT: # %bb.16: # %entry +; RV32IFD-NEXT: .LBB47_13: # %entry ; RV32IFD-NEXT: mv a5, a4 ; RV32IFD-NEXT: beqz a1, .LBB47_21 -; RV32IFD-NEXT: .LBB47_17: # %entry +; RV32IFD-NEXT: .LBB47_14: # %entry ; RV32IFD-NEXT: mv a0, a4 ; RV32IFD-NEXT: bnez a1, .LBB47_22 -; RV32IFD-NEXT: .LBB47_18: # %entry +; RV32IFD-NEXT: .LBB47_15: # %entry ; RV32IFD-NEXT: beqz a2, .LBB47_23 -; RV32IFD-NEXT: .LBB47_19: # %entry +; RV32IFD-NEXT: .LBB47_16: # %entry ; RV32IFD-NEXT: sgtz a5, a2 ; RV32IFD-NEXT: beqz a5, .LBB47_24 ; RV32IFD-NEXT: j .LBB47_25 +; RV32IFD-NEXT: .LBB47_17: # %entry +; RV32IFD-NEXT: li a4, 0 +; RV32IFD-NEXT: beqz a1, .LBB47_11 +; RV32IFD-NEXT: .LBB47_18: +; RV32IFD-NEXT: lw a1, 12(sp) +; RV32IFD-NEXT: bnez a0, .LBB47_12 +; RV32IFD-NEXT: .LBB47_19: # %entry +; RV32IFD-NEXT: li a1, 0 +; RV32IFD-NEXT: bltz a2, .LBB47_13 ; RV32IFD-NEXT: .LBB47_20: # %entry ; RV32IFD-NEXT: li a2, 0 ; RV32IFD-NEXT: mv a5, a4 -; RV32IFD-NEXT: bnez a1, .LBB47_17 +; RV32IFD-NEXT: bnez a1, .LBB47_14 ; RV32IFD-NEXT: .LBB47_21: # %entry ; RV32IFD-NEXT: li a5, 0 ; RV32IFD-NEXT: mv a0, a4 -; RV32IFD-NEXT: beqz a1, .LBB47_18 +; RV32IFD-NEXT: beqz a1, .LBB47_15 ; RV32IFD-NEXT: .LBB47_22: # %entry ; RV32IFD-NEXT: mv a0, a5 -; RV32IFD-NEXT: bnez a2, .LBB47_19 +; RV32IFD-NEXT: bnez a2, .LBB47_16 ; RV32IFD-NEXT: .LBB47_23: ; RV32IFD-NEXT: snez a5, a3 ; RV32IFD-NEXT: bnez a5, .LBB47_25 @@ -3821,101 +3794,99 @@ ; RV32-NEXT: lui a4, 524288 ; RV32-NEXT: addi a6, a4, -1 ; RV32-NEXT: mv t0, a5 -; RV32-NEXT: bgeu a1, a6, .LBB48_19 +; RV32-NEXT: bgeu a1, a6, .LBB48_10 ; RV32-NEXT: # %bb.3: # %entry ; RV32-NEXT: lw a0, 16(sp) -; RV32-NEXT: bne a1, a6, .LBB48_20 +; RV32-NEXT: bne a1, a6, .LBB48_11 ; RV32-NEXT: .LBB48_4: # %entry ; RV32-NEXT: or t0, a0, a3 -; RV32-NEXT: bnez t0, .LBB48_21 +; RV32-NEXT: bnez t0, .LBB48_12 ; RV32-NEXT: .LBB48_5: # %entry ; RV32-NEXT: mv a7, a1 -; RV32-NEXT: bgez a3, .LBB48_22 +; RV32-NEXT: bgez a3, .LBB48_13 ; RV32-NEXT: .LBB48_6: # %entry -; RV32-NEXT: bgeu a1, a6, .LBB48_23 +; RV32-NEXT: bgeu a1, a6, .LBB48_14 ; RV32-NEXT: .LBB48_7: # %entry -; RV32-NEXT: bnez t0, .LBB48_24 +; RV32-NEXT: bnez t0, .LBB48_15 ; RV32-NEXT: .LBB48_8: # %entry -; RV32-NEXT: li a6, 0 -; RV32-NEXT: bnez a3, .LBB48_25 +; RV32-NEXT: bnez a3, .LBB48_16 ; RV32-NEXT: .LBB48_9: # %entry -; RV32-NEXT: bgez a3, .LBB48_26 +; RV32-NEXT: li a6, 0 +; RV32-NEXT: bgez a3, .LBB48_17 +; RV32-NEXT: j .LBB48_18 ; RV32-NEXT: .LBB48_10: # %entry -; RV32-NEXT: mv a7, a5 -; RV32-NEXT: bgeu a4, a1, .LBB48_27 -; RV32-NEXT: .LBB48_11: # %entry -; RV32-NEXT: mv a0, a5 -; RV32-NEXT: bne a1, a4, .LBB48_28 -; RV32-NEXT: .LBB48_12: # %entry -; RV32-NEXT: bltz a3, .LBB48_29 -; RV32-NEXT: .LBB48_13: # %entry -; RV32-NEXT: and a6, a6, a3 -; RV32-NEXT: bne a6, a2, .LBB48_30 -; RV32-NEXT: .LBB48_14: # %entry -; RV32-NEXT: mv a5, a1 -; RV32-NEXT: bltz a3, .LBB48_31 -; RV32-NEXT: .LBB48_15: # %entry -; RV32-NEXT: bgeu a4, a1, .LBB48_32 -; RV32-NEXT: .LBB48_16: # %entry -; RV32-NEXT: beq a6, a2, .LBB48_18 -; RV32-NEXT: .LBB48_17: # %entry -; RV32-NEXT: mv a1, a5 -; RV32-NEXT: .LBB48_18: # %entry -; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32-NEXT: addi sp, sp, 32 -; RV32-NEXT: ret -; RV32-NEXT: .LBB48_19: # %entry ; RV32-NEXT: li t0, -1 ; RV32-NEXT: lw a0, 16(sp) ; RV32-NEXT: beq a1, a6, .LBB48_4 -; RV32-NEXT: .LBB48_20: # %entry +; RV32-NEXT: .LBB48_11: # %entry ; RV32-NEXT: mv a5, t0 ; RV32-NEXT: or t0, a0, a3 ; RV32-NEXT: beqz t0, .LBB48_5 -; RV32-NEXT: .LBB48_21: # %entry +; RV32-NEXT: .LBB48_12: # %entry ; RV32-NEXT: mv a5, a7 ; RV32-NEXT: mv a7, a1 ; RV32-NEXT: bltz a3, .LBB48_6 -; RV32-NEXT: .LBB48_22: # %entry +; RV32-NEXT: .LBB48_13: # %entry ; RV32-NEXT: mv a7, a6 ; RV32-NEXT: bltu a1, a6, .LBB48_7 -; RV32-NEXT: .LBB48_23: # %entry +; RV32-NEXT: .LBB48_14: # %entry ; RV32-NEXT: mv a1, a6 ; RV32-NEXT: beqz t0, .LBB48_8 -; RV32-NEXT: .LBB48_24: # %entry +; RV32-NEXT: .LBB48_15: # %entry ; RV32-NEXT: mv a1, a7 -; RV32-NEXT: li a6, 0 ; RV32-NEXT: beqz a3, .LBB48_9 -; RV32-NEXT: .LBB48_25: # %entry +; RV32-NEXT: .LBB48_16: ; RV32-NEXT: srai a6, a3, 31 ; RV32-NEXT: and a6, a6, a0 -; RV32-NEXT: bltz a3, .LBB48_10 -; RV32-NEXT: .LBB48_26: # %entry +; RV32-NEXT: bltz a3, .LBB48_18 +; RV32-NEXT: .LBB48_17: # %entry ; RV32-NEXT: li a3, 0 +; RV32-NEXT: .LBB48_18: # %entry ; RV32-NEXT: mv a7, a5 -; RV32-NEXT: bltu a4, a1, .LBB48_11 +; RV32-NEXT: bgeu a4, a1, .LBB48_27 +; RV32-NEXT: # %bb.19: # %entry +; RV32-NEXT: mv a0, a5 +; RV32-NEXT: bne a1, a4, .LBB48_28 +; RV32-NEXT: .LBB48_20: # %entry +; RV32-NEXT: bltz a3, .LBB48_29 +; RV32-NEXT: .LBB48_21: # %entry +; RV32-NEXT: and a6, a6, a3 +; RV32-NEXT: bne a6, a2, .LBB48_30 +; RV32-NEXT: .LBB48_22: # %entry +; RV32-NEXT: mv a5, a1 +; RV32-NEXT: bltz a3, .LBB48_31 +; RV32-NEXT: .LBB48_23: # %entry +; RV32-NEXT: bgeu a4, a1, .LBB48_32 +; RV32-NEXT: .LBB48_24: # %entry +; RV32-NEXT: beq a6, a2, .LBB48_26 +; RV32-NEXT: .LBB48_25: # %entry +; RV32-NEXT: mv a1, a5 +; RV32-NEXT: .LBB48_26: # %entry +; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload +; RV32-NEXT: addi sp, sp, 32 +; RV32-NEXT: ret ; RV32-NEXT: .LBB48_27: # %entry ; RV32-NEXT: li a7, 0 ; RV32-NEXT: mv a0, a5 -; RV32-NEXT: beq a1, a4, .LBB48_12 +; RV32-NEXT: beq a1, a4, .LBB48_20 ; RV32-NEXT: .LBB48_28: # %entry ; RV32-NEXT: mv a0, a7 -; RV32-NEXT: bgez a3, .LBB48_13 +; RV32-NEXT: bgez a3, .LBB48_21 ; RV32-NEXT: .LBB48_29: # %entry ; RV32-NEXT: li a5, 0 ; RV32-NEXT: and a6, a6, a3 -; RV32-NEXT: beq a6, a2, .LBB48_14 +; RV32-NEXT: beq a6, a2, .LBB48_22 ; RV32-NEXT: .LBB48_30: # %entry ; RV32-NEXT: mv a0, a5 ; RV32-NEXT: mv a5, a1 -; RV32-NEXT: bgez a3, .LBB48_15 +; RV32-NEXT: bgez a3, .LBB48_23 ; RV32-NEXT: .LBB48_31: # %entry ; RV32-NEXT: lui a5, 524288 -; RV32-NEXT: bltu a4, a1, .LBB48_16 +; RV32-NEXT: bltu a4, a1, .LBB48_24 ; RV32-NEXT: .LBB48_32: # %entry ; RV32-NEXT: lui a1, 524288 -; RV32-NEXT: bne a6, a2, .LBB48_17 -; RV32-NEXT: j .LBB48_18 +; RV32-NEXT: bne a6, a2, .LBB48_25 +; RV32-NEXT: j .LBB48_26 ; ; RV64-LABEL: stest_f32i64_mm: ; RV64: # %bb.0: # %entry @@ -3942,43 +3913,41 @@ ; RV32-NEXT: .cfi_offset ra, -4 ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: call __fixunssfti@plt -; RV32-NEXT: lw a0, 20(sp) +; RV32-NEXT: lw a2, 20(sp) ; RV32-NEXT: lw a3, 16(sp) -; RV32-NEXT: li a1, 0 -; RV32-NEXT: beqz a0, .LBB49_3 +; RV32-NEXT: beqz a2, .LBB49_3 ; RV32-NEXT: # %bb.1: # %entry -; RV32-NEXT: mv a2, a1 -; RV32-NEXT: beq a2, a1, .LBB49_4 +; RV32-NEXT: li a1, 0 +; RV32-NEXT: beqz a1, .LBB49_4 ; RV32-NEXT: .LBB49_2: -; RV32-NEXT: lw a4, 8(sp) +; RV32-NEXT: lw a0, 8(sp) ; RV32-NEXT: j .LBB49_5 ; RV32-NEXT: .LBB49_3: -; RV32-NEXT: seqz a2, a3 -; RV32-NEXT: bne a2, a1, .LBB49_2 +; RV32-NEXT: seqz a1, a3 +; RV32-NEXT: bnez a1, .LBB49_2 ; RV32-NEXT: .LBB49_4: # %entry -; RV32-NEXT: mv a4, a1 +; RV32-NEXT: li a0, 0 ; RV32-NEXT: .LBB49_5: # %entry ; RV32-NEXT: xori a3, a3, 1 -; RV32-NEXT: or a3, a3, a0 -; RV32-NEXT: mv a0, a1 -; RV32-NEXT: beq a3, a1, .LBB49_7 +; RV32-NEXT: or a2, a3, a2 +; RV32-NEXT: beqz a2, .LBB49_10 ; RV32-NEXT: # %bb.6: # %entry -; RV32-NEXT: mv a0, a4 +; RV32-NEXT: bnez a1, .LBB49_11 ; RV32-NEXT: .LBB49_7: # %entry -; RV32-NEXT: bne a2, a1, .LBB49_9 -; RV32-NEXT: # %bb.8: # %entry -; RV32-NEXT: mv a2, a1 -; RV32-NEXT: bne a3, a1, .LBB49_10 -; RV32-NEXT: j .LBB49_11 -; RV32-NEXT: .LBB49_9: -; RV32-NEXT: lw a2, 12(sp) -; RV32-NEXT: beq a3, a1, .LBB49_11 -; RV32-NEXT: .LBB49_10: # %entry -; RV32-NEXT: mv a1, a2 -; RV32-NEXT: .LBB49_11: # %entry +; RV32-NEXT: bnez a2, .LBB49_9 +; RV32-NEXT: .LBB49_8: # %entry +; RV32-NEXT: li a1, 0 +; RV32-NEXT: .LBB49_9: # %entry ; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32-NEXT: addi sp, sp, 32 ; RV32-NEXT: ret +; RV32-NEXT: .LBB49_10: # %entry +; RV32-NEXT: li a0, 0 +; RV32-NEXT: beqz a1, .LBB49_7 +; RV32-NEXT: .LBB49_11: +; RV32-NEXT: lw a1, 12(sp) +; RV32-NEXT: beqz a2, .LBB49_8 +; RV32-NEXT: j .LBB49_9 ; ; RV64-LABEL: utest_f32i64_mm: ; RV64: # %bb.0: # %entry @@ -3987,16 +3956,14 @@ ; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-NEXT: .cfi_offset ra, -8 ; RV64-NEXT: call __fixunssfti@plt -; RV64-NEXT: mv a2, a0 -; RV64-NEXT: li a0, 0 ; RV64-NEXT: beqz a1, .LBB49_2 ; RV64-NEXT: # %bb.1: # %entry -; RV64-NEXT: mv a2, a0 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: .LBB49_2: # %entry -; RV64-NEXT: li a3, 1 -; RV64-NEXT: beq a1, a3, .LBB49_4 +; RV64-NEXT: li a2, 1 +; RV64-NEXT: bne a1, a2, .LBB49_4 ; RV64-NEXT: # %bb.3: # %entry -; RV64-NEXT: mv a0, a2 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: .LBB49_4: # %entry ; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-NEXT: addi sp, sp, 16 @@ -4032,7 +3999,7 @@ ; RV32-NEXT: mv a3, a4 ; RV32-NEXT: beqz a1, .LBB50_8 ; RV32-NEXT: .LBB50_4: -; RV32-NEXT: lw a5, 8(sp) +; RV32-NEXT: lw a4, 8(sp) ; RV32-NEXT: j .LBB50_9 ; RV32-NEXT: .LBB50_5: # %entry ; RV32-NEXT: li a4, 1 @@ -4045,52 +4012,49 @@ ; RV32-NEXT: seqz a1, a0 ; RV32-NEXT: bnez a1, .LBB50_4 ; RV32-NEXT: .LBB50_8: # %entry -; RV32-NEXT: li a5, 0 +; RV32-NEXT: li a4, 0 ; RV32-NEXT: .LBB50_9: # %entry ; RV32-NEXT: xori a0, a0, 1 ; RV32-NEXT: or a0, a0, a2 -; RV32-NEXT: li a4, 0 -; RV32-NEXT: beqz a0, .LBB50_11 +; RV32-NEXT: beqz a0, .LBB50_17 ; RV32-NEXT: # %bb.10: # %entry -; RV32-NEXT: mv a4, a5 +; RV32-NEXT: bnez a1, .LBB50_18 ; RV32-NEXT: .LBB50_11: # %entry -; RV32-NEXT: bnez a1, .LBB50_13 -; RV32-NEXT: # %bb.12: # %entry -; RV32-NEXT: li a5, 0 -; RV32-NEXT: li a1, 0 -; RV32-NEXT: bnez a0, .LBB50_14 -; RV32-NEXT: j .LBB50_15 -; RV32-NEXT: .LBB50_13: -; RV32-NEXT: lw a5, 12(sp) -; RV32-NEXT: li a1, 0 -; RV32-NEXT: beqz a0, .LBB50_15 -; RV32-NEXT: .LBB50_14: # %entry -; RV32-NEXT: mv a1, a5 -; RV32-NEXT: .LBB50_15: # %entry +; RV32-NEXT: beqz a0, .LBB50_19 +; RV32-NEXT: .LBB50_12: # %entry ; RV32-NEXT: bgez a2, .LBB50_20 -; RV32-NEXT: # %bb.16: # %entry +; RV32-NEXT: .LBB50_13: # %entry ; RV32-NEXT: mv a5, a4 ; RV32-NEXT: beqz a1, .LBB50_21 -; RV32-NEXT: .LBB50_17: # %entry +; RV32-NEXT: .LBB50_14: # %entry ; RV32-NEXT: mv a0, a4 ; RV32-NEXT: bnez a1, .LBB50_22 -; RV32-NEXT: .LBB50_18: # %entry +; RV32-NEXT: .LBB50_15: # %entry ; RV32-NEXT: beqz a2, .LBB50_23 -; RV32-NEXT: .LBB50_19: # %entry +; RV32-NEXT: .LBB50_16: # %entry ; RV32-NEXT: sgtz a5, a2 ; RV32-NEXT: beqz a5, .LBB50_24 ; RV32-NEXT: j .LBB50_25 +; RV32-NEXT: .LBB50_17: # %entry +; RV32-NEXT: li a4, 0 +; RV32-NEXT: beqz a1, .LBB50_11 +; RV32-NEXT: .LBB50_18: +; RV32-NEXT: lw a1, 12(sp) +; RV32-NEXT: bnez a0, .LBB50_12 +; RV32-NEXT: .LBB50_19: # %entry +; RV32-NEXT: li a1, 0 +; RV32-NEXT: bltz a2, .LBB50_13 ; RV32-NEXT: .LBB50_20: # %entry ; RV32-NEXT: li a2, 0 ; RV32-NEXT: mv a5, a4 -; RV32-NEXT: bnez a1, .LBB50_17 +; RV32-NEXT: bnez a1, .LBB50_14 ; RV32-NEXT: .LBB50_21: # %entry ; RV32-NEXT: li a5, 0 ; RV32-NEXT: mv a0, a4 -; RV32-NEXT: beqz a1, .LBB50_18 +; RV32-NEXT: beqz a1, .LBB50_15 ; RV32-NEXT: .LBB50_22: # %entry ; RV32-NEXT: mv a0, a5 -; RV32-NEXT: bnez a2, .LBB50_19 +; RV32-NEXT: bnez a2, .LBB50_16 ; RV32-NEXT: .LBB50_23: ; RV32-NEXT: snez a5, a3 ; RV32-NEXT: bnez a5, .LBB50_25 @@ -4126,18 +4090,16 @@ ; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-NEXT: .cfi_offset ra, -8 ; RV64-NEXT: call __fixsfti@plt -; RV64-NEXT: mv a2, a0 -; RV64-NEXT: li a4, 1 -; RV64-NEXT: mv a3, a1 +; RV64-NEXT: li a3, 1 +; RV64-NEXT: mv a2, a1 ; RV64-NEXT: bgtz a1, .LBB50_6 ; RV64-NEXT: # %bb.1: # %entry -; RV64-NEXT: li a0, 0 -; RV64-NEXT: bne a1, a4, .LBB50_7 +; RV64-NEXT: beq a1, a3, .LBB50_7 ; RV64-NEXT: .LBB50_2: # %entry ; RV64-NEXT: mv a1, a0 -; RV64-NEXT: blez a3, .LBB50_8 +; RV64-NEXT: blez a2, .LBB50_8 ; RV64-NEXT: .LBB50_3: # %entry -; RV64-NEXT: beqz a3, .LBB50_5 +; RV64-NEXT: beqz a2, .LBB50_5 ; RV64-NEXT: .LBB50_4: # %entry ; RV64-NEXT: mv a0, a1 ; RV64-NEXT: .LBB50_5: # %entry @@ -4145,17 +4107,16 @@ ; RV64-NEXT: addi sp, sp, 16 ; RV64-NEXT: ret ; RV64-NEXT: .LBB50_6: # %entry -; RV64-NEXT: li a2, 0 -; RV64-NEXT: li a3, 1 ; RV64-NEXT: li a0, 0 -; RV64-NEXT: beq a1, a4, .LBB50_2 +; RV64-NEXT: li a2, 1 +; RV64-NEXT: bne a1, a3, .LBB50_2 ; RV64-NEXT: .LBB50_7: # %entry -; RV64-NEXT: mv a0, a2 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: mv a1, a0 -; RV64-NEXT: bgtz a3, .LBB50_3 +; RV64-NEXT: bgtz a2, .LBB50_3 ; RV64-NEXT: .LBB50_8: # %entry ; RV64-NEXT: li a1, 0 -; RV64-NEXT: bnez a3, .LBB50_4 +; RV64-NEXT: bnez a2, .LBB50_4 ; RV64-NEXT: j .LBB50_5 entry: %conv = fptosi float %x to i128 @@ -4188,101 +4149,99 @@ ; RV32-NEXT: lui a4, 524288 ; RV32-NEXT: addi a6, a4, -1 ; RV32-NEXT: mv t0, a5 -; RV32-NEXT: bgeu a1, a6, .LBB51_19 +; RV32-NEXT: bgeu a1, a6, .LBB51_10 ; RV32-NEXT: # %bb.3: # %entry ; RV32-NEXT: lw a0, 16(sp) -; RV32-NEXT: bne a1, a6, .LBB51_20 +; RV32-NEXT: bne a1, a6, .LBB51_11 ; RV32-NEXT: .LBB51_4: # %entry ; RV32-NEXT: or t0, a0, a3 -; RV32-NEXT: bnez t0, .LBB51_21 +; RV32-NEXT: bnez t0, .LBB51_12 ; RV32-NEXT: .LBB51_5: # %entry ; RV32-NEXT: mv a7, a1 -; RV32-NEXT: bgez a3, .LBB51_22 +; RV32-NEXT: bgez a3, .LBB51_13 ; RV32-NEXT: .LBB51_6: # %entry -; RV32-NEXT: bgeu a1, a6, .LBB51_23 +; RV32-NEXT: bgeu a1, a6, .LBB51_14 ; RV32-NEXT: .LBB51_7: # %entry -; RV32-NEXT: bnez t0, .LBB51_24 +; RV32-NEXT: bnez t0, .LBB51_15 ; RV32-NEXT: .LBB51_8: # %entry -; RV32-NEXT: li a6, 0 -; RV32-NEXT: bnez a3, .LBB51_25 +; RV32-NEXT: bnez a3, .LBB51_16 ; RV32-NEXT: .LBB51_9: # %entry -; RV32-NEXT: bgez a3, .LBB51_26 +; RV32-NEXT: li a6, 0 +; RV32-NEXT: bgez a3, .LBB51_17 +; RV32-NEXT: j .LBB51_18 ; RV32-NEXT: .LBB51_10: # %entry -; RV32-NEXT: mv a7, a5 -; RV32-NEXT: bgeu a4, a1, .LBB51_27 -; RV32-NEXT: .LBB51_11: # %entry -; RV32-NEXT: mv a0, a5 -; RV32-NEXT: bne a1, a4, .LBB51_28 -; RV32-NEXT: .LBB51_12: # %entry -; RV32-NEXT: bltz a3, .LBB51_29 -; RV32-NEXT: .LBB51_13: # %entry -; RV32-NEXT: and a6, a6, a3 -; RV32-NEXT: bne a6, a2, .LBB51_30 -; RV32-NEXT: .LBB51_14: # %entry -; RV32-NEXT: mv a5, a1 -; RV32-NEXT: bltz a3, .LBB51_31 -; RV32-NEXT: .LBB51_15: # %entry -; RV32-NEXT: bgeu a4, a1, .LBB51_32 -; RV32-NEXT: .LBB51_16: # %entry -; RV32-NEXT: beq a6, a2, .LBB51_18 -; RV32-NEXT: .LBB51_17: # %entry -; RV32-NEXT: mv a1, a5 -; RV32-NEXT: .LBB51_18: # %entry -; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32-NEXT: addi sp, sp, 32 -; RV32-NEXT: ret -; RV32-NEXT: .LBB51_19: # %entry ; RV32-NEXT: li t0, -1 ; RV32-NEXT: lw a0, 16(sp) ; RV32-NEXT: beq a1, a6, .LBB51_4 -; RV32-NEXT: .LBB51_20: # %entry +; RV32-NEXT: .LBB51_11: # %entry ; RV32-NEXT: mv a5, t0 ; RV32-NEXT: or t0, a0, a3 ; RV32-NEXT: beqz t0, .LBB51_5 -; RV32-NEXT: .LBB51_21: # %entry +; RV32-NEXT: .LBB51_12: # %entry ; RV32-NEXT: mv a5, a7 ; RV32-NEXT: mv a7, a1 ; RV32-NEXT: bltz a3, .LBB51_6 -; RV32-NEXT: .LBB51_22: # %entry +; RV32-NEXT: .LBB51_13: # %entry ; RV32-NEXT: mv a7, a6 ; RV32-NEXT: bltu a1, a6, .LBB51_7 -; RV32-NEXT: .LBB51_23: # %entry +; RV32-NEXT: .LBB51_14: # %entry ; RV32-NEXT: mv a1, a6 ; RV32-NEXT: beqz t0, .LBB51_8 -; RV32-NEXT: .LBB51_24: # %entry +; RV32-NEXT: .LBB51_15: # %entry ; RV32-NEXT: mv a1, a7 -; RV32-NEXT: li a6, 0 ; RV32-NEXT: beqz a3, .LBB51_9 -; RV32-NEXT: .LBB51_25: # %entry +; RV32-NEXT: .LBB51_16: ; RV32-NEXT: srai a6, a3, 31 ; RV32-NEXT: and a6, a6, a0 -; RV32-NEXT: bltz a3, .LBB51_10 -; RV32-NEXT: .LBB51_26: # %entry +; RV32-NEXT: bltz a3, .LBB51_18 +; RV32-NEXT: .LBB51_17: # %entry ; RV32-NEXT: li a3, 0 +; RV32-NEXT: .LBB51_18: # %entry ; RV32-NEXT: mv a7, a5 -; RV32-NEXT: bltu a4, a1, .LBB51_11 +; RV32-NEXT: bgeu a4, a1, .LBB51_27 +; RV32-NEXT: # %bb.19: # %entry +; RV32-NEXT: mv a0, a5 +; RV32-NEXT: bne a1, a4, .LBB51_28 +; RV32-NEXT: .LBB51_20: # %entry +; RV32-NEXT: bltz a3, .LBB51_29 +; RV32-NEXT: .LBB51_21: # %entry +; RV32-NEXT: and a6, a6, a3 +; RV32-NEXT: bne a6, a2, .LBB51_30 +; RV32-NEXT: .LBB51_22: # %entry +; RV32-NEXT: mv a5, a1 +; RV32-NEXT: bltz a3, .LBB51_31 +; RV32-NEXT: .LBB51_23: # %entry +; RV32-NEXT: bgeu a4, a1, .LBB51_32 +; RV32-NEXT: .LBB51_24: # %entry +; RV32-NEXT: beq a6, a2, .LBB51_26 +; RV32-NEXT: .LBB51_25: # %entry +; RV32-NEXT: mv a1, a5 +; RV32-NEXT: .LBB51_26: # %entry +; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload +; RV32-NEXT: addi sp, sp, 32 +; RV32-NEXT: ret ; RV32-NEXT: .LBB51_27: # %entry ; RV32-NEXT: li a7, 0 ; RV32-NEXT: mv a0, a5 -; RV32-NEXT: beq a1, a4, .LBB51_12 +; RV32-NEXT: beq a1, a4, .LBB51_20 ; RV32-NEXT: .LBB51_28: # %entry ; RV32-NEXT: mv a0, a7 -; RV32-NEXT: bgez a3, .LBB51_13 +; RV32-NEXT: bgez a3, .LBB51_21 ; RV32-NEXT: .LBB51_29: # %entry ; RV32-NEXT: li a5, 0 ; RV32-NEXT: and a6, a6, a3 -; RV32-NEXT: beq a6, a2, .LBB51_14 +; RV32-NEXT: beq a6, a2, .LBB51_22 ; RV32-NEXT: .LBB51_30: # %entry ; RV32-NEXT: mv a0, a5 ; RV32-NEXT: mv a5, a1 -; RV32-NEXT: bgez a3, .LBB51_15 +; RV32-NEXT: bgez a3, .LBB51_23 ; RV32-NEXT: .LBB51_31: # %entry ; RV32-NEXT: lui a5, 524288 -; RV32-NEXT: bltu a4, a1, .LBB51_16 +; RV32-NEXT: bltu a4, a1, .LBB51_24 ; RV32-NEXT: .LBB51_32: # %entry ; RV32-NEXT: lui a1, 524288 -; RV32-NEXT: bne a6, a2, .LBB51_17 -; RV32-NEXT: j .LBB51_18 +; RV32-NEXT: bne a6, a2, .LBB51_25 +; RV32-NEXT: j .LBB51_26 ; ; RV64-LABEL: stest_f16i64_mm: ; RV64: # %bb.0: # %entry @@ -4355,43 +4314,41 @@ ; RV32-NEXT: call __extendhfsf2@plt ; RV32-NEXT: addi a0, sp, 8 ; RV32-NEXT: call __fixunssfti@plt -; RV32-NEXT: lw a0, 20(sp) +; RV32-NEXT: lw a2, 20(sp) ; RV32-NEXT: lw a3, 16(sp) -; RV32-NEXT: li a1, 0 -; RV32-NEXT: beqz a0, .LBB52_3 +; RV32-NEXT: beqz a2, .LBB52_3 ; RV32-NEXT: # %bb.1: # %entry -; RV32-NEXT: mv a2, a1 -; RV32-NEXT: beq a2, a1, .LBB52_4 +; RV32-NEXT: li a1, 0 +; RV32-NEXT: beqz a1, .LBB52_4 ; RV32-NEXT: .LBB52_2: -; RV32-NEXT: lw a4, 8(sp) +; RV32-NEXT: lw a0, 8(sp) ; RV32-NEXT: j .LBB52_5 ; RV32-NEXT: .LBB52_3: -; RV32-NEXT: seqz a2, a3 -; RV32-NEXT: bne a2, a1, .LBB52_2 +; RV32-NEXT: seqz a1, a3 +; RV32-NEXT: bnez a1, .LBB52_2 ; RV32-NEXT: .LBB52_4: # %entry -; RV32-NEXT: mv a4, a1 +; RV32-NEXT: li a0, 0 ; RV32-NEXT: .LBB52_5: # %entry ; RV32-NEXT: xori a3, a3, 1 -; RV32-NEXT: or a3, a3, a0 -; RV32-NEXT: mv a0, a1 -; RV32-NEXT: beq a3, a1, .LBB52_7 +; RV32-NEXT: or a2, a3, a2 +; RV32-NEXT: beqz a2, .LBB52_10 ; RV32-NEXT: # %bb.6: # %entry -; RV32-NEXT: mv a0, a4 +; RV32-NEXT: bnez a1, .LBB52_11 ; RV32-NEXT: .LBB52_7: # %entry -; RV32-NEXT: bne a2, a1, .LBB52_9 -; RV32-NEXT: # %bb.8: # %entry -; RV32-NEXT: mv a2, a1 -; RV32-NEXT: bne a3, a1, .LBB52_10 -; RV32-NEXT: j .LBB52_11 -; RV32-NEXT: .LBB52_9: -; RV32-NEXT: lw a2, 12(sp) -; RV32-NEXT: beq a3, a1, .LBB52_11 -; RV32-NEXT: .LBB52_10: # %entry -; RV32-NEXT: mv a1, a2 -; RV32-NEXT: .LBB52_11: # %entry +; RV32-NEXT: bnez a2, .LBB52_9 +; RV32-NEXT: .LBB52_8: # %entry +; RV32-NEXT: li a1, 0 +; RV32-NEXT: .LBB52_9: # %entry ; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32-NEXT: addi sp, sp, 32 ; RV32-NEXT: ret +; RV32-NEXT: .LBB52_10: # %entry +; RV32-NEXT: li a0, 0 +; RV32-NEXT: beqz a1, .LBB52_7 +; RV32-NEXT: .LBB52_11: +; RV32-NEXT: lw a1, 12(sp) +; RV32-NEXT: beqz a2, .LBB52_8 +; RV32-NEXT: j .LBB52_9 ; ; RV64-LABEL: utesth_f16i64_mm: ; RV64: # %bb.0: # %entry @@ -4402,16 +4359,14 @@ ; RV64-NEXT: fmv.x.w a0, fa0 ; RV64-NEXT: call __extendhfsf2@plt ; RV64-NEXT: call __fixunssfti@plt -; RV64-NEXT: mv a2, a0 -; RV64-NEXT: li a0, 0 ; RV64-NEXT: beqz a1, .LBB52_2 ; RV64-NEXT: # %bb.1: # %entry -; RV64-NEXT: mv a2, a0 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: .LBB52_2: # %entry -; RV64-NEXT: li a3, 1 -; RV64-NEXT: beq a1, a3, .LBB52_4 +; RV64-NEXT: li a2, 1 +; RV64-NEXT: bne a1, a2, .LBB52_4 ; RV64-NEXT: # %bb.3: # %entry -; RV64-NEXT: mv a0, a2 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: .LBB52_4: # %entry ; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-NEXT: addi sp, sp, 16 @@ -4449,7 +4404,7 @@ ; RV32-NEXT: mv a3, a4 ; RV32-NEXT: beqz a1, .LBB53_8 ; RV32-NEXT: .LBB53_4: -; RV32-NEXT: lw a5, 8(sp) +; RV32-NEXT: lw a4, 8(sp) ; RV32-NEXT: j .LBB53_9 ; RV32-NEXT: .LBB53_5: # %entry ; RV32-NEXT: li a4, 1 @@ -4462,52 +4417,49 @@ ; RV32-NEXT: seqz a1, a0 ; RV32-NEXT: bnez a1, .LBB53_4 ; RV32-NEXT: .LBB53_8: # %entry -; RV32-NEXT: li a5, 0 +; RV32-NEXT: li a4, 0 ; RV32-NEXT: .LBB53_9: # %entry ; RV32-NEXT: xori a0, a0, 1 ; RV32-NEXT: or a0, a0, a2 -; RV32-NEXT: li a4, 0 -; RV32-NEXT: beqz a0, .LBB53_11 +; RV32-NEXT: beqz a0, .LBB53_17 ; RV32-NEXT: # %bb.10: # %entry -; RV32-NEXT: mv a4, a5 +; RV32-NEXT: bnez a1, .LBB53_18 ; RV32-NEXT: .LBB53_11: # %entry -; RV32-NEXT: bnez a1, .LBB53_13 -; RV32-NEXT: # %bb.12: # %entry -; RV32-NEXT: li a5, 0 -; RV32-NEXT: li a1, 0 -; RV32-NEXT: bnez a0, .LBB53_14 -; RV32-NEXT: j .LBB53_15 -; RV32-NEXT: .LBB53_13: -; RV32-NEXT: lw a5, 12(sp) -; RV32-NEXT: li a1, 0 -; RV32-NEXT: beqz a0, .LBB53_15 -; RV32-NEXT: .LBB53_14: # %entry -; RV32-NEXT: mv a1, a5 -; RV32-NEXT: .LBB53_15: # %entry +; RV32-NEXT: beqz a0, .LBB53_19 +; RV32-NEXT: .LBB53_12: # %entry ; RV32-NEXT: bgez a2, .LBB53_20 -; RV32-NEXT: # %bb.16: # %entry +; RV32-NEXT: .LBB53_13: # %entry ; RV32-NEXT: mv a5, a4 ; RV32-NEXT: beqz a1, .LBB53_21 -; RV32-NEXT: .LBB53_17: # %entry +; RV32-NEXT: .LBB53_14: # %entry ; RV32-NEXT: mv a0, a4 ; RV32-NEXT: bnez a1, .LBB53_22 -; RV32-NEXT: .LBB53_18: # %entry +; RV32-NEXT: .LBB53_15: # %entry ; RV32-NEXT: beqz a2, .LBB53_23 -; RV32-NEXT: .LBB53_19: # %entry +; RV32-NEXT: .LBB53_16: # %entry ; RV32-NEXT: sgtz a5, a2 ; RV32-NEXT: beqz a5, .LBB53_24 ; RV32-NEXT: j .LBB53_25 +; RV32-NEXT: .LBB53_17: # %entry +; RV32-NEXT: li a4, 0 +; RV32-NEXT: beqz a1, .LBB53_11 +; RV32-NEXT: .LBB53_18: +; RV32-NEXT: lw a1, 12(sp) +; RV32-NEXT: bnez a0, .LBB53_12 +; RV32-NEXT: .LBB53_19: # %entry +; RV32-NEXT: li a1, 0 +; RV32-NEXT: bltz a2, .LBB53_13 ; RV32-NEXT: .LBB53_20: # %entry ; RV32-NEXT: li a2, 0 ; RV32-NEXT: mv a5, a4 -; RV32-NEXT: bnez a1, .LBB53_17 +; RV32-NEXT: bnez a1, .LBB53_14 ; RV32-NEXT: .LBB53_21: # %entry ; RV32-NEXT: li a5, 0 ; RV32-NEXT: mv a0, a4 -; RV32-NEXT: beqz a1, .LBB53_18 +; RV32-NEXT: beqz a1, .LBB53_15 ; RV32-NEXT: .LBB53_22: # %entry ; RV32-NEXT: mv a0, a5 -; RV32-NEXT: bnez a2, .LBB53_19 +; RV32-NEXT: bnez a2, .LBB53_16 ; RV32-NEXT: .LBB53_23: ; RV32-NEXT: snez a5, a3 ; RV32-NEXT: bnez a5, .LBB53_25 @@ -4545,18 +4497,16 @@ ; RV64-NEXT: fmv.x.w a0, fa0 ; RV64-NEXT: call __extendhfsf2@plt ; RV64-NEXT: call __fixsfti@plt -; RV64-NEXT: mv a2, a0 -; RV64-NEXT: li a4, 1 -; RV64-NEXT: mv a3, a1 +; RV64-NEXT: li a3, 1 +; RV64-NEXT: mv a2, a1 ; RV64-NEXT: bgtz a1, .LBB53_6 ; RV64-NEXT: # %bb.1: # %entry -; RV64-NEXT: li a0, 0 -; RV64-NEXT: bne a1, a4, .LBB53_7 +; RV64-NEXT: beq a1, a3, .LBB53_7 ; RV64-NEXT: .LBB53_2: # %entry ; RV64-NEXT: mv a1, a0 -; RV64-NEXT: blez a3, .LBB53_8 +; RV64-NEXT: blez a2, .LBB53_8 ; RV64-NEXT: .LBB53_3: # %entry -; RV64-NEXT: beqz a3, .LBB53_5 +; RV64-NEXT: beqz a2, .LBB53_5 ; RV64-NEXT: .LBB53_4: # %entry ; RV64-NEXT: mv a0, a1 ; RV64-NEXT: .LBB53_5: # %entry @@ -4564,17 +4514,16 @@ ; RV64-NEXT: addi sp, sp, 16 ; RV64-NEXT: ret ; RV64-NEXT: .LBB53_6: # %entry -; RV64-NEXT: li a2, 0 -; RV64-NEXT: li a3, 1 ; RV64-NEXT: li a0, 0 -; RV64-NEXT: beq a1, a4, .LBB53_2 +; RV64-NEXT: li a2, 1 +; RV64-NEXT: bne a1, a3, .LBB53_2 ; RV64-NEXT: .LBB53_7: # %entry -; RV64-NEXT: mv a0, a2 +; RV64-NEXT: li a0, 0 ; RV64-NEXT: mv a1, a0 -; RV64-NEXT: bgtz a3, .LBB53_3 +; RV64-NEXT: bgtz a2, .LBB53_3 ; RV64-NEXT: .LBB53_8: # %entry ; RV64-NEXT: li a1, 0 -; RV64-NEXT: bnez a3, .LBB53_4 +; RV64-NEXT: bnez a2, .LBB53_4 ; RV64-NEXT: j .LBB53_5 entry: %conv = fptosi half %x to i128 diff --git a/llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll b/llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll --- a/llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll +++ b/llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll @@ -3614,36 +3614,35 @@ ; CHECK-NEXT: mv s1, a1 ; CHECK-NEXT: fmv.d fa0, fs0 ; CHECK-NEXT: call __fixunsdfti@plt -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: mv a3, a1 -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: beqz a3, .LBB46_2 +; CHECK-NEXT: bnez a1, .LBB46_6 ; CHECK-NEXT: # %bb.1: # %entry -; CHECK-NEXT: mv a2, a1 +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: beq a1, a2, .LBB46_7 ; CHECK-NEXT: .LBB46_2: # %entry -; CHECK-NEXT: li a4, 1 -; CHECK-NEXT: mv a0, a1 -; CHECK-NEXT: bne a3, a4, .LBB46_7 -; CHECK-NEXT: # %bb.3: # %entry -; CHECK-NEXT: bne s1, a1, .LBB46_8 +; CHECK-NEXT: bnez s1, .LBB46_8 +; CHECK-NEXT: .LBB46_3: # %entry +; CHECK-NEXT: bne s1, a2, .LBB46_5 ; CHECK-NEXT: .LBB46_4: # %entry -; CHECK-NEXT: beq s1, a4, .LBB46_6 +; CHECK-NEXT: li s0, 0 ; CHECK-NEXT: .LBB46_5: # %entry ; CHECK-NEXT: mv a1, s0 -; CHECK-NEXT: .LBB46_6: # %entry ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload ; CHECK-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload ; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: ret +; CHECK-NEXT: .LBB46_6: # %entry +; CHECK-NEXT: li a0, 0 +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: bne a1, a2, .LBB46_2 ; CHECK-NEXT: .LBB46_7: # %entry -; CHECK-NEXT: mv a0, a2 -; CHECK-NEXT: beq s1, a1, .LBB46_4 +; CHECK-NEXT: li a0, 0 +; CHECK-NEXT: beqz s1, .LBB46_3 ; CHECK-NEXT: .LBB46_8: # %entry -; CHECK-NEXT: mv s0, a1 -; CHECK-NEXT: bne s1, a4, .LBB46_5 -; CHECK-NEXT: j .LBB46_6 +; CHECK-NEXT: li s0, 0 +; CHECK-NEXT: beq s1, a2, .LBB46_4 +; CHECK-NEXT: j .LBB46_5 entry: %conv = fptoui <2 x double> %x to <2 x i128> %spec.store.select = call <2 x i128> @llvm.umin.v2i128(<2 x i128> %conv, <2 x i128> ) @@ -3670,36 +3669,36 @@ ; CHECK-NEXT: mv s1, a1 ; CHECK-NEXT: fmv.d fa0, fs0 ; CHECK-NEXT: call __fixdfti@plt -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: li a5, 1 -; CHECK-NEXT: mv a3, a1 +; CHECK-NEXT: mv a2, a0 +; CHECK-NEXT: li a4, 1 +; CHECK-NEXT: mv a0, a1 ; CHECK-NEXT: bgtz a1, .LBB47_12 ; CHECK-NEXT: # %bb.1: # %entry -; CHECK-NEXT: mv a4, s1 +; CHECK-NEXT: mv a3, s1 ; CHECK-NEXT: bgtz s1, .LBB47_13 ; CHECK-NEXT: .LBB47_2: # %entry -; CHECK-NEXT: bgtz a2, .LBB47_14 +; CHECK-NEXT: bgtz a1, .LBB47_14 ; CHECK-NEXT: .LBB47_3: # %entry -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: bne a2, a5, .LBB47_15 +; CHECK-NEXT: beq a1, a4, .LBB47_15 ; CHECK-NEXT: .LBB47_4: # %entry ; CHECK-NEXT: bgtz s1, .LBB47_16 ; CHECK-NEXT: .LBB47_5: # %entry -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: bne s1, a5, .LBB47_17 +; CHECK-NEXT: beq s1, a4, .LBB47_17 ; CHECK-NEXT: .LBB47_6: # %entry -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: blez a4, .LBB47_18 +; CHECK-NEXT: mv a1, s0 +; CHECK-NEXT: blez a3, .LBB47_18 ; CHECK-NEXT: .LBB47_7: # %entry -; CHECK-NEXT: bnez a4, .LBB47_19 +; CHECK-NEXT: bnez a3, .LBB47_19 ; CHECK-NEXT: .LBB47_8: # %entry -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: blez a3, .LBB47_20 +; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: blez a0, .LBB47_20 ; CHECK-NEXT: .LBB47_9: # %entry -; CHECK-NEXT: beqz a3, .LBB47_11 +; CHECK-NEXT: beqz a0, .LBB47_11 ; CHECK-NEXT: .LBB47_10: # %entry -; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: mv a2, a1 ; CHECK-NEXT: .LBB47_11: # %entry +; CHECK-NEXT: mv a0, s0 +; CHECK-NEXT: mv a1, a2 ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -3707,37 +3706,35 @@ ; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: ret ; CHECK-NEXT: .LBB47_12: # %entry -; CHECK-NEXT: li a3, 1 -; CHECK-NEXT: mv a4, s1 +; CHECK-NEXT: li a0, 1 +; CHECK-NEXT: mv a3, s1 ; CHECK-NEXT: blez s1, .LBB47_2 ; CHECK-NEXT: .LBB47_13: # %entry -; CHECK-NEXT: li a4, 1 -; CHECK-NEXT: blez a2, .LBB47_3 +; CHECK-NEXT: li a3, 1 +; CHECK-NEXT: blez a1, .LBB47_3 ; CHECK-NEXT: .LBB47_14: # %entry -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: beq a2, a5, .LBB47_4 +; CHECK-NEXT: li a2, 0 +; CHECK-NEXT: bne a1, a4, .LBB47_4 ; CHECK-NEXT: .LBB47_15: # %entry -; CHECK-NEXT: mv a1, a0 +; CHECK-NEXT: li a2, 0 ; CHECK-NEXT: blez s1, .LBB47_5 ; CHECK-NEXT: .LBB47_16: # %entry ; CHECK-NEXT: li s0, 0 -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: beq s1, a5, .LBB47_6 +; CHECK-NEXT: bne s1, a4, .LBB47_6 ; CHECK-NEXT: .LBB47_17: # %entry -; CHECK-NEXT: mv a0, s0 -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: bgtz a4, .LBB47_7 +; CHECK-NEXT: li s0, 0 +; CHECK-NEXT: mv a1, s0 +; CHECK-NEXT: bgtz a3, .LBB47_7 ; CHECK-NEXT: .LBB47_18: # %entry -; CHECK-NEXT: li a2, 0 -; CHECK-NEXT: beqz a4, .LBB47_8 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: beqz a3, .LBB47_8 ; CHECK-NEXT: .LBB47_19: # %entry -; CHECK-NEXT: mv a0, a2 -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: bgtz a3, .LBB47_9 +; CHECK-NEXT: mv s0, a1 +; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: bgtz a0, .LBB47_9 ; CHECK-NEXT: .LBB47_20: # %entry -; CHECK-NEXT: li a2, 0 -; CHECK-NEXT: bnez a3, .LBB47_10 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: bnez a0, .LBB47_10 ; CHECK-NEXT: j .LBB47_11 entry: %conv = fptosi <2 x double> %x to <2 x i128> @@ -3882,36 +3879,35 @@ ; CHECK-NEXT: mv s1, a1 ; CHECK-NEXT: fmv.s fa0, fs0 ; CHECK-NEXT: call __fixunssfti@plt -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: mv a3, a1 -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: beqz a3, .LBB49_2 +; CHECK-NEXT: bnez a1, .LBB49_6 ; CHECK-NEXT: # %bb.1: # %entry -; CHECK-NEXT: mv a2, a1 +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: beq a1, a2, .LBB49_7 ; CHECK-NEXT: .LBB49_2: # %entry -; CHECK-NEXT: li a4, 1 -; CHECK-NEXT: mv a0, a1 -; CHECK-NEXT: bne a3, a4, .LBB49_7 -; CHECK-NEXT: # %bb.3: # %entry -; CHECK-NEXT: bne s1, a1, .LBB49_8 +; CHECK-NEXT: bnez s1, .LBB49_8 +; CHECK-NEXT: .LBB49_3: # %entry +; CHECK-NEXT: bne s1, a2, .LBB49_5 ; CHECK-NEXT: .LBB49_4: # %entry -; CHECK-NEXT: beq s1, a4, .LBB49_6 +; CHECK-NEXT: li s0, 0 ; CHECK-NEXT: .LBB49_5: # %entry ; CHECK-NEXT: mv a1, s0 -; CHECK-NEXT: .LBB49_6: # %entry ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload ; CHECK-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload ; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: ret +; CHECK-NEXT: .LBB49_6: # %entry +; CHECK-NEXT: li a0, 0 +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: bne a1, a2, .LBB49_2 ; CHECK-NEXT: .LBB49_7: # %entry -; CHECK-NEXT: mv a0, a2 -; CHECK-NEXT: beq s1, a1, .LBB49_4 +; CHECK-NEXT: li a0, 0 +; CHECK-NEXT: beqz s1, .LBB49_3 ; CHECK-NEXT: .LBB49_8: # %entry -; CHECK-NEXT: mv s0, a1 -; CHECK-NEXT: bne s1, a4, .LBB49_5 -; CHECK-NEXT: j .LBB49_6 +; CHECK-NEXT: li s0, 0 +; CHECK-NEXT: beq s1, a2, .LBB49_4 +; CHECK-NEXT: j .LBB49_5 entry: %conv = fptoui <2 x float> %x to <2 x i128> %spec.store.select = call <2 x i128> @llvm.umin.v2i128(<2 x i128> %conv, <2 x i128> ) @@ -3938,36 +3934,36 @@ ; CHECK-NEXT: mv s1, a1 ; CHECK-NEXT: fmv.s fa0, fs0 ; CHECK-NEXT: call __fixsfti@plt -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: li a5, 1 -; CHECK-NEXT: mv a3, a1 +; CHECK-NEXT: mv a2, a0 +; CHECK-NEXT: li a4, 1 +; CHECK-NEXT: mv a0, a1 ; CHECK-NEXT: bgtz a1, .LBB50_12 ; CHECK-NEXT: # %bb.1: # %entry -; CHECK-NEXT: mv a4, s1 +; CHECK-NEXT: mv a3, s1 ; CHECK-NEXT: bgtz s1, .LBB50_13 ; CHECK-NEXT: .LBB50_2: # %entry -; CHECK-NEXT: bgtz a2, .LBB50_14 +; CHECK-NEXT: bgtz a1, .LBB50_14 ; CHECK-NEXT: .LBB50_3: # %entry -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: bne a2, a5, .LBB50_15 +; CHECK-NEXT: beq a1, a4, .LBB50_15 ; CHECK-NEXT: .LBB50_4: # %entry ; CHECK-NEXT: bgtz s1, .LBB50_16 ; CHECK-NEXT: .LBB50_5: # %entry -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: bne s1, a5, .LBB50_17 +; CHECK-NEXT: beq s1, a4, .LBB50_17 ; CHECK-NEXT: .LBB50_6: # %entry -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: blez a4, .LBB50_18 +; CHECK-NEXT: mv a1, s0 +; CHECK-NEXT: blez a3, .LBB50_18 ; CHECK-NEXT: .LBB50_7: # %entry -; CHECK-NEXT: bnez a4, .LBB50_19 +; CHECK-NEXT: bnez a3, .LBB50_19 ; CHECK-NEXT: .LBB50_8: # %entry -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: blez a3, .LBB50_20 +; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: blez a0, .LBB50_20 ; CHECK-NEXT: .LBB50_9: # %entry -; CHECK-NEXT: beqz a3, .LBB50_11 +; CHECK-NEXT: beqz a0, .LBB50_11 ; CHECK-NEXT: .LBB50_10: # %entry -; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: mv a2, a1 ; CHECK-NEXT: .LBB50_11: # %entry +; CHECK-NEXT: mv a0, s0 +; CHECK-NEXT: mv a1, a2 ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -3975,37 +3971,35 @@ ; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: ret ; CHECK-NEXT: .LBB50_12: # %entry -; CHECK-NEXT: li a3, 1 -; CHECK-NEXT: mv a4, s1 +; CHECK-NEXT: li a0, 1 +; CHECK-NEXT: mv a3, s1 ; CHECK-NEXT: blez s1, .LBB50_2 ; CHECK-NEXT: .LBB50_13: # %entry -; CHECK-NEXT: li a4, 1 -; CHECK-NEXT: blez a2, .LBB50_3 +; CHECK-NEXT: li a3, 1 +; CHECK-NEXT: blez a1, .LBB50_3 ; CHECK-NEXT: .LBB50_14: # %entry -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: beq a2, a5, .LBB50_4 +; CHECK-NEXT: li a2, 0 +; CHECK-NEXT: bne a1, a4, .LBB50_4 ; CHECK-NEXT: .LBB50_15: # %entry -; CHECK-NEXT: mv a1, a0 +; CHECK-NEXT: li a2, 0 ; CHECK-NEXT: blez s1, .LBB50_5 ; CHECK-NEXT: .LBB50_16: # %entry ; CHECK-NEXT: li s0, 0 -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: beq s1, a5, .LBB50_6 +; CHECK-NEXT: bne s1, a4, .LBB50_6 ; CHECK-NEXT: .LBB50_17: # %entry -; CHECK-NEXT: mv a0, s0 -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: bgtz a4, .LBB50_7 +; CHECK-NEXT: li s0, 0 +; CHECK-NEXT: mv a1, s0 +; CHECK-NEXT: bgtz a3, .LBB50_7 ; CHECK-NEXT: .LBB50_18: # %entry -; CHECK-NEXT: li a2, 0 -; CHECK-NEXT: beqz a4, .LBB50_8 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: beqz a3, .LBB50_8 ; CHECK-NEXT: .LBB50_19: # %entry -; CHECK-NEXT: mv a0, a2 -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: bgtz a3, .LBB50_9 +; CHECK-NEXT: mv s0, a1 +; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: bgtz a0, .LBB50_9 ; CHECK-NEXT: .LBB50_20: # %entry -; CHECK-NEXT: li a2, 0 -; CHECK-NEXT: bnez a3, .LBB50_10 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: bnez a0, .LBB50_10 ; CHECK-NEXT: j .LBB50_11 entry: %conv = fptosi <2 x float> %x to <2 x i128> @@ -4154,36 +4148,35 @@ ; CHECK-NEXT: mv a0, s2 ; CHECK-NEXT: call __extendhfsf2@plt ; CHECK-NEXT: call __fixunssfti@plt -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: mv a3, a1 -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: beqz a3, .LBB52_2 +; CHECK-NEXT: bnez a1, .LBB52_6 ; CHECK-NEXT: # %bb.1: # %entry -; CHECK-NEXT: mv a2, a1 +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: beq a1, a2, .LBB52_7 ; CHECK-NEXT: .LBB52_2: # %entry -; CHECK-NEXT: li a4, 1 -; CHECK-NEXT: mv a0, a1 -; CHECK-NEXT: bne a3, a4, .LBB52_7 -; CHECK-NEXT: # %bb.3: # %entry -; CHECK-NEXT: bne s1, a1, .LBB52_8 +; CHECK-NEXT: bnez s1, .LBB52_8 +; CHECK-NEXT: .LBB52_3: # %entry +; CHECK-NEXT: bne s1, a2, .LBB52_5 ; CHECK-NEXT: .LBB52_4: # %entry -; CHECK-NEXT: beq s1, a4, .LBB52_6 +; CHECK-NEXT: li s0, 0 ; CHECK-NEXT: .LBB52_5: # %entry ; CHECK-NEXT: mv a1, s0 -; CHECK-NEXT: .LBB52_6: # %entry ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s2, 0(sp) # 8-byte Folded Reload ; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: ret +; CHECK-NEXT: .LBB52_6: # %entry +; CHECK-NEXT: li a0, 0 +; CHECK-NEXT: li a2, 1 +; CHECK-NEXT: bne a1, a2, .LBB52_2 ; CHECK-NEXT: .LBB52_7: # %entry -; CHECK-NEXT: mv a0, a2 -; CHECK-NEXT: beq s1, a1, .LBB52_4 +; CHECK-NEXT: li a0, 0 +; CHECK-NEXT: beqz s1, .LBB52_3 ; CHECK-NEXT: .LBB52_8: # %entry -; CHECK-NEXT: mv s0, a1 -; CHECK-NEXT: bne s1, a4, .LBB52_5 -; CHECK-NEXT: j .LBB52_6 +; CHECK-NEXT: li s0, 0 +; CHECK-NEXT: beq s1, a2, .LBB52_4 +; CHECK-NEXT: j .LBB52_5 entry: %conv = fptoui <2 x half> %x to <2 x i128> %spec.store.select = call <2 x i128> @llvm.umin.v2i128(<2 x i128> %conv, <2 x i128> ) @@ -4212,36 +4205,36 @@ ; CHECK-NEXT: mv a0, s2 ; CHECK-NEXT: call __extendhfsf2@plt ; CHECK-NEXT: call __fixsfti@plt -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: li a5, 1 -; CHECK-NEXT: mv a3, a1 +; CHECK-NEXT: mv a2, a0 +; CHECK-NEXT: li a4, 1 +; CHECK-NEXT: mv a0, a1 ; CHECK-NEXT: bgtz a1, .LBB53_12 ; CHECK-NEXT: # %bb.1: # %entry -; CHECK-NEXT: mv a4, s1 +; CHECK-NEXT: mv a3, s1 ; CHECK-NEXT: bgtz s1, .LBB53_13 ; CHECK-NEXT: .LBB53_2: # %entry -; CHECK-NEXT: bgtz a2, .LBB53_14 +; CHECK-NEXT: bgtz a1, .LBB53_14 ; CHECK-NEXT: .LBB53_3: # %entry -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: bne a2, a5, .LBB53_15 +; CHECK-NEXT: beq a1, a4, .LBB53_15 ; CHECK-NEXT: .LBB53_4: # %entry ; CHECK-NEXT: bgtz s1, .LBB53_16 ; CHECK-NEXT: .LBB53_5: # %entry -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: bne s1, a5, .LBB53_17 +; CHECK-NEXT: beq s1, a4, .LBB53_17 ; CHECK-NEXT: .LBB53_6: # %entry -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: blez a4, .LBB53_18 +; CHECK-NEXT: mv a1, s0 +; CHECK-NEXT: blez a3, .LBB53_18 ; CHECK-NEXT: .LBB53_7: # %entry -; CHECK-NEXT: bnez a4, .LBB53_19 +; CHECK-NEXT: bnez a3, .LBB53_19 ; CHECK-NEXT: .LBB53_8: # %entry -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: blez a3, .LBB53_20 +; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: blez a0, .LBB53_20 ; CHECK-NEXT: .LBB53_9: # %entry -; CHECK-NEXT: beqz a3, .LBB53_11 +; CHECK-NEXT: beqz a0, .LBB53_11 ; CHECK-NEXT: .LBB53_10: # %entry -; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: mv a2, a1 ; CHECK-NEXT: .LBB53_11: # %entry +; CHECK-NEXT: mv a0, s0 +; CHECK-NEXT: mv a1, a2 ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -4249,37 +4242,35 @@ ; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: ret ; CHECK-NEXT: .LBB53_12: # %entry -; CHECK-NEXT: li a3, 1 -; CHECK-NEXT: mv a4, s1 +; CHECK-NEXT: li a0, 1 +; CHECK-NEXT: mv a3, s1 ; CHECK-NEXT: blez s1, .LBB53_2 ; CHECK-NEXT: .LBB53_13: # %entry -; CHECK-NEXT: li a4, 1 -; CHECK-NEXT: blez a2, .LBB53_3 +; CHECK-NEXT: li a3, 1 +; CHECK-NEXT: blez a1, .LBB53_3 ; CHECK-NEXT: .LBB53_14: # %entry -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: li a1, 0 -; CHECK-NEXT: beq a2, a5, .LBB53_4 +; CHECK-NEXT: li a2, 0 +; CHECK-NEXT: bne a1, a4, .LBB53_4 ; CHECK-NEXT: .LBB53_15: # %entry -; CHECK-NEXT: mv a1, a0 +; CHECK-NEXT: li a2, 0 ; CHECK-NEXT: blez s1, .LBB53_5 ; CHECK-NEXT: .LBB53_16: # %entry ; CHECK-NEXT: li s0, 0 -; CHECK-NEXT: li a0, 0 -; CHECK-NEXT: beq s1, a5, .LBB53_6 +; CHECK-NEXT: bne s1, a4, .LBB53_6 ; CHECK-NEXT: .LBB53_17: # %entry -; CHECK-NEXT: mv a0, s0 -; CHECK-NEXT: mv a2, a0 -; CHECK-NEXT: bgtz a4, .LBB53_7 +; CHECK-NEXT: li s0, 0 +; CHECK-NEXT: mv a1, s0 +; CHECK-NEXT: bgtz a3, .LBB53_7 ; CHECK-NEXT: .LBB53_18: # %entry -; CHECK-NEXT: li a2, 0 -; CHECK-NEXT: beqz a4, .LBB53_8 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: beqz a3, .LBB53_8 ; CHECK-NEXT: .LBB53_19: # %entry -; CHECK-NEXT: mv a0, a2 -; CHECK-NEXT: mv a2, a1 -; CHECK-NEXT: bgtz a3, .LBB53_9 +; CHECK-NEXT: mv s0, a1 +; CHECK-NEXT: mv a1, a2 +; CHECK-NEXT: bgtz a0, .LBB53_9 ; CHECK-NEXT: .LBB53_20: # %entry -; CHECK-NEXT: li a2, 0 -; CHECK-NEXT: bnez a3, .LBB53_10 +; CHECK-NEXT: li a1, 0 +; CHECK-NEXT: bnez a0, .LBB53_10 ; CHECK-NEXT: j .LBB53_11 entry: %conv = fptosi <2 x half> %x to <2 x i128> diff --git a/llvm/test/CodeGen/RISCV/half-convert-strict.ll b/llvm/test/CodeGen/RISCV/half-convert-strict.ll --- a/llvm/test/CodeGen/RISCV/half-convert-strict.ll +++ b/llvm/test/CodeGen/RISCV/half-convert-strict.ll @@ -112,31 +112,28 @@ define i32 @fcvt_wu_h_multiple_use(half %x, i32* %y) { ; CHECKIZFH-LABEL: fcvt_wu_h_multiple_use: ; CHECKIZFH: # %bb.0: -; CHECKIZFH-NEXT: fcvt.wu.h a1, fa0, rtz -; CHECKIZFH-NEXT: li a0, 1 -; CHECKIZFH-NEXT: beqz a1, .LBB4_2 +; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rtz +; CHECKIZFH-NEXT: bnez a0, .LBB4_2 ; CHECKIZFH-NEXT: # %bb.1: -; CHECKIZFH-NEXT: mv a0, a1 +; CHECKIZFH-NEXT: li a0, 1 ; CHECKIZFH-NEXT: .LBB4_2: ; CHECKIZFH-NEXT: ret ; ; RV32IDZFH-LABEL: fcvt_wu_h_multiple_use: ; RV32IDZFH: # %bb.0: -; RV32IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz -; RV32IDZFH-NEXT: li a0, 1 -; RV32IDZFH-NEXT: beqz a1, .LBB4_2 +; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz +; RV32IDZFH-NEXT: bnez a0, .LBB4_2 ; RV32IDZFH-NEXT: # %bb.1: -; RV32IDZFH-NEXT: mv a0, a1 +; RV32IDZFH-NEXT: li a0, 1 ; RV32IDZFH-NEXT: .LBB4_2: ; RV32IDZFH-NEXT: ret ; ; RV64IDZFH-LABEL: fcvt_wu_h_multiple_use: ; RV64IDZFH: # %bb.0: -; RV64IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz -; RV64IDZFH-NEXT: li a0, 1 -; RV64IDZFH-NEXT: beqz a1, .LBB4_2 +; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz +; RV64IDZFH-NEXT: bnez a0, .LBB4_2 ; RV64IDZFH-NEXT: # %bb.1: -; RV64IDZFH-NEXT: mv a0, a1 +; RV64IDZFH-NEXT: li a0, 1 ; RV64IDZFH-NEXT: .LBB4_2: ; RV64IDZFH-NEXT: ret %a = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %x, metadata !"fpexcept.strict") strictfp diff --git a/llvm/test/CodeGen/RISCV/half-convert.ll b/llvm/test/CodeGen/RISCV/half-convert.ll --- a/llvm/test/CodeGen/RISCV/half-convert.ll +++ b/llvm/test/CodeGen/RISCV/half-convert.ll @@ -127,12 +127,11 @@ ; ; RV32I-LABEL: fcvt_si_h_sat: ; RV32I: # %bb.0: # %start -; RV32I-NEXT: addi sp, sp, -32 -; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: slli a0, a0, 16 ; RV32I-NEXT: srli a0, a0, 16 ; RV32I-NEXT: call __extendhfsf2@plt @@ -142,45 +141,42 @@ ; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfsi@plt -; RV32I-NEXT: li s1, 0 -; RV32I-NEXT: lui s3, 1048568 -; RV32I-NEXT: bltz s2, .LBB1_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB1_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: lui s1, 1048568 ; RV32I-NEXT: .LBB1_2: # %start ; RV32I-NEXT: lui a0, 290816 ; RV32I-NEXT: addi a1, a0, -512 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bge s1, a0, .LBB1_4 -; RV32I-NEXT: # %bb.3: +; RV32I-NEXT: blez a0, .LBB1_4 +; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: lui a0, 8 -; RV32I-NEXT: addi s3, a0, -1 +; RV32I-NEXT: addi s1, a0, -1 ; RV32I-NEXT: .LBB1_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s1, .LBB1_6 +; RV32I-NEXT: beqz a0, .LBB1_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s1, s3 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB1_6: # %start ; RV32I-NEXT: mv a0, s1 -; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 32 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_si_h_sat: ; RV64I: # %bb.0: # %start -; RV64I-NEXT: addi sp, sp, -48 -; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: slli a0, a0, 48 ; RV64I-NEXT: srli a0, a0, 48 ; RV64I-NEXT: call __extendhfsf2@plt @@ -190,35 +186,33 @@ ; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: lui s3, 1048568 -; RV64I-NEXT: bltz s2, .LBB1_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB1_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: lui s1, 1048568 ; RV64I-NEXT: .LBB1_2: # %start ; RV64I-NEXT: lui a0, 290816 ; RV64I-NEXT: addiw a1, a0, -512 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bge s1, a0, .LBB1_4 -; RV64I-NEXT: # %bb.3: +; RV64I-NEXT: blez a0, .LBB1_4 +; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: lui a0, 8 -; RV64I-NEXT: addiw s3, a0, -1 +; RV64I-NEXT: addiw s1, a0, -1 ; RV64I-NEXT: .LBB1_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s1, .LBB1_6 +; RV64I-NEXT: beqz a0, .LBB1_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s1, s3 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB1_6: # %start ; RV64I-NEXT: mv a0, s1 -; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 48 +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret start: %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) @@ -328,29 +322,29 @@ ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: lui a1, 16 -; RV32I-NEXT: addi s0, a1, -1 -; RV32I-NEXT: and a0, a0, s0 +; RV32I-NEXT: addi s3, a1, -1 +; RV32I-NEXT: and a0, a0, s3 ; RV32I-NEXT: call __extendhfsf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt ; RV32I-NEXT: mv s2, a0 -; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: li s3, 0 -; RV32I-NEXT: bltz s2, .LBB3_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB3_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB3_2: # %start ; RV32I-NEXT: lui a0, 292864 ; RV32I-NEXT: addi a1, a0, -256 -; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bgtz a0, .LBB3_4 +; RV32I-NEXT: blez a0, .LBB3_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s0, s3 +; RV32I-NEXT: mv s1, s3 ; RV32I-NEXT: .LBB3_4: # %start -; RV32I-NEXT: mv a0, s0 +; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload @@ -368,29 +362,29 @@ ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: lui a1, 16 -; RV64I-NEXT: addiw s0, a1, -1 -; RV64I-NEXT: and a0, a0, s0 +; RV64I-NEXT: addiw s3, a1, -1 +; RV64I-NEXT: and a0, a0, s3 ; RV64I-NEXT: call __extendhfsf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gesf2@plt ; RV64I-NEXT: mv s2, a0 -; RV64I-NEXT: mv a0, s1 +; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s3, 0 -; RV64I-NEXT: bltz s2, .LBB3_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB3_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB3_2: # %start ; RV64I-NEXT: lui a0, 292864 ; RV64I-NEXT: addiw a1, a0, -256 -; RV64I-NEXT: mv a0, s1 +; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bgtz a0, .LBB3_4 +; RV64I-NEXT: blez a0, .LBB3_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv s0, s3 +; RV64I-NEXT: mv s1, s3 ; RV64I-NEXT: .LBB3_4: # %start -; RV64I-NEXT: mv a0, s0 +; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload @@ -483,7 +477,6 @@ ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: slli a0, a0, 16 ; RV32I-NEXT: srli a0, a0, 16 ; RV32I-NEXT: call __extendhfsf2@plt @@ -493,27 +486,26 @@ ; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfsi@plt -; RV32I-NEXT: li s1, 0 -; RV32I-NEXT: lui s4, 524288 +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: lui s3, 524288 -; RV32I-NEXT: bltz s2, .LBB5_2 +; RV32I-NEXT: bgez s2, .LBB5_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: lui s1, 524288 ; RV32I-NEXT: .LBB5_2: # %start ; RV32I-NEXT: lui a0, 323584 ; RV32I-NEXT: addi a1, a0, -1 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bge s1, a0, .LBB5_4 -; RV32I-NEXT: # %bb.3: -; RV32I-NEXT: addi s3, s4, -1 +; RV32I-NEXT: blez a0, .LBB5_4 +; RV32I-NEXT: # %bb.3: # %start +; RV32I-NEXT: addi s1, s3, -1 ; RV32I-NEXT: .LBB5_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s1, .LBB5_6 +; RV32I-NEXT: beqz a0, .LBB5_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s1, s3 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB5_6: # %start ; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload @@ -521,7 +513,6 @@ ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; @@ -533,7 +524,6 @@ ; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: slli a0, a0, 48 ; RV64I-NEXT: srli a0, a0, 48 ; RV64I-NEXT: call __extendhfsf2@plt @@ -543,27 +533,26 @@ ; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: lui s4, 524288 +; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: lui s3, 524288 -; RV64I-NEXT: bltz s2, .LBB5_2 +; RV64I-NEXT: bgez s2, .LBB5_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: lui s1, 524288 ; RV64I-NEXT: .LBB5_2: # %start ; RV64I-NEXT: lui a0, 323584 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bge s1, a0, .LBB5_4 -; RV64I-NEXT: # %bb.3: -; RV64I-NEXT: addiw s3, s4, -1 +; RV64I-NEXT: blez a0, .LBB5_4 +; RV64I-NEXT: # %bb.3: # %start +; RV64I-NEXT: addiw s1, s3, -1 ; RV64I-NEXT: .LBB5_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s1, .LBB5_6 +; RV64I-NEXT: beqz a0, .LBB5_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s1, s3 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB5_6: # %start ; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload @@ -571,7 +560,6 @@ ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: ret start: @@ -628,31 +616,28 @@ define i32 @fcvt_wu_h_multiple_use(half %x, i32* %y) nounwind { ; CHECKIZFH-LABEL: fcvt_wu_h_multiple_use: ; CHECKIZFH: # %bb.0: -; CHECKIZFH-NEXT: fcvt.wu.h a1, fa0, rtz -; CHECKIZFH-NEXT: li a0, 1 -; CHECKIZFH-NEXT: beqz a1, .LBB7_2 +; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rtz +; CHECKIZFH-NEXT: bnez a0, .LBB7_2 ; CHECKIZFH-NEXT: # %bb.1: -; CHECKIZFH-NEXT: mv a0, a1 +; CHECKIZFH-NEXT: li a0, 1 ; CHECKIZFH-NEXT: .LBB7_2: ; CHECKIZFH-NEXT: ret ; ; RV32IDZFH-LABEL: fcvt_wu_h_multiple_use: ; RV32IDZFH: # %bb.0: -; RV32IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz -; RV32IDZFH-NEXT: li a0, 1 -; RV32IDZFH-NEXT: beqz a1, .LBB7_2 +; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz +; RV32IDZFH-NEXT: bnez a0, .LBB7_2 ; RV32IDZFH-NEXT: # %bb.1: -; RV32IDZFH-NEXT: mv a0, a1 +; RV32IDZFH-NEXT: li a0, 1 ; RV32IDZFH-NEXT: .LBB7_2: ; RV32IDZFH-NEXT: ret ; ; RV64IDZFH-LABEL: fcvt_wu_h_multiple_use: ; RV64IDZFH: # %bb.0: -; RV64IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz -; RV64IDZFH-NEXT: li a0, 1 -; RV64IDZFH-NEXT: beqz a1, .LBB7_2 +; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz +; RV64IDZFH-NEXT: bnez a0, .LBB7_2 ; RV64IDZFH-NEXT: # %bb.1: -; RV64IDZFH-NEXT: mv a0, a1 +; RV64IDZFH-NEXT: li a0, 1 ; RV64IDZFH-NEXT: .LBB7_2: ; RV64IDZFH-NEXT: ret ; @@ -664,11 +649,9 @@ ; RV32I-NEXT: srli a0, a0, 16 ; RV32I-NEXT: call __extendhfsf2@plt ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: mv a1, a0 -; RV32I-NEXT: li a0, 1 -; RV32I-NEXT: beqz a1, .LBB7_2 +; RV32I-NEXT: bnez a0, .LBB7_2 ; RV32I-NEXT: # %bb.1: -; RV32I-NEXT: mv a0, a1 +; RV32I-NEXT: li a0, 1 ; RV32I-NEXT: .LBB7_2: ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 16 @@ -682,11 +665,9 @@ ; RV64I-NEXT: srli a0, a0, 48 ; RV64I-NEXT: call __extendhfsf2@plt ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, 1 -; RV64I-NEXT: beqz a1, .LBB7_2 +; RV64I-NEXT: bnez a0, .LBB7_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, 1 ; RV64I-NEXT: .LBB7_2: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 @@ -738,24 +719,23 @@ ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: bltz s1, .LBB8_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB8_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB8_2: # %start ; RV32I-NEXT: lui a0, 325632 ; RV32I-NEXT: addi a1, a0, -1 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: mv a1, a0 -; RV32I-NEXT: li a0, -1 -; RV32I-NEXT: bgtz a1, .LBB8_4 +; RV32I-NEXT: blez a0, .LBB8_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a0, s2 +; RV32I-NEXT: li s1, -1 ; RV32I-NEXT: .LBB8_4: # %start +; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload @@ -779,17 +759,17 @@ ; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: bltz s2, .LBB8_2 -; RV64I-NEXT: # %bb.1: # %start ; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB8_2 +; RV64I-NEXT: # %bb.1: # %start +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB8_2: # %start ; RV64I-NEXT: lui a0, 325632 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: blez a0, .LBB8_4 -; RV64I-NEXT: # %bb.3: +; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: srli s1, a0, 32 ; RV64I-NEXT: .LBB8_4: # %start @@ -1002,8 +982,6 @@ ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: slli a0, a0, 16 ; RV32I-NEXT: srli a0, a0, 16 ; RV32I-NEXT: call __extendhfsf2@plt @@ -1013,64 +991,58 @@ ; RV32I-NEXT: mv s3, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfdi@plt +; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s2, a1 -; RV32I-NEXT: li s1, 0 -; RV32I-NEXT: li s5, 0 -; RV32I-NEXT: bltz s3, .LBB10_2 +; RV32I-NEXT: bgez s3, .LBB10_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s5, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB10_2: # %start ; RV32I-NEXT: lui a0, 389120 -; RV32I-NEXT: addi s4, a0, -1 +; RV32I-NEXT: addi s3, a0, -1 ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li s6, -1 -; RV32I-NEXT: blt s1, a0, .LBB10_4 +; RV32I-NEXT: blez a0, .LBB10_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s6, s5 +; RV32I-NEXT: li s1, -1 ; RV32I-NEXT: .LBB10_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: mv s3, s1 -; RV32I-NEXT: bne a0, s1, .LBB10_6 +; RV32I-NEXT: beqz a0, .LBB10_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s3, s6 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB10_6: # %start ; RV32I-NEXT: lui a1, 913408 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: lui s6, 524288 -; RV32I-NEXT: lui s5, 524288 -; RV32I-NEXT: blt a0, s1, .LBB10_8 +; RV32I-NEXT: lui s4, 524288 +; RV32I-NEXT: bgez a0, .LBB10_8 ; RV32I-NEXT: # %bb.7: # %start -; RV32I-NEXT: mv s5, s2 +; RV32I-NEXT: lui s2, 524288 ; RV32I-NEXT: .LBB10_8: # %start ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bge s1, a0, .LBB10_10 -; RV32I-NEXT: # %bb.9: -; RV32I-NEXT: addi s5, s6, -1 +; RV32I-NEXT: blez a0, .LBB10_10 +; RV32I-NEXT: # %bb.9: # %start +; RV32I-NEXT: addi s2, s4, -1 ; RV32I-NEXT: .LBB10_10: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s1, .LBB10_12 +; RV32I-NEXT: beqz a0, .LBB10_12 ; RV32I-NEXT: # %bb.11: # %start -; RV32I-NEXT: mv s1, s5 +; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: .LBB10_12: # %start -; RV32I-NEXT: mv a0, s3 -; RV32I-NEXT: mv a1, s1 +; RV32I-NEXT: mv a0, s1 +; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; @@ -1082,47 +1054,42 @@ ; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: slli a0, a0, 48 ; RV64I-NEXT: srli a0, a0, 48 ; RV64I-NEXT: call __extendhfsf2@plt ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: lui a1, 913408 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s1, 0 -; RV64I-NEXT: li s4, -1 -; RV64I-NEXT: bltz s3, .LBB10_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: li s3, -1 +; RV64I-NEXT: bgez s2, .LBB10_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 -; RV64I-NEXT: j .LBB10_3 -; RV64I-NEXT: .LBB10_2: -; RV64I-NEXT: slli s2, s4, 63 -; RV64I-NEXT: .LBB10_3: # %start +; RV64I-NEXT: slli s1, s3, 63 +; RV64I-NEXT: .LBB10_2: # %start ; RV64I-NEXT: lui a0, 389120 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bge s1, a0, .LBB10_5 -; RV64I-NEXT: # %bb.4: -; RV64I-NEXT: srli s2, s4, 1 -; RV64I-NEXT: .LBB10_5: # %start +; RV64I-NEXT: blez a0, .LBB10_4 +; RV64I-NEXT: # %bb.3: # %start +; RV64I-NEXT: srli s1, s3, 1 +; RV64I-NEXT: .LBB10_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s1, .LBB10_7 -; RV64I-NEXT: # %bb.6: # %start -; RV64I-NEXT: mv s1, s2 -; RV64I-NEXT: .LBB10_7: # %start +; RV64I-NEXT: beqz a0, .LBB10_6 +; RV64I-NEXT: # %bb.5: # %start +; RV64I-NEXT: li s1, 0 +; RV64I-NEXT: .LBB10_6: # %start ; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: ret start: @@ -1300,58 +1267,51 @@ ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill ; RV32I-NEXT: slli a0, a0, 16 ; RV32I-NEXT: srli a0, a0, 16 ; RV32I-NEXT: call __extendhfsf2@plt ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: mv s3, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfdi@plt -; RV32I-NEXT: mv s1, a1 -; RV32I-NEXT: li s5, 0 -; RV32I-NEXT: bltz s2, .LBB12_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a1 +; RV32I-NEXT: bgez s3, .LBB12_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s5, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB12_2: # %start ; RV32I-NEXT: lui a0, 391168 -; RV32I-NEXT: addi s4, a0, -1 +; RV32I-NEXT: addi s3, a0, -1 ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li s2, -1 -; RV32I-NEXT: li s3, -1 -; RV32I-NEXT: bgtz a0, .LBB12_4 +; RV32I-NEXT: blez a0, .LBB12_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s3, s5 +; RV32I-NEXT: li s1, -1 ; RV32I-NEXT: .LBB12_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: li s5, 0 -; RV32I-NEXT: bltz a0, .LBB12_6 +; RV32I-NEXT: bgez a0, .LBB12_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s5, s1 +; RV32I-NEXT: li s2, 0 ; RV32I-NEXT: .LBB12_6: # %start ; RV32I-NEXT: mv a0, s0 -; RV32I-NEXT: mv a1, s4 +; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bgtz a0, .LBB12_8 +; RV32I-NEXT: blez a0, .LBB12_8 ; RV32I-NEXT: # %bb.7: # %start -; RV32I-NEXT: mv s2, s5 +; RV32I-NEXT: li s2, -1 ; RV32I-NEXT: .LBB12_8: # %start -; RV32I-NEXT: mv a0, s3 +; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload ; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: ret ; @@ -1368,24 +1328,23 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB12_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB12_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB12_2: # %start ; RV64I-NEXT: lui a0, 391168 ; RV64I-NEXT: addiw a1, a0, -1 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, -1 -; RV64I-NEXT: bgtz a1, .LBB12_4 +; RV64I-NEXT: blez a0, .LBB12_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a0, s2 +; RV64I-NEXT: li s1, -1 ; RV64I-NEXT: .LBB12_4: # %start +; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload @@ -2371,100 +2330,94 @@ ; ; RV32I-LABEL: fcvt_w_s_sat_i16: ; RV32I: # %bb.0: # %start -; RV32I-NEXT: addi sp, sp, -32 -; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: slli a0, a0, 16 ; RV32I-NEXT: srli a0, a0, 16 ; RV32I-NEXT: call __extendhfsf2@plt ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: lui a1, 815104 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: lui s3, 1048568 -; RV32I-NEXT: bltz s1, .LBB32_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB32_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: lui s1, 1048568 ; RV32I-NEXT: .LBB32_2: # %start ; RV32I-NEXT: lui a0, 290816 ; RV32I-NEXT: addi a1, a0, -512 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: bge s2, a0, .LBB32_4 -; RV32I-NEXT: # %bb.3: +; RV32I-NEXT: blez a0, .LBB32_4 +; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: lui a0, 8 -; RV32I-NEXT: addi s3, a0, -1 +; RV32I-NEXT: addi s1, a0, -1 ; RV32I-NEXT: .LBB32_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s2, .LBB32_6 +; RV32I-NEXT: beqz a0, .LBB32_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s2, s3 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB32_6: # %start -; RV32I-NEXT: slli a0, s2, 16 +; RV32I-NEXT: slli a0, s1, 16 ; RV32I-NEXT: srai a0, a0, 16 -; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 32 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_w_s_sat_i16: ; RV64I: # %bb.0: # %start -; RV64I-NEXT: addi sp, sp, -48 -; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: slli a0, a0, 48 ; RV64I-NEXT: srli a0, a0, 48 ; RV64I-NEXT: call __extendhfsf2@plt ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: lui a1, 815104 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: lui s3, 1048568 -; RV64I-NEXT: bltz s1, .LBB32_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB32_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: lui s1, 1048568 ; RV64I-NEXT: .LBB32_2: # %start ; RV64I-NEXT: lui a0, 290816 ; RV64I-NEXT: addiw a1, a0, -512 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: bge s2, a0, .LBB32_4 -; RV64I-NEXT: # %bb.3: +; RV64I-NEXT: blez a0, .LBB32_4 +; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: lui a0, 8 -; RV64I-NEXT: addiw s3, a0, -1 +; RV64I-NEXT: addiw s1, a0, -1 ; RV64I-NEXT: .LBB32_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s2, .LBB32_6 +; RV64I-NEXT: beqz a0, .LBB32_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s2, s3 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB32_6: # %start -; RV64I-NEXT: slli a0, s2, 48 +; RV64I-NEXT: slli a0, s1, 48 ; RV64I-NEXT: srai a0, a0, 48 -; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 48 +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret start: %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) @@ -2573,30 +2526,29 @@ ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: lui a1, 16 -; RV32I-NEXT: addi s2, a1, -1 -; RV32I-NEXT: and a0, a0, s2 +; RV32I-NEXT: addi s3, a1, -1 +; RV32I-NEXT: and a0, a0, s3 ; RV32I-NEXT: call __extendhfsf2@plt ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: li s3, 0 -; RV32I-NEXT: bltz s1, .LBB34_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB34_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB34_2: # %start ; RV32I-NEXT: lui a0, 292864 ; RV32I-NEXT: addi a1, a0, -256 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: mv a1, s2 -; RV32I-NEXT: bgtz a0, .LBB34_4 +; RV32I-NEXT: blez a0, .LBB34_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a1, s3 +; RV32I-NEXT: mv s1, s3 ; RV32I-NEXT: .LBB34_4: # %start -; RV32I-NEXT: and a0, a1, s2 +; RV32I-NEXT: and a0, s1, s3 ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload @@ -2614,30 +2566,29 @@ ; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: lui a1, 16 -; RV64I-NEXT: addiw s2, a1, -1 -; RV64I-NEXT: and a0, a0, s2 +; RV64I-NEXT: addiw s3, a1, -1 +; RV64I-NEXT: and a0, a0, s3 ; RV64I-NEXT: call __extendhfsf2@plt ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s3, 0 -; RV64I-NEXT: bltz s1, .LBB34_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB34_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB34_2: # %start ; RV64I-NEXT: lui a0, 292864 ; RV64I-NEXT: addiw a1, a0, -256 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: mv a1, s2 -; RV64I-NEXT: bgtz a0, .LBB34_4 +; RV64I-NEXT: blez a0, .LBB34_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a1, s3 +; RV64I-NEXT: mv s1, s3 ; RV64I-NEXT: .LBB34_4: # %start -; RV64I-NEXT: and a0, a1, s2 +; RV64I-NEXT: and a0, s1, s3 ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload @@ -2765,98 +2716,90 @@ ; ; RV32I-LABEL: fcvt_w_s_sat_i8: ; RV32I: # %bb.0: # %start -; RV32I-NEXT: addi sp, sp, -32 -; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill -; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: addi sp, sp, -16 +; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill +; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill ; RV32I-NEXT: slli a0, a0, 16 ; RV32I-NEXT: srli a0, a0, 16 ; RV32I-NEXT: call __extendhfsf2@plt ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: lui a1, 798720 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixsfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: li s3, -128 -; RV32I-NEXT: bltz s1, .LBB36_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB36_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s3, a0 +; RV32I-NEXT: li s1, -128 ; RV32I-NEXT: .LBB36_2: # %start ; RV32I-NEXT: lui a1, 274400 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li s1, 127 -; RV32I-NEXT: blt s2, a0, .LBB36_4 +; RV32I-NEXT: blez a0, .LBB36_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv s1, s3 +; RV32I-NEXT: li s1, 127 ; RV32I-NEXT: .LBB36_4: # %start ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: call __unordsf2@plt -; RV32I-NEXT: bne a0, s2, .LBB36_6 +; RV32I-NEXT: beqz a0, .LBB36_6 ; RV32I-NEXT: # %bb.5: # %start -; RV32I-NEXT: mv s2, s1 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB36_6: # %start -; RV32I-NEXT: slli a0, s2, 24 +; RV32I-NEXT: slli a0, s1, 24 ; RV32I-NEXT: srai a0, a0, 24 -; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload -; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload -; RV32I-NEXT: addi sp, sp, 32 +; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload +; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload +; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: ret ; ; RV64I-LABEL: fcvt_w_s_sat_i8: ; RV64I: # %bb.0: # %start -; RV64I-NEXT: addi sp, sp, -48 -; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill -; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: addi sp, sp, -32 +; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill +; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: slli a0, a0, 48 ; RV64I-NEXT: srli a0, a0, 48 ; RV64I-NEXT: call __extendhfsf2@plt ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: lui a1, 798720 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixsfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: li s3, -128 -; RV64I-NEXT: bltz s1, .LBB36_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB36_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s3, a0 +; RV64I-NEXT: li s1, -128 ; RV64I-NEXT: .LBB36_2: # %start ; RV64I-NEXT: lui a1, 274400 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: li s1, 127 -; RV64I-NEXT: blt s2, a0, .LBB36_4 +; RV64I-NEXT: blez a0, .LBB36_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv s1, s3 +; RV64I-NEXT: li s1, 127 ; RV64I-NEXT: .LBB36_4: # %start ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: call __unordsf2@plt -; RV64I-NEXT: bne a0, s2, .LBB36_6 +; RV64I-NEXT: beqz a0, .LBB36_6 ; RV64I-NEXT: # %bb.5: # %start -; RV64I-NEXT: mv s2, s1 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB36_6: # %start -; RV64I-NEXT: slli a0, s2, 56 +; RV64I-NEXT: slli a0, s1, 56 ; RV64I-NEXT: srai a0, a0, 56 -; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload -; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload -; RV64I-NEXT: addi sp, sp, 48 +; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload +; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload +; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: ret start: %0 = tail call i8 @llvm.fptosi.sat.i8.f16(half %a) @@ -2970,23 +2913,22 @@ ; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: call __gesf2@plt -; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __fixunssfsi@plt -; RV32I-NEXT: li s2, 0 -; RV32I-NEXT: bltz s1, .LBB38_2 +; RV32I-NEXT: mv s1, a0 +; RV32I-NEXT: bgez s2, .LBB38_2 ; RV32I-NEXT: # %bb.1: # %start -; RV32I-NEXT: mv s2, a0 +; RV32I-NEXT: li s1, 0 ; RV32I-NEXT: .LBB38_2: # %start ; RV32I-NEXT: lui a1, 276464 ; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: call __gtsf2@plt -; RV32I-NEXT: li a1, 255 -; RV32I-NEXT: bgtz a0, .LBB38_4 +; RV32I-NEXT: blez a0, .LBB38_4 ; RV32I-NEXT: # %bb.3: # %start -; RV32I-NEXT: mv a1, s2 +; RV32I-NEXT: li s1, 255 ; RV32I-NEXT: .LBB38_4: # %start -; RV32I-NEXT: andi a0, a1, 255 +; RV32I-NEXT: andi a0, s1, 255 ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload @@ -3007,23 +2949,22 @@ ; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: call __gesf2@plt -; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __fixunssfdi@plt -; RV64I-NEXT: li s2, 0 -; RV64I-NEXT: bltz s1, .LBB38_2 +; RV64I-NEXT: mv s1, a0 +; RV64I-NEXT: bgez s2, .LBB38_2 ; RV64I-NEXT: # %bb.1: # %start -; RV64I-NEXT: mv s2, a0 +; RV64I-NEXT: li s1, 0 ; RV64I-NEXT: .LBB38_2: # %start ; RV64I-NEXT: lui a1, 276464 ; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: call __gtsf2@plt -; RV64I-NEXT: li a1, 255 -; RV64I-NEXT: bgtz a0, .LBB38_4 +; RV64I-NEXT: blez a0, .LBB38_4 ; RV64I-NEXT: # %bb.3: # %start -; RV64I-NEXT: mv a1, s2 +; RV64I-NEXT: li s1, 255 ; RV64I-NEXT: .LBB38_4: # %start -; RV64I-NEXT: andi a0, a1, 255 +; RV64I-NEXT: andi a0, s1, 255 ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload diff --git a/llvm/test/CodeGen/RISCV/rv32zbb-zbp-zbkb.ll b/llvm/test/CodeGen/RISCV/rv32zbb-zbp-zbkb.ll --- a/llvm/test/CodeGen/RISCV/rv32zbb-zbp-zbkb.ll +++ b/llvm/test/CodeGen/RISCV/rv32zbb-zbp-zbkb.ll @@ -300,32 +300,40 @@ define i64 @not_shl_one_i64(i64 %x) { ; RV32I-LABEL: not_shl_one_i64: ; RV32I: # %bb.0: -; RV32I-NEXT: addi a3, a0, -32 -; RV32I-NEXT: li a2, 1 +; RV32I-NEXT: addi a2, a0, -32 +; RV32I-NEXT: li a3, 1 ; RV32I-NEXT: li a1, -1 -; RV32I-NEXT: bltz a3, .LBB15_2 +; RV32I-NEXT: bltz a2, .LBB15_2 ; RV32I-NEXT: # %bb.1: -; RV32I-NEXT: sll a0, a2, a3 -; RV32I-NEXT: not a1, a0 ; RV32I-NEXT: li a0, -1 -; RV32I-NEXT: ret +; RV32I-NEXT: bgez a2, .LBB15_3 +; RV32I-NEXT: j .LBB15_4 ; RV32I-NEXT: .LBB15_2: -; RV32I-NEXT: sll a0, a2, a0 +; RV32I-NEXT: sll a0, a3, a0 ; RV32I-NEXT: not a0, a0 +; RV32I-NEXT: bltz a2, .LBB15_4 +; RV32I-NEXT: .LBB15_3: +; RV32I-NEXT: sll a1, a3, a2 +; RV32I-NEXT: not a1, a1 +; RV32I-NEXT: .LBB15_4: ; RV32I-NEXT: ret ; ; RV32ZBB-ZBP-ZBKB-LABEL: not_shl_one_i64: ; RV32ZBB-ZBP-ZBKB: # %bb.0: -; RV32ZBB-ZBP-ZBKB-NEXT: addi a3, a0, -32 -; RV32ZBB-ZBP-ZBKB-NEXT: li a2, -2 +; RV32ZBB-ZBP-ZBKB-NEXT: addi a2, a0, -32 +; RV32ZBB-ZBP-ZBKB-NEXT: li a3, -2 ; RV32ZBB-ZBP-ZBKB-NEXT: li a1, -1 -; RV32ZBB-ZBP-ZBKB-NEXT: bltz a3, .LBB15_2 +; RV32ZBB-ZBP-ZBKB-NEXT: bltz a2, .LBB15_2 ; RV32ZBB-ZBP-ZBKB-NEXT: # %bb.1: -; RV32ZBB-ZBP-ZBKB-NEXT: rol a1, a2, a3 ; RV32ZBB-ZBP-ZBKB-NEXT: li a0, -1 -; RV32ZBB-ZBP-ZBKB-NEXT: ret +; RV32ZBB-ZBP-ZBKB-NEXT: bgez a2, .LBB15_3 +; RV32ZBB-ZBP-ZBKB-NEXT: j .LBB15_4 ; RV32ZBB-ZBP-ZBKB-NEXT: .LBB15_2: -; RV32ZBB-ZBP-ZBKB-NEXT: rol a0, a2, a0 +; RV32ZBB-ZBP-ZBKB-NEXT: rol a0, a3, a0 +; RV32ZBB-ZBP-ZBKB-NEXT: bltz a2, .LBB15_4 +; RV32ZBB-ZBP-ZBKB-NEXT: .LBB15_3: +; RV32ZBB-ZBP-ZBKB-NEXT: rol a1, a3, a2 +; RV32ZBB-ZBP-ZBKB-NEXT: .LBB15_4: ; RV32ZBB-ZBP-ZBKB-NEXT: ret %1 = shl i64 1, %x %2 = xor i64 %1, -1 diff --git a/llvm/test/CodeGen/RISCV/rv32zbs.ll b/llvm/test/CodeGen/RISCV/rv32zbs.ll --- a/llvm/test/CodeGen/RISCV/rv32zbs.ll +++ b/llvm/test/CodeGen/RISCV/rv32zbs.ll @@ -47,30 +47,38 @@ ; RV32I-LABEL: bclr_i64: ; RV32I: # %bb.0: ; RV32I-NEXT: andi a3, a2, 63 -; RV32I-NEXT: addi a4, a3, -32 -; RV32I-NEXT: li a3, 1 -; RV32I-NEXT: bltz a4, .LBB2_2 +; RV32I-NEXT: addi a3, a3, -32 +; RV32I-NEXT: li a4, 1 +; RV32I-NEXT: bltz a3, .LBB2_3 ; RV32I-NEXT: # %bb.1: -; RV32I-NEXT: sll a2, a3, a4 -; RV32I-NEXT: not a2, a2 -; RV32I-NEXT: and a1, a1, a2 -; RV32I-NEXT: ret +; RV32I-NEXT: bgez a3, .LBB2_4 ; RV32I-NEXT: .LBB2_2: -; RV32I-NEXT: sll a2, a3, a2 +; RV32I-NEXT: ret +; RV32I-NEXT: .LBB2_3: +; RV32I-NEXT: sll a2, a4, a2 ; RV32I-NEXT: not a2, a2 ; RV32I-NEXT: and a0, a0, a2 +; RV32I-NEXT: bltz a3, .LBB2_2 +; RV32I-NEXT: .LBB2_4: +; RV32I-NEXT: sll a2, a4, a3 +; RV32I-NEXT: not a2, a2 +; RV32I-NEXT: and a1, a1, a2 ; RV32I-NEXT: ret ; ; RV32ZBS-LABEL: bclr_i64: ; RV32ZBS: # %bb.0: ; RV32ZBS-NEXT: andi a3, a2, 63 ; RV32ZBS-NEXT: addi a3, a3, -32 -; RV32ZBS-NEXT: bltz a3, .LBB2_2 +; RV32ZBS-NEXT: bltz a3, .LBB2_3 ; RV32ZBS-NEXT: # %bb.1: -; RV32ZBS-NEXT: bclr a1, a1, a3 -; RV32ZBS-NEXT: ret +; RV32ZBS-NEXT: bgez a3, .LBB2_4 ; RV32ZBS-NEXT: .LBB2_2: +; RV32ZBS-NEXT: ret +; RV32ZBS-NEXT: .LBB2_3: ; RV32ZBS-NEXT: bclr a0, a0, a2 +; RV32ZBS-NEXT: bltz a3, .LBB2_2 +; RV32ZBS-NEXT: .LBB2_4: +; RV32ZBS-NEXT: bclr a1, a1, a3 ; RV32ZBS-NEXT: ret %and = and i64 %b, 63 %shl = shl nuw i64 1, %and @@ -165,27 +173,35 @@ ; RV32I: # %bb.0: ; RV32I-NEXT: addi a1, a0, -32 ; RV32I-NEXT: li a2, 1 -; RV32I-NEXT: bltz a1, .LBB7_2 +; RV32I-NEXT: bltz a1, .LBB7_3 ; RV32I-NEXT: # %bb.1: ; RV32I-NEXT: li a0, 0 +; RV32I-NEXT: bltz a1, .LBB7_4 +; RV32I-NEXT: .LBB7_2: ; RV32I-NEXT: sll a1, a2, a1 ; RV32I-NEXT: ret -; RV32I-NEXT: .LBB7_2: -; RV32I-NEXT: li a1, 0 +; RV32I-NEXT: .LBB7_3: ; RV32I-NEXT: sll a0, a2, a0 +; RV32I-NEXT: bgez a1, .LBB7_2 +; RV32I-NEXT: .LBB7_4: +; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: ret ; ; RV32ZBS-LABEL: bset_i64_zero: ; RV32ZBS: # %bb.0: ; RV32ZBS-NEXT: addi a1, a0, -32 -; RV32ZBS-NEXT: bltz a1, .LBB7_2 +; RV32ZBS-NEXT: bltz a1, .LBB7_3 ; RV32ZBS-NEXT: # %bb.1: ; RV32ZBS-NEXT: li a0, 0 +; RV32ZBS-NEXT: bltz a1, .LBB7_4 +; RV32ZBS-NEXT: .LBB7_2: ; RV32ZBS-NEXT: bset a1, zero, a1 ; RV32ZBS-NEXT: ret -; RV32ZBS-NEXT: .LBB7_2: -; RV32ZBS-NEXT: li a1, 0 +; RV32ZBS-NEXT: .LBB7_3: ; RV32ZBS-NEXT: bset a0, zero, a0 +; RV32ZBS-NEXT: bgez a1, .LBB7_2 +; RV32ZBS-NEXT: .LBB7_4: +; RV32ZBS-NEXT: li a1, 0 ; RV32ZBS-NEXT: ret %shl = shl i64 1, %a ret i64 %shl diff --git a/llvm/test/CodeGen/RISCV/rv64zbb.ll b/llvm/test/CodeGen/RISCV/rv64zbb.ll --- a/llvm/test/CodeGen/RISCV/rv64zbb.ll +++ b/llvm/test/CodeGen/RISCV/rv64zbb.ll @@ -219,13 +219,14 @@ ; RV64I-NEXT: lui a1, 4112 ; RV64I-NEXT: addiw a1, a1, 257 ; RV64I-NEXT: call __muldi3@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, -1 -; RV64I-NEXT: beqz s0, .LBB3_2 +; RV64I-NEXT: bnez s0, .LBB3_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: srliw a0, a1, 24 -; RV64I-NEXT: xori a0, a0, 31 +; RV64I-NEXT: li a0, -1 +; RV64I-NEXT: j .LBB3_3 ; RV64I-NEXT: .LBB3_2: +; RV64I-NEXT: srliw a0, a0, 24 +; RV64I-NEXT: xori a0, a0, 31 +; RV64I-NEXT: .LBB3_3: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 @@ -233,13 +234,13 @@ ; ; RV64ZBB-LABEL: findLastSet_i32: ; RV64ZBB: # %bb.0: -; RV64ZBB-NEXT: mv a1, a0 -; RV64ZBB-NEXT: li a0, -1 -; RV64ZBB-NEXT: beqz a1, .LBB3_2 +; RV64ZBB-NEXT: bnez a0, .LBB3_2 ; RV64ZBB-NEXT: # %bb.1: -; RV64ZBB-NEXT: clzw a0, a1 -; RV64ZBB-NEXT: xori a0, a0, 31 +; RV64ZBB-NEXT: li a0, -1 +; RV64ZBB-NEXT: ret ; RV64ZBB-NEXT: .LBB3_2: +; RV64ZBB-NEXT: clzw a0, a0 +; RV64ZBB-NEXT: xori a0, a0, 31 ; RV64ZBB-NEXT: ret %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 true) %2 = xor i32 31, %1 @@ -480,12 +481,13 @@ ; RV64I-NEXT: lui a1, 4112 ; RV64I-NEXT: addiw a1, a1, 257 ; RV64I-NEXT: call __muldi3@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, -1 -; RV64I-NEXT: beqz s0, .LBB8_2 +; RV64I-NEXT: bnez s0, .LBB8_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: srliw a0, a1, 24 +; RV64I-NEXT: li a0, -1 +; RV64I-NEXT: j .LBB8_3 ; RV64I-NEXT: .LBB8_2: +; RV64I-NEXT: srliw a0, a0, 24 +; RV64I-NEXT: .LBB8_3: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 @@ -493,12 +495,12 @@ ; ; RV64ZBB-LABEL: findFirstSet_i32: ; RV64ZBB: # %bb.0: -; RV64ZBB-NEXT: mv a1, a0 -; RV64ZBB-NEXT: li a0, -1 -; RV64ZBB-NEXT: beqz a1, .LBB8_2 +; RV64ZBB-NEXT: bnez a0, .LBB8_2 ; RV64ZBB-NEXT: # %bb.1: -; RV64ZBB-NEXT: ctzw a0, a1 +; RV64ZBB-NEXT: li a0, -1 +; RV64ZBB-NEXT: ret ; RV64ZBB-NEXT: .LBB8_2: +; RV64ZBB-NEXT: ctzw a0, a0 ; RV64ZBB-NEXT: ret %1 = call i32 @llvm.cttz.i32(i32 %a, i1 true) %2 = icmp eq i32 %a, 0 @@ -535,13 +537,14 @@ ; RV64I-NEXT: lui a1, 4112 ; RV64I-NEXT: addiw a1, a1, 257 ; RV64I-NEXT: call __muldi3@plt -; RV64I-NEXT: mv a1, a0 -; RV64I-NEXT: li a0, 0 -; RV64I-NEXT: beqz s0, .LBB9_2 +; RV64I-NEXT: bnez s0, .LBB9_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: srliw a0, a1, 24 -; RV64I-NEXT: addi a0, a0, 1 +; RV64I-NEXT: li a0, 0 +; RV64I-NEXT: j .LBB9_3 ; RV64I-NEXT: .LBB9_2: +; RV64I-NEXT: srliw a0, a0, 24 +; RV64I-NEXT: addi a0, a0, 1 +; RV64I-NEXT: .LBB9_3: ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload ; RV64I-NEXT: addi sp, sp, 16 @@ -549,11 +552,9 @@ ; ; RV64ZBB-LABEL: ffs_i32: ; RV64ZBB: # %bb.0: -; RV64ZBB-NEXT: mv a1, a0 -; RV64ZBB-NEXT: li a0, 0 -; RV64ZBB-NEXT: beqz a1, .LBB9_2 +; RV64ZBB-NEXT: beqz a0, .LBB9_2 ; RV64ZBB-NEXT: # %bb.1: -; RV64ZBB-NEXT: ctzw a0, a1 +; RV64ZBB-NEXT: ctzw a0, a0 ; RV64ZBB-NEXT: addi a0, a0, 1 ; RV64ZBB-NEXT: .LBB9_2: ; RV64ZBB-NEXT: ret diff --git a/llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll b/llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll --- a/llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll +++ b/llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll @@ -79,10 +79,10 @@ ; CHECK-LABEL: pos_sel_constants: ; CHECK: # %bb.0: ; CHECK-NEXT: mv a1, a0 -; CHECK-NEXT: li a0, 5 -; CHECK-NEXT: bgez a1, .LBB4_2 -; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: li a0, 0 +; CHECK-NEXT: bltz a1, .LBB4_2 +; CHECK-NEXT: # %bb.1: +; CHECK-NEXT: li a0, 5 ; CHECK-NEXT: .LBB4_2: ; CHECK-NEXT: ret %tmp.1 = icmp sgt i32 %a, -1 diff --git a/llvm/test/CodeGen/RISCV/uadd_sat.ll b/llvm/test/CodeGen/RISCV/uadd_sat.ll --- a/llvm/test/CodeGen/RISCV/uadd_sat.ll +++ b/llvm/test/CodeGen/RISCV/uadd_sat.ll @@ -25,11 +25,10 @@ ; RV64I-LABEL: func: ; RV64I: # %bb.0: ; RV64I-NEXT: mv a2, a0 -; RV64I-NEXT: addw a1, a0, a1 -; RV64I-NEXT: li a0, -1 -; RV64I-NEXT: bltu a1, a2, .LBB0_2 +; RV64I-NEXT: addw a0, a0, a1 +; RV64I-NEXT: bgeu a0, a2, .LBB0_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: .LBB0_2: ; RV64I-NEXT: ret ; diff --git a/llvm/test/CodeGen/RISCV/uadd_sat_plus.ll b/llvm/test/CodeGen/RISCV/uadd_sat_plus.ll --- a/llvm/test/CodeGen/RISCV/uadd_sat_plus.ll +++ b/llvm/test/CodeGen/RISCV/uadd_sat_plus.ll @@ -25,13 +25,13 @@ ; ; RV64I-LABEL: func32: ; RV64I: # %bb.0: -; RV64I-NEXT: mulw a1, a1, a2 -; RV64I-NEXT: addw a1, a0, a1 -; RV64I-NEXT: sext.w a2, a0 -; RV64I-NEXT: li a0, -1 -; RV64I-NEXT: bltu a1, a2, .LBB0_2 +; RV64I-NEXT: mv a3, a0 +; RV64I-NEXT: mulw a0, a1, a2 +; RV64I-NEXT: addw a0, a3, a0 +; RV64I-NEXT: sext.w a1, a3 +; RV64I-NEXT: bgeu a0, a1, .LBB0_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: .LBB0_2: ; RV64I-NEXT: ret ; diff --git a/llvm/test/CodeGen/RISCV/usub_sat.ll b/llvm/test/CodeGen/RISCV/usub_sat.ll --- a/llvm/test/CodeGen/RISCV/usub_sat.ll +++ b/llvm/test/CodeGen/RISCV/usub_sat.ll @@ -25,11 +25,10 @@ ; RV64I-LABEL: func: ; RV64I: # %bb.0: ; RV64I-NEXT: mv a2, a0 -; RV64I-NEXT: subw a1, a0, a1 -; RV64I-NEXT: li a0, 0 -; RV64I-NEXT: bltu a2, a1, .LBB0_2 +; RV64I-NEXT: subw a0, a0, a1 +; RV64I-NEXT: bgeu a2, a0, .LBB0_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, 0 ; RV64I-NEXT: .LBB0_2: ; RV64I-NEXT: ret ; diff --git a/llvm/test/CodeGen/RISCV/usub_sat_plus.ll b/llvm/test/CodeGen/RISCV/usub_sat_plus.ll --- a/llvm/test/CodeGen/RISCV/usub_sat_plus.ll +++ b/llvm/test/CodeGen/RISCV/usub_sat_plus.ll @@ -25,13 +25,13 @@ ; ; RV64I-LABEL: func32: ; RV64I: # %bb.0: -; RV64I-NEXT: mulw a1, a1, a2 -; RV64I-NEXT: subw a1, a0, a1 -; RV64I-NEXT: sext.w a2, a0 -; RV64I-NEXT: li a0, 0 -; RV64I-NEXT: bltu a2, a1, .LBB0_2 +; RV64I-NEXT: mv a3, a0 +; RV64I-NEXT: mulw a0, a1, a2 +; RV64I-NEXT: subw a0, a3, a0 +; RV64I-NEXT: sext.w a1, a3 +; RV64I-NEXT: bgeu a1, a0, .LBB0_2 ; RV64I-NEXT: # %bb.1: -; RV64I-NEXT: mv a0, a1 +; RV64I-NEXT: li a0, 0 ; RV64I-NEXT: .LBB0_2: ; RV64I-NEXT: ret ;