Index: llvm/include/llvm/CodeGen/IndirectThunks.h =================================================================== --- llvm/include/llvm/CodeGen/IndirectThunks.h +++ llvm/include/llvm/CodeGen/IndirectThunks.h @@ -100,7 +100,7 @@ if (!getDerived().mayUseThunk(MF)) return false; - getDerived().insertThunks(MMI); + getDerived().insertThunks(MMI, MF); InsertedThunks = true; return true; } Index: llvm/lib/Target/AArch64/AArch64SLSHardening.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64SLSHardening.cpp +++ llvm/lib/Target/AArch64/AArch64SLSHardening.cpp @@ -191,7 +191,7 @@ // to more accurately reflect if a thunk will be needed. return MF.getSubtarget().hardenSlsBlr(); } - void insertThunks(MachineModuleInfo &MMI); + void insertThunks(MachineModuleInfo &MMI, MachineFunction &MF); void populateThunk(MachineFunction &MF); private: @@ -199,7 +199,7 @@ }; } // namespace -void SLSBLRThunkInserter::insertThunks(MachineModuleInfo &MMI) { +void SLSBLRThunkInserter::insertThunks(MachineModuleInfo &MMI, MachineFunction &MF) { // FIXME: It probably would be possible to filter which thunks to produce // based on which registers are actually used in BLR instructions in this // function. But would that be a worthwhile optimization? Index: llvm/lib/Target/ARM/ARMSLSHardening.cpp =================================================================== --- llvm/lib/Target/ARM/ARMSLSHardening.cpp +++ llvm/lib/Target/ARM/ARMSLSHardening.cpp @@ -170,7 +170,7 @@ // function to more accurately reflect if a thunk will be needed. return MF.getSubtarget().hardenSlsBlr(); } - void insertThunks(MachineModuleInfo &MMI); + void insertThunks(MachineModuleInfo &MMI, MachineFunction &MF); void populateThunk(MachineFunction &MF); private: @@ -178,12 +178,14 @@ }; } // namespace -void SLSBLRThunkInserter::insertThunks(MachineModuleInfo &MMI) { +void SLSBLRThunkInserter::insertThunks(MachineModuleInfo &MMI, MachineFunction &MF) { // FIXME: It probably would be possible to filter which thunks to produce // based on which registers are actually used in indirect calls in this // function. But would that be a worthwhile optimization? + const ARMSubtarget *ST = &MF.getSubtarget(); for (auto T : SLSBLRThunks) - createThunkFunction(MMI, T.Name, ComdatThunks); + if (ST->isThumb() == T.isThumb) + createThunkFunction(MMI, T.Name, ComdatThunks); } void SLSBLRThunkInserter::populateThunk(MachineFunction &MF) { Index: llvm/lib/Target/X86/X86IndirectThunks.cpp =================================================================== --- llvm/lib/Target/X86/X86IndirectThunks.cpp +++ llvm/lib/Target/X86/X86IndirectThunks.cpp @@ -67,7 +67,7 @@ STI.useRetpolineIndirectBranches()) && !STI.useRetpolineExternalThunk(); } - void insertThunks(MachineModuleInfo &MMI); + void insertThunks(MachineModuleInfo &MMI, MachineFunction &MF); void populateThunk(MachineFunction &MF); }; @@ -76,7 +76,7 @@ bool mayUseThunk(const MachineFunction &MF) { return MF.getSubtarget().useLVIControlFlowIntegrity(); } - void insertThunks(MachineModuleInfo &MMI) { + void insertThunks(MachineModuleInfo &MMI, MachineFunction &MF) { createThunkFunction(MMI, R11LVIThunkName); } void populateThunk(MachineFunction &MF) { @@ -132,7 +132,7 @@ } // end anonymous namespace -void RetpolineThunkInserter::insertThunks(MachineModuleInfo &MMI) { +void RetpolineThunkInserter::insertThunks(MachineModuleInfo &MMI, MachineFunction &MF) { if (MMI.getTarget().getTargetTriple().getArch() == Triple::x86_64) createThunkFunction(MMI, R11RetpolineName); else Index: llvm/test/CodeGen/ARM/speculation-hardening-sls.ll =================================================================== --- llvm/test/CodeGen/ARM/speculation-hardening-sls.ll +++ llvm/test/CodeGen/ARM/speculation-hardening-sls.ll @@ -259,4 +259,5 @@ ; SB-NEXT: isb ; HARDEN-NEXT: .Lfunc_end - +; THUMB-NOT: __llvm_slsblr_thunk_arm +; ARM-NOT: __llvm_slsblr_thunk_thumb