Index: llvm/test/CodeGen/Thumb2/bti-const-island.mir
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-const-island.mir
+++ llvm/test/CodeGen/Thumb2/bti-const-island.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=thumbv7m-arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s
+# RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s
 
 # This test checks that the ARM Constant Island pass correctly handles BTI
 # instructions when adding new BBs to jump tables.
Index: llvm/test/CodeGen/Thumb2/bti-entry-blocks.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-entry-blocks.ll
+++ llvm/test/CodeGen/Thumb2/bti-entry-blocks.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7m-arm-none-eabi | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv8.1m.main-arm-none-eabi | FileCheck %s
 
 define hidden i32 @linkage_external() local_unnamed_addr {
 ; CHECK-LABEL: linkage_external:
Index: llvm/test/CodeGen/Thumb2/bti-indirect-branches.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-indirect-branches.ll
+++ llvm/test/CodeGen/Thumb2/bti-indirect-branches.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=thumbv7m-arm-none-eabi | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv8.1m.main-arm-none-eabi | FileCheck %s
 
 define internal i32 @table_switch(i32 %x) {
 ; CHECK-LABEL: table_switch:
Index: llvm/test/CodeGen/Thumb2/bti-jump-table.mir
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-jump-table.mir
+++ llvm/test/CodeGen/Thumb2/bti-jump-table.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc < %s -x mir -mtriple=thumbv7m-arm-none-eabi -run-pass=arm-branch-targets | FileCheck %s
+# RUN: llc < %s -x mir -mtriple=thumbv8.1m.main-arm-none-eabi -run-pass=arm-branch-targets | FileCheck %s
 --- |
   define internal i32 @table_switch(i32 %x) {
   entry:
Index: llvm/test/CodeGen/Thumb2/bti-outliner-1.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-outliner-1.ll
+++ llvm/test/CodeGen/Thumb2/bti-outliner-1.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8.1m.main-eabi %s -o - | FileCheck %s
 
 ; Check that each outlining candidate and the outlined function are in agreement
 ; with regard to whether BTI insertion is enabled or not.
Index: llvm/test/CodeGen/Thumb2/bti-outliner-2.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-outliner-2.ll
+++ llvm/test/CodeGen/Thumb2/bti-outliner-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8.1m.main-eabi %s -o - | FileCheck %s
 
 ; See bti-outliner-1.ll
 ; Difference is the BTI placement is enabled by default for the entire module.
Index: llvm/test/CodeGen/Thumb2/bti-outliner-cost-1.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-outliner-cost-1.ll
+++ llvm/test/CodeGen/Thumb2/bti-outliner-cost-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8.1m.main-eabi %s -o - | FileCheck %s
 
 ; Check an edge case of the outlining costs -
 ; outlining occurs in this test and does not in `bti-outliner-cost-2.ll`
Index: llvm/test/CodeGen/Thumb2/bti-outliner-cost-2.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/bti-outliner-cost-2.ll
+++ llvm/test/CodeGen/Thumb2/bti-outliner-cost-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8.1m.main-eabi %s -o - | FileCheck %s
 
 ; See `bti-outliner-cost-1.ll`
 
Index: llvm/test/CodeGen/Thumb2/pacbti-m-basic.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/pacbti-m-basic.ll
+++ llvm/test/CodeGen/Thumb2/pacbti-m-basic.ll
@@ -1,7 +1,7 @@
 ; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s
 ; RUN: llc --filetype=obj %s -o - | llvm-readelf -s --unwind - | FileCheck %s --check-prefix=UNWIND
 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
-target triple = "thumbv8m.main-none-none-eabi"
+target triple = "thumbv8.1m.main-none-none-eabi"
 
 ; int g(int);
 ;
@@ -69,31 +69,30 @@
 }
 ; CHECK-LABEL: f2:
 ; CHECK:       pac    r12, lr, sp
+; CHECK-NEXT:  vstr    fpcxtns, [sp, #-4]!
+; CHECK-NEXT:  .cfi_def_cfa_offset 4
 ; CHECK-NEXT:  .save  {r7, lr}
 ; CHECK-NEXT:  push   {r7, lr}
-; CHECK-NEXT: .cfi_def_cfa_offset 8
-; CHECK-NEXT: .cfi_offset lr, -4
-; CHECK-NEXT: .cfi_offset r7, -8
+; CHECK-NEXT: .cfi_def_cfa_offset 12
+; CHECK-NEXT: .cfi_offset lr, -8
+; CHECK-NEXT: .cfi_offset r7, -12
 ; CHECK-NEXT:  .save  {ra_auth_code}
 ; CHECK-NEXT:  str    r12, [sp, #-4]!
-; CHECK-NEXT: .cfi_def_cfa_offset 12
-; CHECK-NEXT: .cfi_offset ra_auth_code, -12
-; CHECK-NEXT:  .pad   #4
-; CHECK-NEXT:  sub    sp, #4
-; CHECK-NEXT:  .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset ra_auth_code, -16
 ; ...
-; CHECK:       add    sp, #4
-; CHECK-NEXT:  ldr    r12, [sp], #4
+; CHECK:  ldr    r12, [sp], #4
 ; CHECK-NEXT:  pop.w  {r7, lr}
+; CHECK-NEXT:  vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr} 
+; CHECK-NEXT:  vldr fpcxtns, [sp], #4 
 ; CHECK-NEXT:  aut    r12, lr, sp
-; CHECK-NEXT:  mrs    r12, control
-; ...
-; CHECK:       bxns    lr
+; CHECK-NEXT:  clrm {r1, r2, r3, r12, apsr}
+; CHECK-NEXT:  bxns    lr
 
 declare dso_local i32 @g(i32) local_unnamed_addr
 
-attributes #0 = { "cmse_nonsecure_entry" "target-features"="+8msecext,+armv8.1-m.main"}
-attributes #1 = { "cmse_nonsecure_entry" "target-features"="+8msecext,+armv8-m.main,+fp-armv8d16"}
+attributes #0 = { "cmse_nonsecure_entry" "target-features"="+8msecext"}
+attributes #1 = { "cmse_nonsecure_entry" "target-features"="+8msecext,+fp-armv8d16"}
 
 !llvm.module.flags = !{!0, !1, !2}
 
@@ -113,11 +112,8 @@
 ; UNWIND-NEXT:  0x84 0x08 ; pop {r7, lr}
 
 ; UNWIND-LABEL: FunctionAddress: 0x54
-; UNWIND:       0x00      ; vsp = vsp + 4
-; UNWIND-NEXT:  0xB4      ; pop ra_auth_code
+; UNWIND:       0xB4      ; pop ra_auth_code
 ; UNWIND-NEXT:  0x84 0x08 ; pop {r7, lr}
-; UNWIND-NEXT:  0xB0      ; finish
-; UNWIND-NEXT:  0xB0      ; finish
 
 ; UNWIND-LABEL: 00000001 {{.*}} f0
 ; UNWIND-LABEL: 00000025 {{.*}} f1
Index: llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll
+++ llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll
@@ -3,7 +3,7 @@
 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
 
 ; Triple tweaked so we get 16-byte stack alignment and better test coverage.
-target triple = "armv7m-none-nacl-android"
+target triple = "thumbv8.1m.main-none-nacl-android"
 
 ; -Oz
 ; volatile int a, b, c, d, e, f, g, h, i;
Index: llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll
+++ llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll
@@ -1,7 +1,7 @@
 ; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s
 ; RUN: llc --filetype=obj %s -o - | llvm-readelf -s --unwind - | FileCheck %s --check-prefix=UNWIND
 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
-target triple = "thumbv7m-arm-none-eabi"
+target triple = "thumbv8.1m.main-arm-none-eabi"
 
 ; -Oz
 ; __attribute__((noinline)) int h(int a, int b) { return a + b; }
Index: llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll
+++ llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll
@@ -1,7 +1,7 @@
 ; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s
 ; RUN: llc --filetype=obj %s -o - | llvm-readelf -s --unwind - | FileCheck %s --check-prefix=UNWIND
 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
-target triple = "thumbv7m-arm-none-eabi"
+target triple = "thumbv8.1m.main-arm-none-eabi"
 
 ; C++, -Oz
 ; __attribute__((noinline)) int h(int a, int b) {
@@ -165,7 +165,7 @@
 ; CHECK-NOT: aut
 ; CHECK:        b    _Z1hii
 
-attributes #0 = { minsize noinline optsize "denormal-fp-math"="preserve-sign,preserve-sign" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m3" "target-features"="+armv7-m,+hwdiv,+thumb-mode" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #0 = { minsize noinline optsize "denormal-fp-math"="preserve-sign,preserve-sign" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m55" "target-features"="+armv8.1-m.main,+hwdiv,+thumb-mode" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { nounwind }
 attributes #2 = { noreturn }
 
Index: llvm/test/CodeGen/Thumb2/pacbti-m-outliner-5.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/pacbti-m-outliner-5.ll
+++ llvm/test/CodeGen/Thumb2/pacbti-m-outliner-5.ll
@@ -1,6 +1,6 @@
 ; RUN: llc %s -o - | FileCheck %s
 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
-target triple = "thumbv7m-arm-none-eabi"
+target triple = "thumbv8.1m.main-arm-none-eabi"
 
 ; CHECK-LABEL: x:
 ; CHECK: bl OUTLINED_FUNCTION
Index: llvm/test/CodeGen/Thumb2/pacbti-m-unsupported-arch.ll
===================================================================
--- llvm/test/CodeGen/Thumb2/pacbti-m-unsupported-arch.ll
+++ llvm/test/CodeGen/Thumb2/pacbti-m-unsupported-arch.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -mtriple thumbv6m-eabi      %s -o - | FileCheck %s
 ; RUN: llc -mtriple thumbv8m.base-eabi %s -o - | FileCheck %s
 ; RUN: llc -mtriple thumbv7a-eabi %s      -o - | FileCheck %s
-; RUN: llc -mtriple thumbv7m-eabi      %s -o - | FileCheck %s --check-prefix=CHECK-PACBTI
+; RUN: llc -mtriple thumbv8.1m.main-eabi %s -o - | FileCheck %s --check-prefix=CHECK-PACBTI
 
 ; Check we don't emit PACBTI-M instructions for architectures
 ; that do not support them.