diff --git a/llvm/test/CodeGen/AArch64/sve-cmp-folds.ll b/llvm/test/CodeGen/AArch64/sve-cmp-folds.ll --- a/llvm/test/CodeGen/AArch64/sve-cmp-folds.ll +++ b/llvm/test/CodeGen/AArch64/sve-cmp-folds.ll @@ -53,6 +53,54 @@ ret %not } +define @icmp_cnot_nxv16i8( %a) { +; CHECK-LABEL: icmp_cnot_nxv16i8: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.b +; CHECK-NEXT: cmpeq p0.b, p0/z, z0.b, #0 +; CHECK-NEXT: mov z0.b, p0/z, #1 // =0x1 +; CHECK-NEXT: ret + %mask = icmp eq %a, zeroinitializer + %zext = zext %mask to + ret %zext +} + +define @icmp_cnot_nxv8i16( %a) { +; CHECK-LABEL: icmp_cnot_nxv8i16: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.h +; CHECK-NEXT: cmpeq p0.h, p0/z, z0.h, #0 +; CHECK-NEXT: mov z0.h, p0/z, #1 // =0x1 +; CHECK-NEXT: ret + %mask = icmp eq %a, zeroinitializer + %zext = zext %mask to + ret %zext +} + +define @icmp_cnot_nxv4i32( %a) { +; CHECK-LABEL: icmp_cnot_nxv4i32: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.s +; CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, #0 +; CHECK-NEXT: mov z0.s, p0/z, #1 // =0x1 +; CHECK-NEXT: ret + %mask = icmp eq %a, zeroinitializer + %zext = zext %mask to + ret %zext +} + +define @icmp_cnot_nxv2i64( %a) { +; CHECK-LABEL: icmp_cnot_nxv2i64: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.d +; CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, #0 +; CHECK-NEXT: mov z0.d, p0/z, #1 // =0x1 +; CHECK-NEXT: ret + %mask = icmp eq %a, zeroinitializer + %zext = zext %mask to + ret %zext +} + define i1 @foo_first( %a, %b) { ; CHECK-LABEL: foo_first: ; CHECK: // %bb.0: