Index: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h =================================================================== --- llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h +++ llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h @@ -221,7 +221,7 @@ bool translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder, unsigned Opcode); - void getStackGuard(Register DstReg, MachineIRBuilder &MIRBuilder); + Register getStackGuard(LLT Ty, MachineIRBuilder &MIRBuilder); bool translateOverflowIntrinsic(const CallInst &CI, unsigned Op, MachineIRBuilder &MIRBuilder); Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1629,27 +1629,26 @@ return true; } -void IRTranslator::getStackGuard(Register DstReg, - MachineIRBuilder &MIRBuilder) { +Register IRTranslator::getStackGuard(LLT Ty, MachineIRBuilder &MIRBuilder) { const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); + Register DstReg = MRI->createGenericVirtualRegister(Ty); MRI->setRegClass(DstReg, TRI->getPointerRegClass(*MF)); auto MIB = MIRBuilder.buildInstr(TargetOpcode::LOAD_STACK_GUARD, {DstReg}, {}); auto &TLI = *MF->getSubtarget().getTargetLowering(); - Value *Global = TLI.getSDagStackGuard(*MF->getFunction().getParent()); - if (!Global) - return; + if (Value *Global = TLI.getSDagStackGuard(*MF->getFunction().getParent())) { + unsigned AddrSpace = Global->getType()->getPointerAddressSpace(); + LLT PtrTy = LLT::pointer(AddrSpace, DL->getPointerSizeInBits(AddrSpace)); - unsigned AddrSpace = Global->getType()->getPointerAddressSpace(); - LLT PtrTy = LLT::pointer(AddrSpace, DL->getPointerSizeInBits(AddrSpace)); - - MachinePointerInfo MPInfo(Global); - auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant | - MachineMemOperand::MODereferenceable; - MachineMemOperand *MemRef = MF->getMachineMemOperand( - MPInfo, Flags, PtrTy, DL->getPointerABIAlignment(AddrSpace)); - MIB.setMemRefs({MemRef}); + MachinePointerInfo MPInfo(Global); + auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant | + MachineMemOperand::MODereferenceable; + MachineMemOperand *MemRef = MF->getMachineMemOperand( + MPInfo, Flags, PtrTy, DL->getPointerABIAlignment(AddrSpace)); + MIB.setMemRefs({MemRef}); + } + return DstReg; } bool IRTranslator::translateOverflowIntrinsic(const CallInst &CI, unsigned Op, @@ -2073,17 +2072,15 @@ llvm_unreachable("llvm.is.constant.* should have been lowered already"); case Intrinsic::stackguard: - getStackGuard(getOrCreateVReg(CI), MIRBuilder); + getStackGuard(getLLTForType(*CI.getArgOperand(0)->getType(), *DL), MIRBuilder); return true; case Intrinsic::stackprotector: { const TargetLowering &TLI = *MF->getSubtarget().getTargetLowering(); LLT PtrTy = getLLTForType(*CI.getArgOperand(0)->getType(), *DL); - Register GuardVal; - if (TLI.useLoadStackGuardNode()) { - GuardVal = MRI->createGenericVirtualRegister(PtrTy); - getStackGuard(GuardVal, MIRBuilder); - } else - GuardVal = getOrCreateVReg(*CI.getArgOperand(0)); // The guard's value. + Register GuardVal = + TLI.useLoadStackGuardNode() + ? getStackGuard(PtrTy, MIRBuilder) + : getOrCreateVReg(*CI.getArgOperand(0)); // The guard's value. AllocaInst *Slot = cast(CI.getArgOperand(1)); int FI = getOrCreateFrameIndex(*Slot); @@ -3168,7 +3165,6 @@ const TargetLowering &TLI = *MF->getSubtarget().getTargetLowering(); Type *PtrIRTy = Type::getInt8PtrTy(MF->getFunction().getContext()); const LLT PtrTy = getLLTForType(*PtrIRTy, *DL); - LLT PtrMemTy = getLLTForMVT(TLI.getPointerMemTy(*DL)); MachineFrameInfo &MFI = ParentBB->getParent()->getFrameInfo(); int FI = MFI.getStackProtectorIndex(); @@ -3181,7 +3177,7 @@ // Generate code to load the content of the guard slot. Register GuardVal = CurBuilder - ->buildLoad(PtrMemTy, StackSlotPtr, + ->buildLoad(PtrTy, StackSlotPtr, MachinePointerInfo::getFixedStack(*MF, FI), Align, MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile) .getReg(0); @@ -3228,16 +3224,14 @@ // If useLoadStackGuardNode returns true, generate LOAD_STACK_GUARD. // Otherwise, emit a volatile load to retrieve the stack guard value. if (TLI.useLoadStackGuardNode()) { - Guard = - MRI->createGenericVirtualRegister(LLT::scalar(PtrTy.getSizeInBits())); - getStackGuard(Guard, *CurBuilder); + Guard = getStackGuard(PtrTy, *CurBuilder); } else { // TODO: test using android subtarget when we support @llvm.thread.pointer. const Value *IRGuard = TLI.getSDagStackGuard(M); Register GuardPtr = getOrCreateVReg(*IRGuard); Guard = CurBuilder - ->buildLoad(PtrMemTy, GuardPtr, + ->buildLoad(PtrTy, GuardPtr, MachinePointerInfo::getFixedStack(*MF, FI), Align, MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile) Index: llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll =================================================================== --- llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll +++ llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll @@ -16,9 +16,9 @@ ; CHECK-NEXT: BL @callee, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x0 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp ; CHECK-NEXT: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.StackGuardSlot - ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX2]](p0) :: (volatile load (s64) from %stack.0.StackGuardSlot) - ; CHECK-NEXT: [[LOAD_STACK_GUARD2:%[0-9]+]]:gpr64sp(s64) = LOAD_STACK_GUARD :: (dereferenceable invariant load (p0) from @__stack_chk_guard) - ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[LOAD_STACK_GUARD2]](s64), [[LOAD]] + ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (volatile load (p0) from %stack.0.StackGuardSlot) + ; CHECK-NEXT: [[LOAD_STACK_GUARD2:%[0-9]+]]:gpr64sp(p0) = LOAD_STACK_GUARD :: (dereferenceable invariant load (p0) from @__stack_chk_guard) + ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[LOAD_STACK_GUARD2]](p0), [[LOAD]] ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.3 ; CHECK-NEXT: G_BR %bb.2 ; CHECK-NEXT: {{ $}}