diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -313,6 +313,7 @@
 
   Value *getPC(IRBuilder<> &IRB);
   Value *getSP(IRBuilder<> &IRB);
+  Value *getFrameRecordInfo(IRBuilder<> &IRB);
 
   void instrumentPersonalityFunctions();
 
@@ -1132,6 +1133,21 @@
   return CachedSP;
 }
 
+Value *HWAddressSanitizer::getFrameRecordInfo(IRBuilder<> &IRB) {
+  // Prepare ring buffer data.
+  Value *PC = getPC(IRB);
+  Value *SP = getSP(IRB);
+
+  // Mix SP and PC.
+  // Assumptions:
+  // PC is 0x0000PPPPPPPPPPPP  (48 bits are meaningful, others are zero)
+  // SP is 0xsssssssssssSSSS0  (4 lower bits are zero)
+  // We only really need ~20 lower non-zero bits (SSSS), so we mix like this:
+  //       0xSSSSPPPPPPPPPPPP
+  SP = IRB.CreateShl(SP, 44);
+  return IRB.CreateOr(PC, SP);
+}
+
 void HWAddressSanitizer::emitPrologue(IRBuilder<> &IRB, bool WithFrameRecord) {
   if (!Mapping.InTls)
     ShadowBase = getShadowNonTls(IRB);
@@ -1152,22 +1168,11 @@
   if (WithFrameRecord) {
     StackBaseTag = IRB.CreateAShr(ThreadLong, 3);
 
-    // Prepare ring buffer data.
-    Value *PC = getPC(IRB);
-    Value *SP = getSP(IRB);
-
-    // Mix SP and PC.
-    // Assumptions:
-    // PC is 0x0000PPPPPPPPPPPP  (48 bits are meaningful, others are zero)
-    // SP is 0xsssssssssssSSSS0  (4 lower bits are zero)
-    // We only really need ~20 lower non-zero bits (SSSS), so we mix like this:
-    //       0xSSSSPPPPPPPPPPPP
-    SP = IRB.CreateShl(SP, 44);
-
     // Store data to ring buffer.
+    Value *FrameRecordInfo = getFrameRecordInfo(IRB);
     Value *RecordPtr =
         IRB.CreateIntToPtr(ThreadLongMaybeUntagged, IntptrTy->getPointerTo(0));
-    IRB.CreateStore(IRB.CreateOr(PC, SP), RecordPtr);
+    IRB.CreateStore(FrameRecordInfo, RecordPtr);
 
     // Update the ring buffer. Top byte of ThreadLong defines the size of the
     // buffer in pages, it must be a power of two, and the start of the buffer
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
@@ -77,9 +77,9 @@
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -126,9 +126,9 @@
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -173,9 +173,9 @@
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -225,9 +225,9 @@
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -336,9 +336,9 @@
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -385,9 +385,9 @@
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -432,9 +432,9 @@
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -484,9 +484,9 @@
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -585,9 +585,9 @@
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -628,9 +628,9 @@
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -671,9 +671,9 @@
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -717,9 +717,9 @@
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -821,9 +821,9 @@
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -873,9 +873,9 @@
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -924,9 +924,9 @@
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -979,9 +979,9 @@
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -1098,9 +1098,9 @@
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -1154,9 +1154,9 @@
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -1203,9 +1203,9 @@
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-SCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1
@@ -1262,9 +1262,9 @@
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP11]], i64* [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i64 [[TMP10]], i64* [[TMP11]], align 4
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP14:%.*]] = xor i64 [[TMP13]], -1