diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp @@ -456,10 +456,6 @@ Register SrcReg, bool IsKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const { - DebugLoc DL; - if (I != MBB.end()) - DL = I->getDebugLoc(); - MachineFunction *MF = MBB.getParent(); MachineFrameInfo &MFI = MF->getFrameInfo(); @@ -522,7 +518,7 @@ MemoryLocation::UnknownSize, MFI.getObjectAlign(FI)); MFI.setStackID(FI, TargetStackID::ScalableVector); - auto MIB = BuildMI(MBB, I, DL, get(Opcode)) + auto MIB = BuildMI(MBB, I, DebugLoc(), get(Opcode)) .addReg(SrcReg, getKillRegState(IsKill)) .addFrameIndex(FI) .addMemOperand(MMO); @@ -537,7 +533,7 @@ MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore, MFI.getObjectSize(FI), MFI.getObjectAlign(FI)); - BuildMI(MBB, I, DL, get(Opcode)) + BuildMI(MBB, I, DebugLoc(), get(Opcode)) .addReg(SrcReg, getKillRegState(IsKill)) .addFrameIndex(FI) .addImm(0) @@ -550,10 +546,6 @@ Register DstReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const { - DebugLoc DL; - if (I != MBB.end()) - DL = I->getDebugLoc(); - MachineFunction *MF = MBB.getParent(); MachineFrameInfo &MFI = MF->getFrameInfo(); @@ -616,7 +608,7 @@ MemoryLocation::UnknownSize, MFI.getObjectAlign(FI)); MFI.setStackID(FI, TargetStackID::ScalableVector); - auto MIB = BuildMI(MBB, I, DL, get(Opcode), DstReg) + auto MIB = BuildMI(MBB, I, DebugLoc(), get(Opcode), DstReg) .addFrameIndex(FI) .addMemOperand(MMO); if (IsZvlsseg) { @@ -630,7 +622,7 @@ MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad, MFI.getObjectSize(FI), MFI.getObjectAlign(FI)); - BuildMI(MBB, I, DL, get(Opcode), DstReg) + BuildMI(MBB, I, DebugLoc(), get(Opcode), DstReg) .addFrameIndex(FI) .addImm(0) .addMemOperand(MMO);