diff --git a/llvm/test/CodeGen/RISCV/nest-register.ll b/llvm/test/CodeGen/RISCV/nest-register.ll
--- a/llvm/test/CodeGen/RISCV/nest-register.ll
+++ b/llvm/test/CodeGen/RISCV/nest-register.ll
@@ -7,7 +7,7 @@
 ; Tests that the 'nest' parameter attribute causes the relevant parameter to be
 ; passed in the right register.
 
-define i8* @nest_receiver(i8* nest %arg) nounwind {
+define ptr @nest_receiver(ptr nest %arg) nounwind {
 ; RV32I-LABEL: nest_receiver:
 ; RV32I:       # %bb.0:
 ; RV32I-NEXT:    mv a0, t2
@@ -18,10 +18,10 @@
 ; RV64I-NEXT:    mv a0, t2
 ; RV64I-NEXT:    ret
 ;
-  ret i8* %arg
+  ret ptr %arg
 }
 
-define i8* @nest_caller(i8* %arg) nounwind {
+define ptr @nest_caller(ptr %arg) nounwind {
 ; RV32I-LABEL: nest_caller:
 ; RV32I:       # %bb.0:
 ; RV32I-NEXT:    addi sp, sp, -16
@@ -42,6 +42,6 @@
 ; RV64I-NEXT:    addi sp, sp, 16
 ; RV64I-NEXT:    ret
 ;
-  %result = call i8* @nest_receiver(i8* nest %arg)
-  ret i8* %result
+  %result = call ptr @nest_receiver(ptr nest %arg)
+  ret ptr %result
 }