diff --git a/llvm/test/CodeGen/PowerPC/load-and-splat.ll b/llvm/test/CodeGen/PowerPC/load-and-splat.ll --- a/llvm/test/CodeGen/PowerPC/load-and-splat.ll +++ b/llvm/test/CodeGen/PowerPC/load-and-splat.ll @@ -1322,3 +1322,90 @@ %vecinit5 = shufflevector <2 x double> %vecinit, <2 x double> poison, <2 x i32> zeroinitializer ret <2 x double> %vecinit5 } + +define <4 x i32> @test_splatW(<8 x i16>* %ptr) { +; P9-LABEL: test_splatW: +; P9: # %bb.0: # %entry +; P9-NEXT: lxv vs0, 0(r3) +; P9-NEXT: xxspltw v2, vs0, 0 +; P9-NEXT: blr +; +; P8-LABEL: test_splatW: +; P8: # %bb.0: # %entry +; P8-NEXT: lxvd2x vs0, 0, r3 +; P8-NEXT: xxswapd v2, vs0 +; P8-NEXT: xxspltw v2, v2, 3 +; P8-NEXT: blr +; +; P7-LABEL: test_splatW: +; P7: # %bb.0: # %entry +; P7-NEXT: lxvw4x vs0, 0, r3 +; P7-NEXT: xxspltw v2, vs0, 0 +; P7-NEXT: blr +; +; P9-AIX32-LABEL: test_splatW: +; P9-AIX32: # %bb.0: # %entry +; P9-AIX32-NEXT: lxv vs0, 0(r3) +; P9-AIX32-NEXT: xxspltw v2, vs0, 0 +; P9-AIX32-NEXT: blr +; +; P8-AIX32-LABEL: test_splatW: +; P8-AIX32: # %bb.0: # %entry +; P8-AIX32-NEXT: lxvw4x vs0, 0, r3 +; P8-AIX32-NEXT: xxspltw v2, vs0, 0 +; P8-AIX32-NEXT: blr +; +; P7-AIX32-LABEL: test_splatW: +; P7-AIX32: # %bb.0: # %entry +; P7-AIX32-NEXT: lxvw4x vs0, 0, r3 +; P7-AIX32-NEXT: xxspltw v2, vs0, 0 +; P7-AIX32-NEXT: blr +entry: + %0 = load <8 x i16>, <8 x i16>* %ptr, align 16 + %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> + %2 = bitcast<8 x i16> %1 to <4 x i32> + ret <4 x i32> %2 +} + +define <4 x i32> @test_splatD(<8 x i16>* %ptr) { +; P9-LABEL: test_splatD: +; P9: # %bb.0: # %entry +; P9-NEXT: lxv vs0, 0(r3) +; P9-NEXT: xxspltd v2, vs0, 0 +; P9-NEXT: blr +; +; P8-LABEL: test_splatD: +; P8: # %bb.0: # %entry +; P8-NEXT: lxvd2x vs0, 0, r3 +; P8-NEXT: xxspltd v2, vs0, 0 +; P8-NEXT: blr +; +; P7-LABEL: test_splatD: +; P7: # %bb.0: # %entry +; P7-NEXT: lxvw4x vs0, 0, r3 +; P7-NEXT: xxspltd v2, vs0, 0 +; P7-NEXT: blr +; +; P9-AIX32-LABEL: test_splatD: +; P9-AIX32: # %bb.0: # %entry +; P9-AIX32-NEXT: lxv vs0, 0(r3) +; P9-AIX32-NEXT: xxmrghd v2, vs0, vs0 +; P9-AIX32-NEXT: blr +; +; P8-AIX32-LABEL: test_splatD: +; P8-AIX32: # %bb.0: # %entry +; P8-AIX32-NEXT: lxvw4x vs0, 0, r3 +; P8-AIX32-NEXT: xxmrghd v2, vs0, vs0 +; P8-AIX32-NEXT: blr +; +; P7-AIX32-LABEL: test_splatD: +; P7-AIX32: # %bb.0: # %entry +; P7-AIX32-NEXT: lxvw4x vs0, 0, r3 +; P7-AIX32-NEXT: xxmrghd v2, vs0, vs0 +; P7-AIX32-NEXT: blr +entry: + %0 = load <8 x i16>, <8 x i16>* %ptr, align 16 + %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> + %2 = bitcast<8 x i16> %1 to <4 x i32> + ret <4 x i32> %2 +}