diff --git a/llvm/lib/Target/AArch64/SVEInstrFormats.td b/llvm/lib/Target/AArch64/SVEInstrFormats.td --- a/llvm/lib/Target/AArch64/SVEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SVEInstrFormats.td @@ -4660,6 +4660,19 @@ (!cast(NAME # _S) ZPR32:$Zd, PPRAny:$Pg, 0, 0), 0>; def : InstAlias<"fmov $Zd, $Pg/m, #0.0", (!cast(NAME # _D) ZPR64:$Zd, PPRAny:$Pg, 0, 0), 0>; + + def : Pat<(vselect PPRAny:$Pg, (SVEDup0), (nxv8f16 ZPR:$Zd)), + (!cast(NAME # _H) $Zd, $Pg, 0, 0)>; + def : Pat<(vselect PPRAny:$Pg, (SVEDup0), (nxv4f16 ZPR:$Zd)), + (!cast(NAME # _S) $Zd, $Pg, 0, 0)>; + def : Pat<(vselect PPRAny:$Pg, (SVEDup0), (nxv2f16 ZPR:$Zd)), + (!cast(NAME # _D) $Zd, $Pg, 0, 0)>; + def : Pat<(vselect PPRAny:$Pg, (SVEDup0), (nxv4f32 ZPR:$Zd)), + (!cast(NAME # _S) $Zd, $Pg, 0, 0)>; + def : Pat<(vselect PPRAny:$Pg, (SVEDup0), (nxv2f32 ZPR:$Zd)), + (!cast(NAME # _D) $Zd, $Pg, 0, 0)>; + def : Pat<(vselect PPRAny:$Pg, (SVEDup0), (nxv2f64 ZPR:$Zd)), + (!cast(NAME # _D) $Zd, $Pg, 0, 0)>; } multiclass sve_int_dup_imm_pred_zero_inst< diff --git a/llvm/test/CodeGen/AArch64/sve-vselect-imm.ll b/llvm/test/CodeGen/AArch64/sve-vselect-imm.ll --- a/llvm/test/CodeGen/AArch64/sve-vselect-imm.ll +++ b/llvm/test/CodeGen/AArch64/sve-vselect-imm.ll @@ -311,8 +311,7 @@ define @sel_merge_nxv8f16_zero( %p, %in) { ; CHECK-LABEL: sel_merge_nxv8f16_zero: ; CHECK: // %bb.0: -; CHECK-NEXT: mov z1.h, #0 // =0x0 -; CHECK-NEXT: mov z0.h, p0/m, z1.h +; CHECK-NEXT: mov z0.h, p0/m, #0 // =0x0 ; CHECK-NEXT: ret %sel = select %p, zeroinitializer, %in ret %sel @@ -321,8 +320,7 @@ define @sel_merge_nx4f16_zero( %p, %in) { ; CHECK-LABEL: sel_merge_nx4f16_zero: ; CHECK: // %bb.0: -; CHECK-NEXT: mov z1.h, #0 // =0x0 -; CHECK-NEXT: mov z0.s, p0/m, z1.s +; CHECK-NEXT: mov z0.s, p0/m, #0 // =0x0 ; CHECK-NEXT: ret %sel = select %p, zeroinitializer, %in ret %sel @@ -331,8 +329,7 @@ define @sel_merge_nx2f16_zero( %p, %in) { ; CHECK-LABEL: sel_merge_nx2f16_zero: ; CHECK: // %bb.0: -; CHECK-NEXT: mov z1.h, #0 // =0x0 -; CHECK-NEXT: mov z0.d, p0/m, z1.d +; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 ; CHECK-NEXT: ret %sel = select %p, zeroinitializer, %in ret %sel @@ -341,8 +338,7 @@ define @sel_merge_nx4f32_zero( %p, %in) { ; CHECK-LABEL: sel_merge_nx4f32_zero: ; CHECK: // %bb.0: -; CHECK-NEXT: mov z1.s, #0 // =0x0 -; CHECK-NEXT: mov z0.s, p0/m, z1.s +; CHECK-NEXT: mov z0.s, p0/m, #0 // =0x0 ; CHECK-NEXT: ret %sel = select %p, zeroinitializer, %in ret %sel @@ -351,8 +347,7 @@ define @sel_merge_nx2f32_zero( %p, %in) { ; CHECK-LABEL: sel_merge_nx2f32_zero: ; CHECK: // %bb.0: -; CHECK-NEXT: mov z1.s, #0 // =0x0 -; CHECK-NEXT: mov z0.d, p0/m, z1.d +; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 ; CHECK-NEXT: ret %sel = select %p, zeroinitializer, %in ret %sel @@ -361,8 +356,7 @@ define @sel_merge_nx2f64_zero( %p, %in) { ; CHECK-LABEL: sel_merge_nx2f64_zero: ; CHECK: // %bb.0: -; CHECK-NEXT: mov z1.d, #0 // =0x0 -; CHECK-NEXT: mov z0.d, p0/m, z1.d +; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 ; CHECK-NEXT: ret %sel = select %p, zeroinitializer, %in ret %sel