Index: llvm/lib/Analysis/ScalarEvolution.cpp
===================================================================
--- llvm/lib/Analysis/ScalarEvolution.cpp
+++ llvm/lib/Analysis/ScalarEvolution.cpp
@@ -11647,7 +11647,7 @@
       const SCEV *L = getSCEV(LPhi->getIncomingValueForBlock(IncBB));
       // Make sure L does not refer to a value from a potentially previous
       // iteration of a loop.
-      if (!properlyDominates(L, IncBB))
+      if (!properlyDominates(L, LBB))
         return false;
       if (!ProvedEasily(L, RHS))
         return false;
Index: llvm/test/Transforms/IRCE/decrementing-loop.ll
===================================================================
--- llvm/test/Transforms/IRCE/decrementing-loop.ll
+++ llvm/test/Transforms/IRCE/decrementing-loop.ll
@@ -210,17 +210,16 @@
   ret void
 }
 
-; TODO: we need to be more careful when trying to look through phi nodes in
-; cycles, because the condition to prove may reference the previous value of
-; the phi. So we currently fail to optimize this case.
 ; Check that we can figure out that IV is non-negative via implication through
 ; two Phi nodes, one being AddRec.
 define void @test_05(i32* %a, i32* %a_len_ptr, i1 %cond) {
 
 ; CHECK-LABEL: test_05
-; CHECK: entry:
-; CHECK:   br label %merge
-; CHECK-NOT: mainloop
+; CHECK:       mainloop:
+; CHECK-NEXT:    br label %loop
+; CHECK:       loop:
+; CHECK:         br i1 true, label %in.bounds, label %out.of.bounds
+; CHECK:       loop.preloop:
 
  entry:
   %len.a = load i32, i32* %a_len_ptr, !range !0
Index: llvm/test/Transforms/IndVarSimplify/pr56242.ll
===================================================================
--- llvm/test/Transforms/IndVarSimplify/pr56242.ll
+++ llvm/test/Transforms/IndVarSimplify/pr56242.ll
@@ -9,12 +9,14 @@
 ; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
 ; CHECK:       loop.header:
 ; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[IV_INC:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[PREV:%.*]] = phi i32 [ [[V:%.*]], [[LOOP_LATCH]] ], [ 0, [[ENTRY]] ]
 ; CHECK-NEXT:    [[PTR:%.*]] = getelementptr inbounds i32, ptr [[ARR:%.*]], i64 [[IV]]
-; CHECK-NEXT:    [[V:%.*]] = load i32, ptr [[PTR]], align 4
+; CHECK-NEXT:    [[V]] = load i32, ptr [[PTR]], align 4
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[V]], 0
 ; CHECK-NEXT:    br i1 [[CMP1]], label [[IF:%.*]], label [[LOOP_LATCH]]
 ; CHECK:       if:
-; CHECK-NEXT:    call void @use(i1 false)
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i32 [[PREV]], 0
+; CHECK-NEXT:    call void @use(i1 [[CMP2]])
 ; CHECK-NEXT:    br label [[LOOP_LATCH]]
 ; CHECK:       loop.latch:
 ; CHECK-NEXT:    [[IV_INC]] = add nuw nsw i64 [[IV]], 1