diff --git a/mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp b/mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp --- a/mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp +++ b/mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp @@ -455,12 +455,14 @@ indices.back(), oneValue); auto componentAcOp = rewriter.create(loc, acOp.base_ptr(), indices); + // Assuming little endian, this reads lower-ordered bits of the number to + // lower-numbered components of the vector. components.push_back(rewriter.create(loc, componentAcOp)); } - std::reverse(components.begin(), components.end()); // For little endian.. // Create a vector of the components and then cast back to the larger - // bitwidth element type. + // bitwidth element type. For spv.bitcast, the lower-numbered components of + // the vector map to lower-ordered bits of the larger bitwidth element type. auto vectorType = VectorType::get({ratio}, dstElemType); Value vectorValue = rewriter.create( loc, vectorType, components); diff --git a/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir b/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir --- a/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir +++ b/mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir @@ -251,7 +251,7 @@ // CHECK: %[[AC1:.+]] = spv.AccessChain %[[ADDR]][%[[ZERO]], %[[ADD]]] // CHECK: %[[LOAD1:.+]] = spv.Load "StorageBuffer" %[[AC1]] : f32 -// CHECK: %[[CC:.+]] = spv.CompositeConstruct %[[LOAD1]], %[[LOAD0]] +// CHECK: %[[CC:.+]] = spv.CompositeConstruct %[[LOAD0]], %[[LOAD1]] // CHECK: %[[CAST:.+]] = spv.Bitcast %[[CC]] : vector<2xf32> to i64 // CHECK: spv.ReturnValue %[[CAST]]