diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -303,8 +303,12 @@
 
 bool RegAllocFast::shouldAllocateRegister(const Register Reg) const {
   assert(Register::isVirtualRegister(Reg));
-  const TargetRegisterClass &RC = *MRI->getRegClass(Reg);
-  return ShouldAllocateClass(*TRI, RC);
+  const TargetRegisterClass *RC = MRI->getRegClassOrNull(Reg);
+  // Follow the default behaviour to return true if there is no
+  // register class for the register. This may happen in gloal ISel.
+  if (!RC)
+    return true;
+  return ShouldAllocateClass(*TRI, *RC);
 }
 
 void RegAllocFast::setPhysRegState(MCPhysReg PhysReg, unsigned NewState) {
diff --git a/llvm/lib/Target/X86/X86FastPreTileConfig.cpp b/llvm/lib/Target/X86/X86FastPreTileConfig.cpp
--- a/llvm/lib/Target/X86/X86FastPreTileConfig.cpp
+++ b/llvm/lib/Target/X86/X86FastPreTileConfig.cpp
@@ -667,7 +667,10 @@
   bool HasVirtTileReg = false;
   for (unsigned I = 0, E = NumVirtRegs; I != E; ++I) {
     Register VirtReg = Register::index2VirtReg(I);
-    if (MRI->getRegClass(VirtReg)->getID() == X86::TILERegClassID) {
+    const TargetRegisterClass *RC = MRI->getRegClassOrNull(VirtReg);
+    if (!RC)
+      continue;
+    if (RC->getID() == X86::TILERegClassID) {
       HasVirtTileReg = true;
       break;
     }
diff --git a/llvm/test/DebugInfo/Generic/two-cus-from-same-file.ll b/llvm/test/DebugInfo/Generic/two-cus-from-same-file.ll
--- a/llvm/test/DebugInfo/Generic/two-cus-from-same-file.ll
+++ b/llvm/test/DebugInfo/Generic/two-cus-from-same-file.ll
@@ -5,6 +5,8 @@
 
 ; RUN: %llc_dwarf %s -o %t -filetype=obj -O0
 ; RUN: llvm-dwarfdump -debug-info %t | FileCheck %s
+; RUN: %llc_dwarf %s -o %t --global-isel -filetype=obj -O0
+; RUN: llvm-dwarfdump -debug-info %t | FileCheck %s
 
 ; ModuleID = 'test.bc'