Index: llvm/lib/Target/Sparc/SparcFrameLowering.cpp
===================================================================
--- llvm/lib/Target/Sparc/SparcFrameLowering.cpp
+++ llvm/lib/Target/Sparc/SparcFrameLowering.cpp
@@ -326,10 +326,11 @@
   MachineRegisterInfo &MRI = MF.getRegInfo();
   MachineFrameInfo    &MFI = MF.getFrameInfo();
 
-  return !(MFI.hasCalls()                  // has calls
-           || MRI.isPhysRegUsed(SP::L0)    // Too many registers needed
-           || MRI.isPhysRegUsed(SP::O6)    // %sp is used
-           || hasFP(MF));                  // need %fp
+  return !(MFI.hasCalls()               // has calls
+           || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
+           || MRI.isPhysRegUsed(SP::O6) // %sp is used
+           || hasFP(MF)                 // need %fp
+           || MF.hasInlineAsm());       // has inline assembly
 }
 
 void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
Index: llvm/test/CodeGen/SPARC/leafproc.ll
===================================================================
--- llvm/test/CodeGen/SPARC/leafproc.ll
+++ llvm/test/CodeGen/SPARC/leafproc.ll
@@ -78,3 +78,25 @@
   %4 = load i32, i32* %3, align 4
   ret i32 %4
 }
+
+; Here we have a leaf function where it contains inline assembly, which means
+; that register renumbering might interfere with the register constraints.
+; As a result the function is not marked as being a leaf one.
+
+; CHECK-LABEL: leaf_proc_give_up
+; CHECK: save %sp, -96, %sp
+; CHECK: ld [%fp+92], %o5
+; CHECK: mov %i0, %g1
+; CHECK: mov %i1, %o0
+; CHECK: mov %i2, %o1
+; CHECK: mov %i3, %o2
+; CHECK: mov %i4, %o3
+; CHECK: mov %i5, %o4
+; CHECK: ret
+; CHECK-NEXT: restore %g0, %o0, %o0
+
+define i32 @leaf_proc_give_up(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
+Entry:
+  %g = call i32 asm sideeffect "", "={o0},{g1},{o0},{o1},{o2},{o3},{o4},{o5}"(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6)
+  ret i32 %g
+}