diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -206,14 +206,18 @@
 TLI_DEFINE_VECFUNC("cbrt", "__cbrtd2", FIXED(2))
 TLI_DEFINE_VECFUNC("cbrtf", "__cbrtf4", FIXED(4))
 TLI_DEFINE_VECFUNC("pow", "__powd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__pow_finite", "__powd2", FIXED(2))
 TLI_DEFINE_VECFUNC("llvm.pow.f64", "__powd2", FIXED(2))
 TLI_DEFINE_VECFUNC("powf", "__powf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__powf_finite", "__powf4", FIXED(4))
 TLI_DEFINE_VECFUNC("llvm.pow.f32", "__powf4", FIXED(4))
 
 // Exponential and Logarithmic Functions
 TLI_DEFINE_VECFUNC("exp", "__expd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__exp_finite", "__expd2", FIXED(2))
 TLI_DEFINE_VECFUNC("llvm.exp.f64", "__expd2", FIXED(2))
 TLI_DEFINE_VECFUNC("expf", "__expf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__expf_finite", "__expf4", FIXED(4))
 TLI_DEFINE_VECFUNC("llvm.exp.f32", "__expf4", FIXED(4))
 TLI_DEFINE_VECFUNC("exp2", "__exp2d2", FIXED(2))
 TLI_DEFINE_VECFUNC("llvm.exp2.f64", "__exp2d2", FIXED(2))
@@ -222,14 +226,18 @@
 TLI_DEFINE_VECFUNC("expm1", "__expm1d2", FIXED(2))
 TLI_DEFINE_VECFUNC("expm1f", "__expm1f4", FIXED(4))
 TLI_DEFINE_VECFUNC("log", "__logd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__log_finite", "__logd2", FIXED(2))
 TLI_DEFINE_VECFUNC("llvm.log.f64", "__logd2", FIXED(2))
 TLI_DEFINE_VECFUNC("logf", "__logf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__logf_finite", "__logf4", FIXED(4))
 TLI_DEFINE_VECFUNC("llvm.log.f32", "__logf4", FIXED(4))
 TLI_DEFINE_VECFUNC("log1p", "__log1pd2", FIXED(2))
 TLI_DEFINE_VECFUNC("log1pf", "__log1pf4", FIXED(4))
 TLI_DEFINE_VECFUNC("log10", "__log10d2", FIXED(2))
+TLI_DEFINE_VECFUNC("__log10_finite", "__log10d2", FIXED(2))
 TLI_DEFINE_VECFUNC("llvm.log10.f64", "__log10d2", FIXED(2))
 TLI_DEFINE_VECFUNC("log10f", "__log10f4", FIXED(4))
+TLI_DEFINE_VECFUNC("__log10f_finite", "__log10f4", FIXED(4))
 TLI_DEFINE_VECFUNC("llvm.log10.f32", "__log10f4", FIXED(4))
 TLI_DEFINE_VECFUNC("log2", "__log2d2", FIXED(2))
 TLI_DEFINE_VECFUNC("llvm.log2.f64", "__log2d2", FIXED(2))
@@ -248,27 +256,41 @@
 TLI_DEFINE_VECFUNC("tan", "__tand2", FIXED(2))
 TLI_DEFINE_VECFUNC("tanf", "__tanf4", FIXED(4))
 TLI_DEFINE_VECFUNC("asin", "__asind2", FIXED(2))
+TLI_DEFINE_VECFUNC("__asin_finite", "__asind2", FIXED(2))
 TLI_DEFINE_VECFUNC("asinf", "__asinf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__asinf_finite", "__asinf4", FIXED(4))
 TLI_DEFINE_VECFUNC("acos", "__acosd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__acos_finite", "__acosd2", FIXED(2))
 TLI_DEFINE_VECFUNC("acosf", "__acosf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__acosf_finite", "__acosf4", FIXED(4))
 TLI_DEFINE_VECFUNC("atan", "__atand2", FIXED(2))
 TLI_DEFINE_VECFUNC("atanf", "__atanf4", FIXED(4))
 TLI_DEFINE_VECFUNC("atan2", "__atan2d2", FIXED(2))
+TLI_DEFINE_VECFUNC("__atan2_finite", "__atan2d2", FIXED(2))
 TLI_DEFINE_VECFUNC("atan2f", "__atan2f4", FIXED(4))
+TLI_DEFINE_VECFUNC("__atan2f_finite", "__atan2f4", FIXED(4))
 
 // Hyperbolic Functions
 TLI_DEFINE_VECFUNC("sinh", "__sinhd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__sinh_finite", "__sinhd2", FIXED(2))
 TLI_DEFINE_VECFUNC("sinhf", "__sinhf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__sinhf_finite", "__sinhf4", FIXED(4))
 TLI_DEFINE_VECFUNC("cosh", "__coshd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__cosh_finite", "__coshd2", FIXED(2))
 TLI_DEFINE_VECFUNC("coshf", "__coshf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__coshf_finite", "__coshf4", FIXED(4))
 TLI_DEFINE_VECFUNC("tanh", "__tanhd2", FIXED(2))
 TLI_DEFINE_VECFUNC("tanhf", "__tanhf4", FIXED(4))
 TLI_DEFINE_VECFUNC("asinh", "__asinhd2", FIXED(2))
 TLI_DEFINE_VECFUNC("asinhf", "__asinhf4", FIXED(4))
 TLI_DEFINE_VECFUNC("acosh", "__acoshd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__acosh_finite", "__acoshd2", FIXED(2))
 TLI_DEFINE_VECFUNC("acoshf", "__acoshf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__acoshf_finite", "__acoshf4", FIXED(4))
 TLI_DEFINE_VECFUNC("atanh", "__atanhd2", FIXED(2))
+TLI_DEFINE_VECFUNC("__atanh_finite", "__atanhd2", FIXED(2))
 TLI_DEFINE_VECFUNC("atanhf", "__atanhf4", FIXED(4))
+TLI_DEFINE_VECFUNC("__atanhf_finite", "__atanhf4", FIXED(4))
 
 
 #elif defined(TLI_DEFINE_SVML_VECFUNCS)
diff --git a/llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp b/llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
--- a/llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
+++ b/llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
@@ -75,7 +75,7 @@
   if (!Subtarget)
     return "";
   // TODO: add _P10 enties to Linux MASS lib and remove the check for AIX
-  if (Subtarget->isAIXABI() && Subtarget->hasP10Vector())
+  if (Subtarget->hasP10Vector())
     return "_P10";
   if (Subtarget->hasP9Vector())
     return "_P9";
@@ -145,7 +145,7 @@
   FunctionCallee FCache = M.getOrInsertFunction(
       MASSVEntryName, Func.getFunctionType(), Func.getAttributes());
 
-  CI->setCalledFunction(FCache);  
+  CI->setCalledFunction(FCache);
 
   return true;
 }
@@ -171,7 +171,7 @@
     // replacing the users. Precomputing the current list of users allows us to
     // replace all the call sites.
     SmallVector<User *, 4> MASSVUsers(Func.users());
-    
+
     for (auto *User : MASSVUsers) {
       auto *CI = dyn_cast<CallInst>(User);
       if (!CI)
diff --git a/llvm/test/CodeGen/PowerPC/lower-massv.ll b/llvm/test/CodeGen/PowerPC/lower-massv.ll
--- a/llvm/test/CodeGen/PowerPC/lower-massv.ll
+++ b/llvm/test/CodeGen/PowerPC/lower-massv.ll
@@ -1,12 +1,12 @@
-; RUN: llc -verify-machineinstrs -mcpu=pwr10  < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs -mcpu=pwr9   < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs -mcpu=pwr8   < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs -mcpu=pwr10  < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR10,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs -mcpu=pwr9   < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs -mcpu=pwr8   < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs -mcpu=pwr7   < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR7,CHECK-ALL %s 
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR7,CHECK-ALL %s 
+; RUN: llc -verify-machineinstrs -mcpu=pwr10  < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR10,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr9   < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr8   < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr10  < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR10,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr9   < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR9,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr8   < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR8,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr7   < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR7,CHECK-ALL %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck -check-prefixes=CHECK-PWR7,CHECK-ALL %s
 
 declare <2 x double> @__cbrtd2(<2 x double>)
 declare <4 x float> @__cbrtf4(<4 x float>)
@@ -86,7 +86,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__cbrtd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @cbrt_f32_massv(<4 x float> %opnd) {
@@ -99,7 +99,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__cbrtf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; pow
@@ -113,7 +113,7 @@
 ; CHECK-ALL:   blr
 ;
  %1 = call <2 x double> @__powd2(<2 x double> %opnd1, <2 x double> %opnd2)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @pow_f32_massv(<4 x float> %opnd1, <4 x float> %opnd2) {
@@ -126,7 +126,7 @@
 ; CHECK-ALL:   blr
 ;
  %1 = call <4 x float> @__powf4(<4 x float> %opnd1, <4 x float> %opnd2)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; exp
@@ -140,7 +140,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__expd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @exp_f32_massv(<4 x float> %opnd) {
@@ -153,7 +153,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__expf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; exp2
@@ -167,7 +167,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__exp2d2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @exp2_f32_massv(<4 x float> %opnd) {
@@ -180,7 +180,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__exp2f4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; expm1
@@ -194,7 +194,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__expm1d2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @expm1_f32_massv(<4 x float> %opnd) {
@@ -207,7 +207,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__expm1f4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; log
@@ -221,7 +221,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__logd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @log_f32_massv(<4 x float> %opnd) {
@@ -234,7 +234,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__logf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; log1p
@@ -248,7 +248,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__log1pd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @log1p_f32_massv(<4 x float> %opnd) {
@@ -261,7 +261,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__log1pf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; log10
@@ -275,7 +275,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__log10d2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @log10_f32_massv(<4 x float> %opnd) {
@@ -288,7 +288,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__log10f4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; log2
@@ -302,7 +302,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__log2d2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @log2_f32_massv(<4 x float> %opnd) {
@@ -315,7 +315,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__log2f4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; sin
@@ -329,7 +329,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__sind2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @sin_f32_massv(<4 x float> %opnd) {
@@ -342,7 +342,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__sinf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; cos
@@ -356,7 +356,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__cosd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @cos_f32_massv(<4 x float> %opnd) {
@@ -369,7 +369,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__cosf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; tan
@@ -383,7 +383,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__tand2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @tan_f32_massv(<4 x float> %opnd) {
@@ -396,7 +396,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__tanf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; asin
@@ -410,7 +410,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__asind2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @asin_f32_massv(<4 x float> %opnd) {
@@ -423,7 +423,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__asinf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; acos
@@ -437,7 +437,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__acosd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @acos_f32_massv(<4 x float> %opnd) {
@@ -450,7 +450,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__acosf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; atan
@@ -464,7 +464,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__atand2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @atan_f32_massv(<4 x float> %opnd) {
@@ -477,7 +477,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__atanf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; atan2
@@ -491,7 +491,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__atan2d2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @atan2_f32_massv(<4 x float> %opnd) {
@@ -504,7 +504,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__atan2f4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; sinh
@@ -518,7 +518,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__sinhd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @sinh_f32_massv(<4 x float> %opnd) {
@@ -531,7 +531,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__sinhf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; cosh
@@ -545,7 +545,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__coshd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @cosh_f32_massv(<4 x float> %opnd) {
@@ -558,7 +558,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__coshf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; tanh
@@ -572,7 +572,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__tanhd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @tanh_f32_massv(<4 x float> %opnd) {
@@ -585,7 +585,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__tanhf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; asinh
@@ -599,7 +599,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__asinhd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @asinh_f32_massv(<4 x float> %opnd) {
@@ -612,7 +612,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__asinhf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; acosh
@@ -626,7 +626,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__acoshd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @acosh_f32_massv(<4 x float> %opnd) {
@@ -639,7 +639,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__acoshf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
 ; atanh
@@ -653,7 +653,7 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <2 x double> @__atanhd2(<2 x double> %opnd)
-  ret <2 x double> %1 
+  ret <2 x double> %1
 }
 
 define <4 x float>  @atanh_f32_massv(<4 x float> %opnd) {
@@ -666,6 +666,6 @@
 ; CHECK-ALL:   blr
 ;
   %1 = call <4 x float> @__atanhf4(<4 x float> %opnd)
-  ret <4 x float> %1 
+  ret <4 x float> %1
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/pow_massv_075_025exp.ll b/llvm/test/CodeGen/PowerPC/pow_massv_075_025exp.ll
--- a/llvm/test/CodeGen/PowerPC/pow_massv_075_025exp.ll
+++ b/llvm/test/CodeGen/PowerPC/pow_massv_075_025exp.ll
@@ -1,4 +1,4 @@
-; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr10 | FileCheck -check-prefixes=CHECK-PWR9 %s
+; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr10 | FileCheck -check-prefixes=CHECK-PWR10 %s
 ; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck -check-prefixes=CHECK-PWR9 %s
 ; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr8 | FileCheck -check-prefixes=CHECK-PWR8 %s
 ; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr10 | FileCheck -check-prefixes=CHECK-PWR10 %s
@@ -65,7 +65,7 @@
   ret void
 }
 
-; Exponent is a constant != 0.75 and !=0.25 and they are different 
+; Exponent is a constant != 0.75 and !=0.25 and they are different
 define void @vpow_noeq_const(double* nocapture %y, double* nocapture readonly %x) {
 ; CHECK-LABEL:       @vpow_noeq_const
 ; CHECK-PWR10:       __powd2_P10
@@ -93,7 +93,7 @@
   ret void
 }
 
-; Exponent is a constant != 0.75 and !=0.25 and they are different 
+; Exponent is a constant != 0.75 and !=0.25 and they are different
 define void @vpow_noeq075_const(double* nocapture %y, double* nocapture readonly %x) {
 ; CHECK-LABEL:       @vpow_noeq075_const
 ; CHECK-PWR10:       __powd2_P10
@@ -121,7 +121,7 @@
   ret void
 }
 
-; Exponent is a constant != 0.75 and !=0.25 and they are different 
+; Exponent is a constant != 0.75 and !=0.25 and they are different
 define void @vpow_noeq025_const(double* nocapture %y, double* nocapture readonly %x) {
 ; CHECK-LABEL:       @vpow_noeq025_const
 ; CHECK-PWR10:       __powd2_P10
diff --git a/llvm/test/CodeGen/PowerPC/powf_massv_075_025exp.ll b/llvm/test/CodeGen/PowerPC/powf_massv_075_025exp.ll
--- a/llvm/test/CodeGen/PowerPC/powf_massv_075_025exp.ll
+++ b/llvm/test/CodeGen/PowerPC/powf_massv_075_025exp.ll
@@ -1,4 +1,4 @@
-; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr10 | FileCheck -check-prefixes=CHECK-PWR9 %s
+; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr10 | FileCheck -check-prefixes=CHECK-PWR10 %s
 ; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck -check-prefixes=CHECK-PWR9 %s
 ; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr8 | FileCheck -check-prefixes=CHECK-PWR8 %s
 ; RUN: llc -vector-library=MASSV < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr10 | FileCheck -check-prefixes=CHECK-PWR10 %s
@@ -65,7 +65,7 @@
   ret void
 }
 
-; Exponent is a constant != 0.75 and !=0.25 and they are different 
+; Exponent is a constant != 0.75 and !=0.25 and they are different
 define void @vspow_neq_const(float* nocapture %y, float* nocapture readonly %x)  {
 ; CHECK-LABEL:       @vspow_neq_const
 ; CHECK-PWR10:       __powf4_P10
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
@@ -5,16 +5,20 @@
 declare float @cbrtf(float) #0
 
 declare double @pow(double, double) #0
+declare double @__pow_finite(double, double) #0
 declare double @llvm.pow.f64(double, double) #0
 declare float @powf(float, float) #0
+declare float @__powf_finite(float, float) #0
 declare float @llvm.pow.f32(float, float) #0
 
 declare double @sqrt(double) #0
 declare float @sqrtf(float) #0
 
 declare double @exp(double) #0
+declare double @__exp_finite(double) #0
 declare double @llvm.exp.f64(double) #0
 declare float @expf(float) #0
+declare float @__expf_finite(float) #0
 declare float @llvm.exp.f32(float) #0
 
 declare double @exp2(double) #0
@@ -26,16 +30,20 @@
 declare float @expm1f(float) #0
 
 declare double @log(double) #0
+declare double @__log_finite(double) #0
 declare double @llvm.log.f64(double) #0
 declare float @logf(float) #0
+declare float @__logf_finite(float) #0
 declare float @llvm.log.f32(float) #0
 
 declare double @log1p(double) #0
 declare float @log1pf(float) #0
 
 declare double @log10(double) #0
+declare double @__log10_finite(double) #0
 declare double @llvm.log10.f64(double) #0
 declare float @log10f(float) #0
+declare float @__log10f_finite(float) #0
 declare float @llvm.log10.f32(float) #0
 
 declare double @log2(double) #0
@@ -57,22 +65,32 @@
 declare float @tanf(float) #0
 
 declare double @asin(double) #0
+declare double @__asin_finite(double) #0
 declare float @asinf(float) #0
+declare float @__asinf_finite(float) #0
 
 declare double @acos(double) #0
+declare double @__acos_finite(double) #0
 declare float @acosf(float) #0
+declare float @__acosf_finite(float) #0
 
 declare double @atan(double) #0
 declare float @atanf(float) #0
 
 declare double @atan2(double) #0
+declare double @__atan2_finite(double) #0
 declare float @atan2f(float) #0
+declare float @__atan2f_finite(float) #0
 
 declare double @sinh(double) #0
+declare double @__sinh_finite(double) #0
 declare float @sinhf(float) #0
+declare float @__sinhf_finite(float) #0
 
 declare double @cosh(double) #0
+declare double @__cosh_finite(double) #0
 declare float @coshf(float) #0
+declare float @__coshf_finite(float) #0
 
 declare double @tanh(double) #0
 declare float @tanhf(float) #0
@@ -81,10 +99,14 @@
 declare float @asinhf(float) #0
 
 declare double @acosh(double) #0
+declare double @__acosh_finite(double) #0
 declare float @acoshf(float) #0
+declare float @__acoshf_finite(float) #0
 
 declare double @atanh(double) #0
+declare double @__atanh_finite(double) #0
 declare float @atanhf(float) #0
+declare float @__atanhf_finite(float) #0
 
 define void @cbrt_f64(double* nocapture %varray) {
 ; CHECK-LABEL: @cbrt_f64(
@@ -157,6 +179,31 @@
   ret void
 }
 
+define void @pow_f64_finite(double* nocapture %varray, double* nocapture readonly %exp) {
+; CHECK-LABEL: @pow_f64_finite(
+; CHECK:  __powd2{{.*}}<2 x double>
+; CHECK:  ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %arrayidx = getelementptr inbounds double, double* %exp, i64 %iv
+  %tmp1 = load double, double* %arrayidx, align 4
+  %tmp2 = tail call double @__pow_finite(double %conv, double %tmp1)
+  %arrayidx2 = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %tmp2, double* %arrayidx2, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @pow_f64_intrinsic(double* nocapture %varray, double* nocapture readonly %exp) {
 ; CHECK-LABEL: @pow_f64_intrinsic(
 ; CHECK: __powd2{{.*}}<2 x double>
@@ -207,6 +254,31 @@
   ret void
 }
 
+define void @pow_f32_finite(float* nocapture %varray, float* nocapture readonly %exp) {
+; CHECK-LABEL: @pow_f32_finite(
+; CHECK: __powf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %arrayidx = getelementptr inbounds float, float* %exp, i64 %iv
+  %tmp1 = load float, float* %arrayidx, align 4
+  %tmp2 = tail call float @__powf_finite(float %conv, float %tmp1)
+  %arrayidx2 = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %tmp2, float* %arrayidx2, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @pow_f32_intrinsic(float* nocapture %varray, float* nocapture readonly %exp) {
 ; CHECK-LABEL: @pow_f32_intrinsic(
 ; CHECK: __powf4{{.*}}<4 x float>
@@ -301,6 +373,29 @@
   ret void
 }
 
+define void @exp_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @exp_f64_finite(
+; CHECK: __expd2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__exp_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @exp_f64_intrinsic(double* nocapture %varray) {
 ; CHECK-LABEL: @exp_f64_intrinsic(
 ; CHECK: __expd2{{.*}}<2 x double>
@@ -347,6 +442,29 @@
   ret void
 }
 
+define void @exp_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @exp_f32_finite(
+; CHECK: __expf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__expf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @exp_f32_intrinsic(float* nocapture %varray) {
 ; CHECK-LABEL: @exp_f32_intrinsic(
 ; CHECK: __expf4{{.*}}<4 x float>
@@ -531,6 +649,29 @@
   ret void
 }
 
+define void @log_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @log_f64_finite(
+; CHECK: __logd2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__log_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @log_f64_intrinsic(double* nocapture %varray) {
 ; CHECK-LABEL: @log_f64_intrinsic(
 ; CHECK: __logd2{{.*}}<2 x double>
@@ -577,6 +718,29 @@
   ret void
 }
 
+define void @log_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @log_f32_finite(
+; CHECK: __logf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__logf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @log_f32_intrinsic(float* nocapture %varray) {
 ; CHECK-LABEL: @log_f32_intrinsic(
 ; CHECK: __logf4{{.*}}<4 x float>
@@ -669,6 +833,29 @@
   ret void
 }
 
+define void @log10_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @log10_f64_finite(
+; CHECK: __log10d2(<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__log10_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @log10_f64_intrinsic(double* nocapture %varray) {
 ; CHECK-LABEL: @log10_f64_intrinsic(
 ; CHECK: __log10d2{{.*}}<2 x double>
@@ -715,6 +902,29 @@
   ret void
 }
 
+define void @log10_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @log10_f32_finite(
+; CHECK: __log10f4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__log10f_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @log10_f32_intrinsic(float* nocapture %varray) {
 ; CHECK-LABEL: @log10_f32_intrinsic(
 ; CHECK: __log10f4{{.*}}<4 x float>
@@ -1083,6 +1293,29 @@
   ret void
 }
 
+define void @asin_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @asin_f64_finite(
+; CHECK: __asind2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__asin_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @asin_f32(float* nocapture %varray) {
 ; CHECK-LABEL: @asin_f32(
 ; CHECK: __asinf4{{.*}}<4 x float>
@@ -1106,6 +1339,29 @@
   ret void
 }
 
+define void @asin_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @asin_f32_finite(
+; CHECK: __asinf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__asinf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @acos_f64(double* nocapture %varray) {
 ; CHECK-LABEL: @acos_f64(
 ; CHECK: __acosd2{{.*}}<2 x double>
@@ -1129,6 +1385,29 @@
   ret void
 }
 
+define void @acos_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @acos_f64_finite(
+; CHECK: __acosd2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__acos_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @acos_f32(float* nocapture %varray) {
 ; CHECK-LABEL: @acos_f32(
 ; CHECK: __acosf4{{.*}}<4 x float>
@@ -1152,6 +1431,29 @@
   ret void
 }
 
+define void @acos_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @acos_f32_finite(
+; CHECK: __acosf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__acosf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @atan_f64(double* nocapture %varray) {
 ; CHECK-LABEL: @atan_f64(
 ; CHECK: __atand2{{.*}}<2 x double>
@@ -1221,6 +1523,29 @@
   ret void
 }
 
+define void @atan2_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @atan2_f64_finite(
+; CHECK: __atan2d2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__atan2_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @atan2_f32(float* nocapture %varray) {
 ; CHECK-LABEL: @atan2_f32(
 ; CHECK: __atan2f4{{.*}}<4 x float>
@@ -1244,6 +1569,29 @@
   ret void
 }
 
+define void @atan2_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @atan2_f32_finite(
+; CHECK: __atan2f4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__atan2f_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @sinh_f64(double* nocapture %varray) {
 ; CHECK-LABEL: @sinh_f64(
 ; CHECK: __sinhd2{{.*}}<2 x double>
@@ -1267,6 +1615,29 @@
   ret void
 }
 
+define void @sinh_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @sinh_f64_finite(
+; CHECK: __sinhd2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__sinh_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @sinh_f32(float* nocapture %varray) {
 ; CHECK-LABEL: @sinh_f32(
 ; CHECK: __sinhf4{{.*}}<4 x float>
@@ -1290,6 +1661,29 @@
   ret void
 }
 
+define void @sinh_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @sinh_f32_finite(
+; CHECK: __sinhf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__sinhf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @cosh_f64(double* nocapture %varray) {
 ; CHECK-LABEL: @cosh_f64(
 ; CHECK: __coshd2{{.*}}<2 x double>
@@ -1313,6 +1707,29 @@
   ret void
 }
 
+define void @cosh_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @cosh_f64_finite(
+; CHECK: __coshd2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__cosh_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @cosh_f32(float* nocapture %varray) {
 ; CHECK-LABEL: @cosh_f32(
 ; CHECK: __coshf4{{.*}}<4 x float>
@@ -1336,6 +1753,29 @@
   ret void
 }
 
+define void @cosh_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @cosh_f32_finite(
+; CHECK: __coshf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__coshf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @tanh_f64(double* nocapture %varray) {
 ; CHECK-LABEL: @tanh_f64(
 ; CHECK: __tanhd2{{.*}}<2 x double>
@@ -1451,6 +1891,29 @@
   ret void
 }
 
+define void @acosh_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @acosh_f64_finite(
+; CHECK: __acoshd2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__acosh_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @acosh_f32(float* nocapture %varray) {
 ; CHECK-LABEL: @acosh_f32(
 ; CHECK: __acoshf4{{.*}}<4 x float>
@@ -1474,6 +1937,29 @@
   ret void
 }
 
+define void @acosh_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @acosh_f32_finite(
+; CHECK: __acoshf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__acoshf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @atanh_f64(double* nocapture %varray) {
 ; CHECK-LABEL: @atanh_f64(
 ; CHECK: __atanhd2{{.*}}<2 x double>
@@ -1497,6 +1983,29 @@
   ret void
 }
 
+define void @atanh_f64_finite(double* nocapture %varray) {
+; CHECK-LABEL: @atanh_f64_finite(
+; CHECK: __atanhd2{{.*}}<2 x double>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to double
+  %call = tail call double @__atanh_finite(double %conv)
+  %arrayidx = getelementptr inbounds double, double* %varray, i64 %iv
+  store double %call, double* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 define void @atanh_f32(float* nocapture %varray) {
 ; CHECK-LABEL: @atanh_f32(
 ; CHECK: __atanhf4{{.*}}<4 x float>
@@ -1520,4 +2029,27 @@
   ret void
 }
 
+define void @atanh_f32_finite(float* nocapture %varray) {
+; CHECK-LABEL: @atanh_f32_finite(
+; CHECK: __atanhf4{{.*}}<4 x float>
+; CHECK: ret void
+;
+entry:
+  br label %for.body
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %tmp = trunc i64 %iv to i32
+  %conv = sitofp i32 %tmp to float
+  %call = tail call float @__atanhf_finite(float %conv)
+  %arrayidx = getelementptr inbounds float, float* %varray, i64 %iv
+  store float %call, float* %arrayidx, align 4
+  %iv.next = add nuw nsw i64 %iv, 1
+  %exitcond = icmp eq i64 %iv.next, 1000
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
 attributes #0 = { nounwind }