Index: llvm/lib/Analysis/ValueTracking.cpp =================================================================== --- llvm/lib/Analysis/ValueTracking.cpp +++ llvm/lib/Analysis/ValueTracking.cpp @@ -2698,6 +2698,9 @@ if (isKnownNonZero(Op, Depth, Q) && isGuaranteedNotToBePoison(Op, Q.AC, Q.CxtI, Q.DT, Depth)) return true; + } else if (const auto *II = dyn_cast(V)) { + if (II->getIntrinsicID() == Intrinsic::vscale) + return true; } KnownBits Known(BitWidth); Index: llvm/test/Transforms/InstCombine/vscale_zero.ll =================================================================== --- llvm/test/Transforms/InstCombine/vscale_zero.ll +++ llvm/test/Transforms/InstCombine/vscale_zero.ll @@ -4,9 +4,7 @@ define i1 @iszero() { ; CHECK-LABEL: @iszero( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32() -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 0 -; CHECK-NEXT: ret i1 [[TMP1]] +; CHECK-NEXT: ret i1 false ; entry: %0 = call i32 @llvm.vscale.i32() @@ -17,9 +15,7 @@ define i1 @iszero_range() vscale_range(1,16) { ; CHECK-LABEL: @iszero_range( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32() -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 0 -; CHECK-NEXT: ret i1 [[TMP1]] +; CHECK-NEXT: ret i1 false ; entry: %0 = call i32 @llvm.vscale.i32()