diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -6134,6 +6134,8 @@ PowerOf2Ceil(OffsetEnd - OffsetBeg + 1), ((OffsetEnd - OffsetBeg + VecScalarsSz) / VecScalarsSz) * VecScalarsSz); + if (OffsetBeg + InsertVecSz > VecSz) + InsertVecSz = VecSz; APInt DemandedElts = APInt::getZero(NumElts); // TODO: Add support for Instruction::InsertValue. diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-vectorize.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-vectorize.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-vectorize.ll @@ -0,0 +1,21 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -slp-vectorizer -S -mtriple=aarch64 < %s | FileCheck %s + +define void @test(ptr %p) { +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P:%.*]], i64 1 +; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[INC]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[P]], align 2 +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> zeroinitializer, i16 [[TMP0]], i32 5 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[TMP1]], i32 7 +; CHECK-NEXT: ret void +; +entry: + %inc = getelementptr inbounds i16, ptr %p, i64 1 + %0 = load i16, ptr %inc, align 4 + %1 = load i16, ptr %p, align 2 + %2 = insertelement <8 x i16> zeroinitializer, i16 %0, i32 5 + %3 = insertelement <8 x i16> %2, i16 %1, i32 7 + ret void +}