diff --git a/llvm/docs/CommandGuide/llvm-objdump.rst b/llvm/docs/CommandGuide/llvm-objdump.rst --- a/llvm/docs/CommandGuide/llvm-objdump.rst +++ b/llvm/docs/CommandGuide/llvm-objdump.rst @@ -27,7 +27,11 @@ .. option:: -d, --disassemble - Disassemble all executable sections found in the input files. + Disassemble all executable sections found in the input files. On some + architectures (AArch64, x86), all known instructions are disassembled by + default. On the others, :option:`--mcpu` or :option:`--mattr` is needed to + enable some instruction sets. Disabled instructions are displayed as + ````. .. option:: -D, --disassemble-all diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/mattr.s b/llvm/test/tools/llvm-objdump/ELF/AArch64/mattr.s new file mode 100644 --- /dev/null +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/mattr.s @@ -0,0 +1,21 @@ +## When --mattr and --mcpu are both empty, disassemble all known instructions. +# RUN: llvm-mc -filetype=obj -triple=aarch64 -mattr=+all %s -o %t +# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s --check-prefixes=CHECK,ALL + +## If --mattr or --mcpu is specified, don't default to --mattr=+all. +# RUN: llvm-objdump -d --no-show-raw-insn --mattr=+v8a %t | FileCheck %s --check-prefixes=CHECK,UNKNOWN +# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=generic %t | FileCheck %s --check-prefixes=CHECK,UNKNOWN + +# CHECK: <_start>: +# ALL-NEXT: bc.eq 0x4 +# ALL-NEXT: irg x0, x1 +# ALL-NEXT: mrs x0, RNDR +# UNKNOWN-COUNT-2: +# UNKNOWN: mrs x0, S3_3_C2_C4_0 +# CHECK-EMPTY: + +.globl _start +_start: + bc.eq #4 // armv8.8-a hbc + irg x0, x1 // armv8.5-a mte + mrs x0, RNDR // armv8.5-a rand diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -1690,9 +1690,12 @@ // Package up features to be passed to target/subtarget SubtargetFeatures Features = Obj->getFeatures(); - if (!MAttrs.empty()) + if (!MAttrs.empty()) { for (unsigned I = 0; I != MAttrs.size(); ++I) Features.AddFeature(MAttrs[I]); + } else if (MCPU.empty() && Obj->getArch() == llvm::Triple::aarch64) { + Features.AddFeature("+all"); + } std::unique_ptr MRI( TheTarget->createMCRegInfo(TripleName));