diff --git a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll --- a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll +++ b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll @@ -4,6 +4,8 @@ ; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -amdgpu-atomic-optimizations=true -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX9 %s ; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -mattr=-flat-for-global -amdgpu-atomic-optimizations=true -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX10,GFX1064 %s ; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -mattr=-flat-for-global -amdgpu-atomic-optimizations=true -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX10,GFX1032 %s +; RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -mattr=-flat-for-global -amdgpu-atomic-optimizations=true -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX1164 %s +; RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -mattr=-flat-for-global -amdgpu-atomic-optimizations=true -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX1132 %s declare i32 @llvm.amdgcn.workitem.id.x() @@ -163,6 +165,65 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: add_i32_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: s_mov_b64 s[4:5], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0 +; GFX1164-NEXT: ; implicit-def: $vgpr1 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, s3, v0 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1164-NEXT: s_cbranch_execz .LBB0_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s2, s[2:3] +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_mul_i32 s2, s2, 5 +; GFX1164-NEXT: v_mov_b32_e32 v2, s2 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_add_rtn_u32 v1, v1, v2 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB0_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v1 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: v_mad_u32_u24 v0, v0, 5, s2 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: add_i32_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_mov_b32 s3, exec_lo +; GFX1132-NEXT: s_mov_b32 s2, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, s3, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1132-NEXT: s_cbranch_execz .LBB0_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s3, s3 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_mul_i32 s3, s3, 5 +; GFX1132-NEXT: v_mov_b32_e32 v2, s3 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_add_rtn_u32 v1, v1, v2 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB0_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v1 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: v_mad_u32_u24 v0, v0, 5, s2 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw add i32 addrspace(3)* @local_var32, i32 5 acq_rel store i32 %old, i32 addrspace(1)* %out @@ -333,6 +394,71 @@ ; GFX1032-NEXT: v_mad_u64_u32 v[0:1], s0, s2, v0, s[0:1] ; GFX1032-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: add_i32_uniform: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_clause 0x1 +; GFX1164-NEXT: s_load_b64 s[4:5], s[0:1], 0x24 +; GFX1164-NEXT: s_load_b32 s6, s[0:1], 0x2c +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: s_mov_b64 s[0:1], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0 +; GFX1164-NEXT: ; implicit-def: $vgpr1 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, s3, v0 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1164-NEXT: s_cbranch_execz .LBB1_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s2, s[2:3] +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: s_mul_i32 s2, s6, s2 +; GFX1164-NEXT: v_mov_b32_e32 v2, s2 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_add_rtn_u32 v1, v1, v2 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB1_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[0:1] +; GFX1164-NEXT: v_readfirstlane_b32 s0, v1 +; GFX1164-NEXT: s_mov_b32 s7, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: v_mad_u64_u32 v[1:2], s[0:1], s6, v0, s[0:1] +; GFX1164-NEXT: s_mov_b32 s6, -1 +; GFX1164-NEXT: buffer_store_b32 v1, off, s[4:7], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: add_i32_uniform: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_clause 0x1 +; GFX1132-NEXT: s_load_b64 s[4:5], s[0:1], 0x24 +; GFX1132-NEXT: s_load_b32 s0, s[0:1], 0x2c +; GFX1132-NEXT: s_mov_b32 s2, exec_lo +; GFX1132-NEXT: s_mov_b32 s1, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1132-NEXT: s_cbranch_execz .LBB1_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s2, s2 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: s_mul_i32 s2, s0, s2 +; GFX1132-NEXT: v_mov_b32_e32 v2, s2 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_add_rtn_u32 v1, v1, v2 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB1_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s1 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v1 +; GFX1132-NEXT: s_mov_b32 s7, 0x31016000 +; GFX1132-NEXT: s_mov_b32 s6, -1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: v_mad_u64_u32 v[1:2], s0, s0, v0, s[2:3] +; GFX1132-NEXT: buffer_store_b32 v1, off, s[4:7], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw add i32 addrspace(3)* @local_var32, i32 %additive acq_rel store i32 %old, i32 addrspace(1)* %out @@ -566,6 +692,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: add_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v3, 0 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB2_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_add_rtn_u32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB2_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_add_nc_u32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: add_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB2_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_add_rtn_u32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB2_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_add_nc_u32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw add i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -719,6 +954,72 @@ ; GFX1032-NEXT: buffer_gl0_inv ; GFX1032-NEXT: .LBB3_2: ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: add_i32_varying_nouse: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[0:1], -1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_add_nc_u32_e32 v1, v1, v2 +; GFX1164-NEXT: s_mov_b64 exec, s[0:1] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[0:1], -1 +; GFX1164-NEXT: v_readlane_b32 s2, v1, 0 +; GFX1164-NEXT: v_readlane_b32 s3, v1, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[0:1] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_add_i32 s0, s2, s3 +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1164-NEXT: s_cbranch_execz .LBB3_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v3, s0 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_add_u32 v0, v3 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB3_2: +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: add_i32_varying_nouse: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s0, -1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: v_add_nc_u32_e32 v1, v1, v2 +; GFX1132-NEXT: s_mov_b32 exec_lo, s0 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v3, exec_lo, 0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v1 +; GFX1132-NEXT: s_mov_b32 s0, exec_lo +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v3 +; GFX1132-NEXT: s_cbranch_execz .LBB3_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_add_u32 v3, v0 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB3_2: +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw add i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -889,6 +1190,67 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: add_i64_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_mov_b64 s[4:5], exec +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s4, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v2, s5, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1164-NEXT: s_cbranch_execz .LBB4_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s4, s[4:5] +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_mul_i32 s4, s4, 5 +; GFX1164-NEXT: v_mov_b32_e32 v0, s4 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_add_rtn_u64 v[0:1], v1, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB4_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[2:3] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1164-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1164-NEXT: v_mad_u64_u32 v[0:1], s[2:3], v2, 5, s[2:3] +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: add_i64_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_mov_b32 s3, exec_lo +; GFX1132-NEXT: s_mov_b32 s2, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v2, s3, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1132-NEXT: s_cbranch_execz .LBB4_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s3, s3 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_mul_i32 s3, s3, 5 +; GFX1132-NEXT: v_mov_b32_e32 v0, s3 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_add_rtn_u64 v[0:1], v1, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB4_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1132-NEXT: v_mad_u64_u32 v[0:1], s2, v2, 5, s[2:3] +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw add i64 addrspace(3)* @local_var64, i64 5 acq_rel store i64 %old, i64 addrspace(1)* %out @@ -1093,6 +1455,81 @@ ; GFX1032-NEXT: s_mov_b32 s2, -1 ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: add_i64_uniform: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 +; GFX1164-NEXT: s_mov_b64 s[6:7], exec +; GFX1164-NEXT: s_mov_b64 s[4:5], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v2, s7, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1164-NEXT: s_cbranch_execz .LBB5_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s6, s[6:7] +; GFX1164-NEXT: v_mov_b32_e32 v3, 0 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: s_mul_i32 s7, s3, s6 +; GFX1164-NEXT: s_mul_hi_u32 s8, s2, s6 +; GFX1164-NEXT: s_mul_i32 s6, s2, s6 +; GFX1164-NEXT: s_add_i32 s8, s8, s7 +; GFX1164-NEXT: v_mov_b32_e32 v0, s6 +; GFX1164-NEXT: v_mov_b32_e32 v1, s8 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_add_rtn_u64 v[0:1], v3, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB5_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s4, v0 +; GFX1164-NEXT: v_readfirstlane_b32 s5, v1 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: v_mad_u64_u32 v[0:1], s[4:5], s2, v2, s[4:5] +; GFX1164-NEXT: v_mad_u64_u32 v[3:4], s[2:3], s3, v2, v[1:2] +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: v_mov_b32_e32 v1, v3 +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: add_i64_uniform: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 +; GFX1132-NEXT: s_mov_b32 s5, exec_lo +; GFX1132-NEXT: s_mov_b32 s4, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v2, s5, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1132-NEXT: s_cbranch_execz .LBB5_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s5, s5 +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: s_mul_i32 s6, s3, s5 +; GFX1132-NEXT: s_mul_hi_u32 s7, s2, s5 +; GFX1132-NEXT: s_mul_i32 s5, s2, s5 +; GFX1132-NEXT: s_add_i32 s7, s7, s6 +; GFX1132-NEXT: v_mov_b32_e32 v0, s5 +; GFX1132-NEXT: v_mov_b32_e32 v1, s7 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_add_rtn_u64 v[0:1], v3, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB5_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s4 +; GFX1132-NEXT: v_readfirstlane_b32 s4, v0 +; GFX1132-NEXT: v_readfirstlane_b32 s5, v1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: v_mad_u64_u32 v[0:1], s2, s2, v2, s[4:5] +; GFX1132-NEXT: v_mad_u64_u32 v[3:4], s2, s3, v2, v[1:2] +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: v_mov_b32_e32 v1, v3 +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw add i64 addrspace(3)* @local_var64, i64 %additive acq_rel store i64 %old, i64 addrspace(1)* %out @@ -1153,6 +1590,20 @@ ; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX10-NEXT: s_endpgm +; +; GFX11-LABEL: add_i64_varying: +; GFX11: ; %bb.0: ; %entry +; GFX11-NEXT: v_mov_b32_e32 v1, 0 +; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX11-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-NEXT: s_mov_b32 s2, -1 +; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX11-NEXT: ds_add_rtn_u64 v[0:1], v1, v[0:1] +; GFX11-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-NEXT: buffer_gl0_inv +; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX11-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %zext = zext i32 %lane to i64 @@ -1317,6 +1768,67 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: sub_i32_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: s_mov_b64 s[4:5], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0 +; GFX1164-NEXT: ; implicit-def: $vgpr1 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, s3, v0 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1164-NEXT: s_cbranch_execz .LBB7_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s2, s[2:3] +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_mul_i32 s2, s2, 5 +; GFX1164-NEXT: v_mov_b32_e32 v2, s2 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_sub_rtn_u32 v1, v1, v2 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB7_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v1 +; GFX1164-NEXT: v_mul_u32_u24_e32 v0, 5, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: v_sub_nc_u32_e32 v0, s2, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: sub_i32_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_mov_b32 s3, exec_lo +; GFX1132-NEXT: s_mov_b32 s2, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, s3, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1132-NEXT: s_cbranch_execz .LBB7_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s3, s3 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_mul_i32 s3, s3, 5 +; GFX1132-NEXT: v_mov_b32_e32 v2, s3 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_sub_rtn_u32 v1, v1, v2 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB7_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v1 +; GFX1132-NEXT: v_mul_u32_u24_e32 v0, 5, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: v_sub_nc_u32_e32 v0, s2, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw sub i32 addrspace(3)* @local_var32, i32 5 acq_rel store i32 %old, i32 addrspace(1)* %out @@ -1489,6 +2001,73 @@ ; GFX1032-NEXT: v_sub_nc_u32_e32 v0, s0, v0 ; GFX1032-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: sub_i32_uniform: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_clause 0x1 +; GFX1164-NEXT: s_load_b64 s[4:5], s[0:1], 0x24 +; GFX1164-NEXT: s_load_b32 s6, s[0:1], 0x2c +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: s_mov_b64 s[0:1], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0 +; GFX1164-NEXT: ; implicit-def: $vgpr1 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, s3, v0 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1164-NEXT: s_cbranch_execz .LBB8_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s2, s[2:3] +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: s_mul_i32 s2, s6, s2 +; GFX1164-NEXT: v_mov_b32_e32 v2, s2 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_sub_rtn_u32 v1, v1, v2 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB8_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: v_mul_lo_u32 v0, s6, v0 +; GFX1164-NEXT: v_readfirstlane_b32 s0, v1 +; GFX1164-NEXT: s_mov_b32 s7, 0x31016000 +; GFX1164-NEXT: s_mov_b32 s6, -1 +; GFX1164-NEXT: v_sub_nc_u32_e32 v0, s0, v0 +; GFX1164-NEXT: buffer_store_b32 v0, off, s[4:7], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: sub_i32_uniform: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_clause 0x1 +; GFX1132-NEXT: s_load_b64 s[4:5], s[0:1], 0x24 +; GFX1132-NEXT: s_load_b32 s0, s[0:1], 0x2c +; GFX1132-NEXT: s_mov_b32 s2, exec_lo +; GFX1132-NEXT: s_mov_b32 s1, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1132-NEXT: s_cbranch_execz .LBB8_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s2, s2 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: s_mul_i32 s2, s0, s2 +; GFX1132-NEXT: v_mov_b32_e32 v2, s2 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_sub_rtn_u32 v1, v1, v2 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB8_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: v_mul_lo_u32 v0, s0, v0 +; GFX1132-NEXT: v_readfirstlane_b32 s0, v1 +; GFX1132-NEXT: s_mov_b32 s7, 0x31016000 +; GFX1132-NEXT: s_mov_b32 s6, -1 +; GFX1132-NEXT: v_sub_nc_u32_e32 v0, s0, v0 +; GFX1132-NEXT: buffer_store_b32 v0, off, s[4:7], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw sub i32 addrspace(3)* @local_var32, i32 %subitive acq_rel store i32 %old, i32 addrspace(1)* %out @@ -1722,6 +2301,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: sub_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v3, 0 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB9_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_sub_rtn_u32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB9_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_sub_nc_u32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: sub_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB9_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_sub_rtn_u32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB9_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_sub_nc_u32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw sub i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -1875,6 +2563,72 @@ ; GFX1032-NEXT: buffer_gl0_inv ; GFX1032-NEXT: .LBB10_2: ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: sub_i32_varying_nouse: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[0:1], -1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_add_nc_u32_e32 v1, v1, v2 +; GFX1164-NEXT: s_mov_b64 exec, s[0:1] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[0:1], -1 +; GFX1164-NEXT: v_readlane_b32 s2, v1, 0 +; GFX1164-NEXT: v_readlane_b32 s3, v1, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[0:1] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_add_i32 s0, s2, s3 +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX1164-NEXT: s_cbranch_execz .LBB10_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v3, s0 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_sub_u32 v0, v3 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB10_2: +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: sub_i32_varying_nouse: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s0, -1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_add_nc_u32_dpp v1, v1, v1 row_xmask:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: v_add_nc_u32_e32 v1, v1, v2 +; GFX1132-NEXT: s_mov_b32 exec_lo, s0 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v3, exec_lo, 0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v1 +; GFX1132-NEXT: s_mov_b32 s0, exec_lo +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v3 +; GFX1132-NEXT: s_cbranch_execz .LBB10_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_sub_u32 v3, v0 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB10_2: +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw sub i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -2053,6 +2807,73 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: sub_i64_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_mov_b64 s[4:5], exec +; GFX1164-NEXT: s_mov_b64 s[2:3], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s4, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v2, s5, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1164-NEXT: s_cbranch_execz .LBB11_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s4, s[4:5] +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_mul_i32 s4, s4, 5 +; GFX1164-NEXT: v_mov_b32_e32 v0, s4 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_sub_rtn_u64 v[0:1], v1, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB11_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[2:3] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1164-NEXT: v_mul_u32_u24_e32 v0, 5, v2 +; GFX1164-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1164-NEXT: v_mul_hi_u32_u24_e32 v1, 5, v2 +; GFX1164-NEXT: v_sub_co_u32 v0, vcc, s2, v0 +; GFX1164-NEXT: v_sub_co_ci_u32_e32 v1, vcc, s3, v1, vcc +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: sub_i64_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_mov_b32 s3, exec_lo +; GFX1132-NEXT: s_mov_b32 s2, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v2, s3, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1132-NEXT: s_cbranch_execz .LBB11_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s3, s3 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_mul_i32 s3, s3, 5 +; GFX1132-NEXT: v_mov_b32_e32 v0, s3 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_sub_rtn_u64 v[0:1], v1, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB11_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1132-NEXT: v_mul_u32_u24_e32 v0, 5, v2 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1132-NEXT: v_mul_hi_u32_u24_e32 v1, 5, v2 +; GFX1132-NEXT: v_sub_co_u32 v0, vcc_lo, s2, v0 +; GFX1132-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw sub i64 addrspace(3)* @local_var64, i64 5 acq_rel store i64 %old, i64 addrspace(1)* %out @@ -2266,6 +3087,85 @@ ; GFX1032-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, s4, v1, vcc_lo ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: sub_i64_uniform: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 +; GFX1164-NEXT: s_mov_b64 s[6:7], exec +; GFX1164-NEXT: s_mov_b64 s[4:5], exec +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, s6, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v2, s7, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1164-NEXT: s_cbranch_execz .LBB12_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: s_bcnt1_i32_b64 s6, s[6:7] +; GFX1164-NEXT: v_mov_b32_e32 v3, 0 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: s_mul_i32 s7, s3, s6 +; GFX1164-NEXT: s_mul_hi_u32 s8, s2, s6 +; GFX1164-NEXT: s_mul_i32 s6, s2, s6 +; GFX1164-NEXT: s_add_i32 s8, s8, s7 +; GFX1164-NEXT: v_mov_b32_e32 v0, s6 +; GFX1164-NEXT: v_mov_b32_e32 v1, s8 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_sub_rtn_u64 v[0:1], v3, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB12_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: v_mad_u64_u32 v[3:4], s[4:5], s2, v2, 0 +; GFX1164-NEXT: v_readfirstlane_b32 s4, v1 +; GFX1164-NEXT: v_mad_u64_u32 v[5:6], s[2:3], s3, v2, v[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: v_sub_co_u32 v0, vcc, s2, v3 +; GFX1164-NEXT: v_mov_b32_e32 v1, v5 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: v_sub_co_ci_u32_e32 v1, vcc, s4, v1, vcc +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: sub_i64_uniform: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 +; GFX1132-NEXT: s_mov_b32 s5, exec_lo +; GFX1132-NEXT: s_mov_b32 s4, exec_lo +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v2, s5, 0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: v_cmpx_eq_u32_e32 0, v2 +; GFX1132-NEXT: s_cbranch_execz .LBB12_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: s_bcnt1_i32_b32 s5, s5 +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: s_mul_i32 s6, s3, s5 +; GFX1132-NEXT: s_mul_hi_u32 s7, s2, s5 +; GFX1132-NEXT: s_mul_i32 s5, s2, s5 +; GFX1132-NEXT: s_add_i32 s7, s7, s6 +; GFX1132-NEXT: v_mov_b32_e32 v0, s5 +; GFX1132-NEXT: v_mov_b32_e32 v1, s7 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_sub_rtn_u64 v[0:1], v3, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB12_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: v_mad_u64_u32 v[3:4], s2, s2, v2, 0 +; GFX1132-NEXT: v_readfirstlane_b32 s4, v1 +; GFX1132-NEXT: v_mad_u64_u32 v[5:6], s2, s3, v2, v[4:5] +; GFX1132-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: v_sub_co_u32 v0, vcc_lo, s2, v3 +; GFX1132-NEXT: v_mov_b32_e32 v1, v5 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, s4, v1, vcc_lo +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw sub i64 addrspace(3)* @local_var64, i64 %subitive acq_rel store i64 %old, i64 addrspace(1)* %out @@ -2326,6 +3226,20 @@ ; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX10-NEXT: s_endpgm +; +; GFX11-LABEL: sub_i64_varying: +; GFX11: ; %bb.0: ; %entry +; GFX11-NEXT: v_mov_b32_e32 v1, 0 +; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX11-NEXT: s_mov_b32 s3, 0x31016000 +; GFX11-NEXT: s_mov_b32 s2, -1 +; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX11-NEXT: ds_sub_rtn_u64 v[0:1], v1, v[0:1] +; GFX11-NEXT: s_waitcnt lgkmcnt(0) +; GFX11-NEXT: buffer_gl0_inv +; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX11-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %zext = zext i32 %lane to i64 @@ -2561,6 +3475,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: and_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, -1 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_mov_b32_e32 v3, -1 +; GFX1164-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_and_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_and_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB14_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_and_rtn_b32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB14_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_and_b32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: and_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, -1 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_and_b32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_and_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v3, -1 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB14_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_and_rtn_b32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB14_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_and_b32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw and i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -2795,6 +3818,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: or_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v3, 0 +; GFX1164-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_or_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_or_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB15_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_or_rtn_b32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB15_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_or_b32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: or_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_or_b32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_or_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB15_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_or_rtn_b32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB15_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_or_b32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw or i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -3029,6 +4161,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: xor_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v3, 0 +; GFX1164-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_xor_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_xor_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB16_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_xor_rtn_b32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB16_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_xor_b32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: xor_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_xor_b32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_xor_b32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB16_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_xor_rtn_b32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB16_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_xor_b32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw xor i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -3263,6 +4504,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: max_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_bfrev_b32_e32 v1, 1 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_bfrev_b32_e32 v3, 1 +; GFX1164-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_max_i32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_max_i32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB17_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_max_rtn_i32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB17_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_max_i32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: max_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_bfrev_b32_e32 v1, 1 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_max_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_max_i32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_bfrev_b32_e32 v3, 1 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB17_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_max_rtn_i32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB17_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_max_i32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw max i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -3443,6 +4793,71 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: max_i64_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: s_and_saveexec_b64 s[2:3], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB18_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 5 +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: v_mov_b32_e32 v2, 0 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_max_rtn_i64 v[0:1], v2, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB18_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[2:3] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1164-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1164-NEXT: v_cndmask_b32_e64 v1, 0, 0x80000000, vcc +; GFX1164-NEXT: v_cndmask_b32_e64 v0, 5, 0, vcc +; GFX1164-NEXT: v_cmp_gt_i64_e32 vcc, s[2:3], v[0:1] +; GFX1164-NEXT: v_cndmask_b32_e64 v1, v1, s3, vcc +; GFX1164-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: max_i64_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: s_and_saveexec_b32 s2, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB18_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 5 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: v_mov_b32_e32 v2, 0 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_max_rtn_i64 v[0:1], v2, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB18_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1132-NEXT: v_cndmask_b32_e64 v1, 0, 0x80000000, vcc_lo +; GFX1132-NEXT: v_cndmask_b32_e64 v0, 5, 0, vcc_lo +; GFX1132-NEXT: v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[0:1] +; GFX1132-NEXT: v_cndmask_b32_e64 v1, v1, s3, vcc_lo +; GFX1132-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc_lo +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw max i64 addrspace(3)* @local_var64, i64 5 acq_rel store i64 %old, i64 addrspace(1)* %out @@ -3676,6 +5091,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: min_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_bfrev_b32_e32 v1, -2 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_bfrev_b32_e32 v3, -2 +; GFX1164-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_min_i32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_min_i32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB19_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_min_rtn_i32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB19_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_min_i32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: min_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_bfrev_b32_e32 v1, -2 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_min_i32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_min_i32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_bfrev_b32_e32 v3, -2 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB19_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_min_rtn_i32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB19_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_min_i32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw min i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -3856,6 +5380,71 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: min_i64_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: s_and_saveexec_b64 s[2:3], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB20_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 5 +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: v_mov_b32_e32 v2, 0 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_min_rtn_i64 v[0:1], v2, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB20_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[2:3] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1164-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1164-NEXT: v_cndmask_b32_e64 v1, 0, 0x7fffffff, vcc +; GFX1164-NEXT: v_cndmask_b32_e64 v0, 5, -1, vcc +; GFX1164-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1] +; GFX1164-NEXT: v_cndmask_b32_e64 v1, v1, s3, vcc +; GFX1164-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: min_i64_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: s_and_saveexec_b32 s2, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB20_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 5 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: v_mov_b32_e32 v2, 0 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_min_rtn_i64 v[0:1], v2, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB20_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1132-NEXT: v_cndmask_b32_e64 v1, 0, 0x7fffffff, vcc_lo +; GFX1132-NEXT: v_cndmask_b32_e64 v0, 5, -1, vcc_lo +; GFX1132-NEXT: v_cmp_lt_i64_e32 vcc_lo, s[2:3], v[0:1] +; GFX1132-NEXT: v_cndmask_b32_e64 v1, v1, s3, vcc_lo +; GFX1132-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc_lo +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw min i64 addrspace(3)* @local_var64, i64 5 acq_rel store i64 %old, i64 addrspace(1)* %out @@ -4089,6 +5678,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: umax_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v3, 0 +; GFX1164-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_max_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_max_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB21_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_max_rtn_u32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB21_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_max_u32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: umax_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_max_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_max_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v3, 0 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB21_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_max_rtn_u32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB21_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_max_u32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw umax i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -4266,6 +5964,71 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: umax_i64_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: s_and_saveexec_b64 s[2:3], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB22_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 5 +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: v_mov_b32_e32 v2, 0 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_max_rtn_u64 v[0:1], v2, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB22_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[2:3] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1164-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: v_cndmask_b32_e64 v0, 5, 0, vcc +; GFX1164-NEXT: v_cmp_gt_u64_e32 vcc, s[2:3], v[0:1] +; GFX1164-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc +; GFX1164-NEXT: v_cndmask_b32_e64 v1, 0, s3, vcc +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: umax_i64_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: s_and_saveexec_b32 s2, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB22_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 5 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: v_mov_b32_e32 v2, 0 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_max_rtn_u64 v[0:1], v2, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB22_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: v_cndmask_b32_e64 v0, 5, 0, vcc_lo +; GFX1132-NEXT: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[0:1] +; GFX1132-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc_lo +; GFX1132-NEXT: v_cndmask_b32_e64 v1, 0, s3, vcc_lo +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw umax i64 addrspace(3)* @local_var64, i64 5 acq_rel store i64 %old, i64 addrspace(1)* %out @@ -4499,6 +6262,115 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: umin_i32_varying: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: v_mov_b32_e32 v1, v0 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: v_mov_b32_e32 v1, -1 +; GFX1164-NEXT: s_not_b64 exec, exec +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_mov_b32_e32 v3, -1 +; GFX1164-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: v_mov_b32_e32 v2, v1 +; GFX1164-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1164-NEXT: v_min_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1164-NEXT: v_mov_b32_e32 v2, s4 +; GFX1164-NEXT: v_min_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xc bank_mask:0xf +; GFX1164-NEXT: v_readlane_b32 s4, v1, 15 +; GFX1164-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s5, v1, 31 +; GFX1164-NEXT: v_writelane_b32 v3, s4, 16 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: s_or_saveexec_b64 s[2:3], -1 +; GFX1164-NEXT: v_readlane_b32 s7, v1, 63 +; GFX1164-NEXT: v_readlane_b32 s6, v1, 47 +; GFX1164-NEXT: v_writelane_b32 v3, s5, 32 +; GFX1164-NEXT: s_mov_b64 exec, s[2:3] +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: s_or_saveexec_b64 s[4:5], -1 +; GFX1164-NEXT: v_writelane_b32 v3, s6, 48 +; GFX1164-NEXT: s_mov_b64 exec, s[4:5] +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: ; implicit-def: $vgpr0 +; GFX1164-NEXT: s_and_saveexec_b64 s[4:5], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB23_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 0 +; GFX1164-NEXT: v_mov_b32_e32 v4, s7 +; GFX1164-NEXT: s_mov_b32 s3, s7 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_min_rtn_u32 v0, v0, v4 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB23_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[4:5] +; GFX1164-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1164-NEXT: v_mov_b32_e32 v0, v3 +; GFX1164-NEXT: v_min_u32_e32 v0, s3, v0 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: umin_i32_varying: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: v_mov_b32_e32 v1, v0 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: v_mov_b32_e32 v1, -1 +; GFX1132-NEXT: s_not_b32 exec_lo, exec_lo +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:2 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:4 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_min_u32_dpp v1, v1, v1 row_shr:8 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v2, v1 +; GFX1132-NEXT: v_permlanex16_b32 v2, v2, -1, -1 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_min_u32_dpp v1, v2, v1 quad_perm:[0,1,2,3] row_mask:0xa bank_mask:0xf +; GFX1132-NEXT: v_mov_b32_e32 v3, -1 +; GFX1132-NEXT: v_readlane_b32 s3, v1, 15 +; GFX1132-NEXT: v_readlane_b32 s4, v1, 31 +; GFX1132-NEXT: v_mov_b32_dpp v3, v1 row_shr:1 row_mask:0xf bank_mask:0xf +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: s_or_saveexec_b32 s2, -1 +; GFX1132-NEXT: v_writelane_b32 v3, s3, 16 +; GFX1132-NEXT: s_mov_b32 exec_lo, s2 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: ; implicit-def: $vgpr0 +; GFX1132-NEXT: s_and_saveexec_b32 s3, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB23_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 0 +; GFX1132-NEXT: v_mov_b32_e32 v4, s4 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_min_rtn_u32 v0, v0, v4 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB23_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s3 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v0 +; GFX1132-NEXT: v_mov_b32_e32 v0, v3 +; GFX1132-NEXT: v_min_u32_e32 v0, s3, v0 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b32 v0, off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %lane = call i32 @llvm.amdgcn.workitem.id.x() %old = atomicrmw umin i32 addrspace(3)* @local_var32, i32 %lane acq_rel @@ -4676,6 +6548,71 @@ ; GFX1032-NEXT: s_waitcnt lgkmcnt(0) ; GFX1032-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX1032-NEXT: s_endpgm +; +; GFX1164-LABEL: umin_i64_constant: +; GFX1164: ; %bb.0: ; %entry +; GFX1164-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1164-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1164-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 +; GFX1164-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 +; GFX1164-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1164-NEXT: s_and_saveexec_b64 s[2:3], vcc +; GFX1164-NEXT: s_cbranch_execz .LBB24_2 +; GFX1164-NEXT: ; %bb.1: +; GFX1164-NEXT: v_mov_b32_e32 v0, 5 +; GFX1164-NEXT: v_mov_b32_e32 v1, 0 +; GFX1164-NEXT: v_mov_b32_e32 v2, 0 +; GFX1164-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1164-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1164-NEXT: ds_min_rtn_u64 v[0:1], v2, v[0:1] +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_gl0_inv +; GFX1164-NEXT: .LBB24_2: +; GFX1164-NEXT: s_or_b64 exec, exec, s[2:3] +; GFX1164-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1164-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1164-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc +; GFX1164-NEXT: v_cndmask_b32_e64 v0, 5, -1, vcc +; GFX1164-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] +; GFX1164-NEXT: v_cndmask_b32_e64 v1, v1, s3, vcc +; GFX1164-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc +; GFX1164-NEXT: s_mov_b32 s2, -1 +; GFX1164-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1164-NEXT: s_waitcnt lgkmcnt(0) +; GFX1164-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1164-NEXT: s_endpgm +; +; GFX1132-LABEL: umin_i64_constant: +; GFX1132: ; %bb.0: ; %entry +; GFX1132-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 +; GFX1132-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 +; GFX1132-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 +; GFX1132-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1132-NEXT: s_and_saveexec_b32 s2, vcc_lo +; GFX1132-NEXT: s_cbranch_execz .LBB24_2 +; GFX1132-NEXT: ; %bb.1: +; GFX1132-NEXT: v_mov_b32_e32 v0, 5 +; GFX1132-NEXT: v_mov_b32_e32 v1, 0 +; GFX1132-NEXT: v_mov_b32_e32 v2, 0 +; GFX1132-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GFX1132-NEXT: s_waitcnt_vscnt null, 0x0 +; GFX1132-NEXT: ds_min_rtn_u64 v[0:1], v2, v[0:1] +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_gl0_inv +; GFX1132-NEXT: .LBB24_2: +; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s2 +; GFX1132-NEXT: v_readfirstlane_b32 s2, v0 +; GFX1132-NEXT: v_readfirstlane_b32 s3, v1 +; GFX1132-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo +; GFX1132-NEXT: v_cndmask_b32_e64 v0, 5, -1, vcc_lo +; GFX1132-NEXT: v_cmp_lt_u64_e32 vcc_lo, s[2:3], v[0:1] +; GFX1132-NEXT: v_cndmask_b32_e64 v1, v1, s3, vcc_lo +; GFX1132-NEXT: v_cndmask_b32_e64 v0, v0, s2, vcc_lo +; GFX1132-NEXT: s_mov_b32 s2, -1 +; GFX1132-NEXT: s_mov_b32 s3, 0x31016000 +; GFX1132-NEXT: s_waitcnt lgkmcnt(0) +; GFX1132-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0 +; GFX1132-NEXT: s_endpgm entry: %old = atomicrmw umin i64 addrspace(3)* @local_var64, i64 5 acq_rel store i64 %old, i64 addrspace(1)* %out