diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv32.ll
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv32.ll
@@ -14,6 +14,18 @@
   ret <2 x i8> %v
 }
 
+declare <3 x i8> @llvm.experimental.stepvector.v3i8()
+
+define <3 x i8> @stepvector_v3i8() {
+; CHECK-LABEL: stepvector_v3i8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
+; CHECK-NEXT:    vid.v v8
+; CHECK-NEXT:    ret
+  %v = call <3 x i8> @llvm.experimental.stepvector.v3i8()
+  ret <3 x i8> %v
+}
+
 declare <4 x i8> @llvm.experimental.stepvector.v4i8()
 
 define <4 x i8> @stepvector_v4i8() {
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll
@@ -14,6 +14,18 @@
   ret <2 x i8> %v
 }
 
+declare <3 x i8> @llvm.experimental.stepvector.v3i8()
+
+define <3 x i8> @stepvector_v3i8() {
+; CHECK-LABEL: stepvector_v3i8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
+; CHECK-NEXT:    vid.v v8
+; CHECK-NEXT:    ret
+  %v = call <3 x i8> @llvm.experimental.stepvector.v3i8()
+  ret <3 x i8> %v
+}
+
 declare <4 x i8> @llvm.experimental.stepvector.v4i8()
 
 define <4 x i8> @stepvector_v4i8() {
diff --git a/llvm/test/CodeGen/RISCV/rvv/stepvector.ll b/llvm/test/CodeGen/RISCV/rvv/stepvector.ll
--- a/llvm/test/CodeGen/RISCV/rvv/stepvector.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/stepvector.ll
@@ -26,6 +26,18 @@
   ret <vscale x 2 x i8> %v
 }
 
+declare <vscale x 3 x i8> @llvm.experimental.stepvector.nxv3i8()
+
+define <vscale x 3 x i8> @stepvector_nxv3i8() {
+; CHECK-LABEL: stepvector_nxv3i8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
+; CHECK-NEXT:    vid.v v8
+; CHECK-NEXT:    ret
+  %v = call <vscale x 3 x i8> @llvm.experimental.stepvector.nxv3i8()
+  ret <vscale x 3 x i8> %v
+}
+
 declare <vscale x 4 x i8> @llvm.experimental.stepvector.nxv4i8()
 
 define <vscale x 4 x i8> @stepvector_nxv4i8() {
@@ -155,6 +167,18 @@
   ret <vscale x 2 x i16> %v
 }
 
+declare <vscale x 3 x i16> @llvm.experimental.stepvector.nxv3i16()
+
+define <vscale x 3 x i16> @stepvector_nxv3i16() {
+; CHECK-LABEL: stepvector_nxv3i16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
+; CHECK-NEXT:    vid.v v8
+; CHECK-NEXT:    ret
+  %v = call <vscale x 3 x i16> @llvm.experimental.stepvector.nxv3i16()
+  ret <vscale x 3 x i16> %v
+}
+
 declare <vscale x 4 x i16> @llvm.experimental.stepvector.nxv4i16()
 
 define <vscale x 4 x i16> @stepvector_nxv4i16() {
@@ -272,6 +296,18 @@
   ret <vscale x 2 x i32> %v
 }
 
+declare <vscale x 3 x i32> @llvm.experimental.stepvector.nxv3i32()
+
+define <vscale x 3 x i32> @stepvector_nxv3i32() {
+; CHECK-LABEL: stepvector_nxv3i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
+; CHECK-NEXT:    vid.v v8
+; CHECK-NEXT:    ret
+  %v = call <vscale x 3 x i32> @llvm.experimental.stepvector.nxv3i32()
+  ret <vscale x 3 x i32> %v
+}
+
 declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
 
 define <vscale x 4 x i32> @stepvector_nxv4i32() {
@@ -377,6 +413,18 @@
   ret <vscale x 2 x i64> %v
 }
 
+declare <vscale x 3 x i64> @llvm.experimental.stepvector.nxv3i64()
+
+define <vscale x 3 x i64> @stepvector_nxv3i64() {
+; CHECK-LABEL: stepvector_nxv3i64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
+; CHECK-NEXT:    vid.v v8
+; CHECK-NEXT:    ret
+  %v = call <vscale x 3 x i64> @llvm.experimental.stepvector.nxv3i64()
+  ret <vscale x 3 x i64> %v
+}
+
 declare <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
 
 define <vscale x 4 x i64> @stepvector_nxv4i64() {