Index: llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir =================================================================== --- /dev/null +++ llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir @@ -0,0 +1,27 @@ +# REQUIRES: amdgpu-registered-target +# RUN: llvm-reduce -simplify-mir --delta-passes=instructions -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log +# RUN: FileCheck --check-prefix=RESULT %s < %t + +# CHECK-INTERESTINGNESS: V_MOV_B32_e32 $vgpr0 +# CHECK-INTERESTINGNESS: S_NOP 0 + +# The liveins list on the block was not carried through. + +# RESULT: bb.0: +# RESULT-NEXT: %0:vgpr_32 = V_MOV_B32_e32 $vgpr0, implicit $exec +# RESULT-NEXT: S_NOP 0 +# RESULT-NEXT: S_ENDPGM 0, implicit %0, implicit %0 + +--- +name: func +tracksRegLiveness: false +body: | + bb.0: + liveins: $vgpr0, $vgpr1_vgpr2 + S_WAITCNT 0 + %0:vgpr_32 = V_MOV_B32_e32 $vgpr0, implicit $exec + %1:vgpr_32 = V_MOV_B32_e32 $vgpr1, implicit $exec + S_NOP 0 + S_ENDPGM 0, implicit %0, implicit %1 +... + Index: llvm/tools/llvm-reduce/ReducerWorkItem.cpp =================================================================== --- llvm/tools/llvm-reduce/ReducerWorkItem.cpp +++ llvm/tools/llvm-reduce/ReducerWorkItem.cpp @@ -190,6 +190,9 @@ SrcMF->getFunctionNumber(), DestMMI); DenseMap Src2DstMBB; + const bool TracksRegLiveness = + SrcMF->getProperties().hasProperty(MachineFunctionProperties::Property::TracksLiveness); + auto *SrcMRI = &SrcMF->getRegInfo(); auto *DstMRI = &DstMF->getRegInfo(); @@ -270,8 +273,11 @@ auto *DstSuccMBB = Src2DstMBB[SrcSuccMBB]; DstMBB->addSuccessor(DstSuccMBB, SrcMBB.getSuccProbability(It)); } - for (auto &LI : SrcMBB.liveins()) - DstMBB->addLiveIn(LI); + + if (TracksRegLiveness) { + for (auto &LI : SrcMBB.liveins()) + DstMBB->addLiveIn(LI); + } // Make sure MRI knows about registers clobbered by unwinder. if (DstMBB->isEHPad()) {