Index: llvm/test/tools/llvm-reduce/mir/reduce-instruction-unreachable-block.mir =================================================================== --- /dev/null +++ llvm/test/tools/llvm-reduce/mir/reduce-instruction-unreachable-block.mir @@ -0,0 +1,43 @@ +# REQUIRES: amdgpu-registered-target +# RUN: llvm-reduce -simplify-mir -mtriple=amdgcn-amd-amdhsa --delta-passes=instructions --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log +# RUN: FileCheck --check-prefix=RESULT %s < %t + +# Make sure there's no crash with unreachable blocks. + +# CHECK-INTERESTINGNESS: S_NOP + +# RESULT: bb.0: + +# RESULT: %3:vgpr_32 = IMPLICIT_DEF +# RESULT-NEXT: %4:sreg_64 = IMPLICIT_DEF +# RESULT-NEXT: %5:vreg_64 = IMPLICIT_DEF +# RESULT-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc +# RESULT-NEXT: S_BRANCH %bb.3 + +# RESULT: bb.1: +# RESULT-NEXT: S_BRANCH %bb.3 + +# RESULT: bb.2: +# RESULT-NEXT: S_NOP 0, implicit %3, implicit killed %5, implicit %4 + +--- +name: unreachable_block +tracksRegLiveness: true +body: | + bb.0: + %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec + S_CBRANCH_SCC1 %bb.1, implicit undef $scc + S_BRANCH %bb.3 + + bb.1: + %1:sreg_64 = S_MOV_B64 0 + S_BRANCH %bb.3 + + bb.2: + %2:vreg_64 = IMPLICIT_DEF + S_NOP 0, implicit %0, implicit killed %2, implicit %1 + S_BRANCH %bb.3 + + bb.3: + +... Index: llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp =================================================================== --- llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp +++ llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp @@ -105,14 +105,17 @@ MachineBasicBlock::reverse_iterator RI(*MI); MachineBasicBlock *BB = MI->getParent(); ++RI; - while (NewReg == 0 && BB) { - NewReg = getPrevDefOfRCInMBB(*BB, RI, RegRC, RegTy, ToDelete); - // Prepare for idom(BB). - if (auto *IDM = MDT.getNode(BB)->getIDom()) { - BB = IDM->getBlock(); - RI = BB->rbegin(); - } else { - BB = nullptr; + + if (MDT.isReachableFromEntry(BB)) { + while (NewReg == 0 && BB) { + NewReg = getPrevDefOfRCInMBB(*BB, RI, RegRC, RegTy, ToDelete); + // Prepare for idom(BB). + if (auto *IDM = MDT.getNode(BB)->getIDom()) { + BB = IDM->getBlock(); + RI = BB->rbegin(); + } else { + BB = nullptr; + } } } }