Index: lib/Target/ARM/ARM.td =================================================================== --- lib/Target/ARM/ARM.td +++ lib/Target/ARM/ARM.td @@ -432,6 +432,13 @@ // FIXME: R5 has currently the same ProcessorModel as A8. def : ProcessorModel<"cortex-r5", CortexA8Model, [ProcR5, HasV7Ops, FeatureDB, + FeatureDSPThumb2, + FeatureHasRAS, + FeatureRClass]>; + +// FIXME: R5F has currently the same ProcessorModel as A8. +def : ProcessorModel<"cortex-r5f", CortexA8Model, + [ProcR5, HasV7Ops, FeatureDB, FeatureVFP3, FeatureDSPThumb2, FeatureHasRAS, FeatureD16, FeatureRClass]>; @@ -455,16 +462,22 @@ def : ProcNoItin<"cortex-m4", [HasV7Ops, FeatureThumb2, FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2, + FeatureT2XtPk, + FeatureMClass]>; + +def : ProcNoItin<"cortex-m4f", [HasV7Ops, + FeatureThumb2, FeatureNoARM, FeatureDB, + FeatureHWDiv, FeatureDSPThumb2, FeatureT2XtPk, FeatureVFP4, FeatureVFPOnlySP, FeatureD16, FeatureMClass]>; + def : ProcNoItin<"cortex-m7", [HasV7Ops, FeatureThumb2, FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2, FeatureT2XtPk, FeatureFPARMv8, FeatureD16, FeatureMClass]>; - // Swift uArch Processors. def : ProcessorModel<"swift", SwiftModel, [ProcSwift, HasV7Ops, FeatureNEON, Index: test/CodeGen/ARM/aapcs-hfa-code.ll =================================================================== --- test/CodeGen/ARM/aapcs-hfa-code.ll +++ test/CodeGen/ARM/aapcs-hfa-code.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=armv7-linux-gnueabihf -o - | FileCheck %s -; RUN: llc < %s -mtriple=thumbv7em-none-eabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CHECK-M4F +; RUN: llc < %s -mtriple=thumbv7em-none-eabi -mcpu=cortex-m4f | FileCheck %s --check-prefix=CHECK-M4F target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64" Index: test/CodeGen/ARM/build-attributes.ll =================================================================== --- test/CodeGen/ARM/build-attributes.ll +++ test/CodeGen/ARM/build-attributes.ll @@ -77,11 +77,12 @@ ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING -; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT -; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST -; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD -; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST -; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CORTEX-M4 +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4f -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4F-SOFT +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4f -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4F-SOFT-FAST +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4f -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4F-HARD +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4f -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4F-HARD-FAST +; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4f -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE @@ -91,6 +92,7 @@ ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 +; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5f | FileCheck %s --check-prefix=CORTEX-R5F ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 @@ -916,65 +918,87 @@ ; SC300-FAST-NOT: .eabi_attribute 22 ; SC300-FAST: .eabi_attribute 23, 1 -; CORTEX-M4-SOFT: .cpu cortex-m4 -; CORTEX-M4-SOFT: .eabi_attribute 6, 13 -; CORTEX-M4-SOFT: .eabi_attribute 7, 77 -; CORTEX-M4-SOFT: .eabi_attribute 8, 0 -; CORTEX-M4-SOFT: .eabi_attribute 9, 2 -; CORTEX-M4-SOFT: .fpu fpv4-sp-d16 -; CORTEX-M4-SOFT-NOT: .eabi_attribute 19 +; CORTEX-M4: .cpu cortex-m4 +; CORTEX-M4: .eabi_attribute 6, 13 +; CORTEX-M4: .eabi_attribute 7, 77 +; CORTEX-M4: .eabi_attribute 8, 0 +; CORTEX-M4: .eabi_attribute 9, 2 +; CORTEX-M4-NOT: .fpu fpv4-sp-d16 +; CORTEX-M4-NOT: .eabi_attribute 19 ;; We default to IEEE 754 compliance -; CORTEX-M4-SOFT: .eabi_attribute 20, 1 -; CORTEX-M4-SOFT: .eabi_attribute 21, 1 -; CORTEX-M4-SOFT-NOT: .eabi_attribute 22 -; CORTEX-M4-SOFT: .eabi_attribute 23, 3 -; CORTEX-M4-SOFT: .eabi_attribute 24, 1 -; CORTEX-M4-SOFT: .eabi_attribute 25, 1 -; CORTEX-M4-SOFT: .eabi_attribute 27, 1 -; CORTEX-M4-SOFT-NOT: .eabi_attribute 28 -; CORTEX-M4-SOFT: .eabi_attribute 36, 1 -; CORTEX-M4-SOFT: .eabi_attribute 38, 1 -; CORTEX-M4-SOFT-NOT: .eabi_attribute 42 -; CORTEX-M4-SOFT-NOT: .eabi_attribute 44 -; CORTEX-M4-SOFT-NOT: .eabi_attribute 68 - -; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19 -;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when +; CORTEX-M4: .eabi_attribute 20, 1 +; CORTEX-M4: .eabi_attribute 21, 1 +; CORTEX-M4-NOT: .eabi_attribute 22 +; CORTEX-M4: .eabi_attribute 23, 3 +; CORTEX-M4: .eabi_attribute 24, 1 +; CORTEX-M4: .eabi_attribute 25, 1 +; CORTEX-M4-NOT: .eabi_attribute 27 +; CORTEX-M4-NOT: .eabi_attribute 28 +; CORTEX-M4-NOT: .eabi_attribute 36 +; CORTEX-M4: .eabi_attribute 38, 1 +; CORTEX-M4-NOT: .eabi_attribute 42 +; CORTEX-M4-NOT: .eabi_attribute 44 +; CORTEX-M4-NOT: .eabi_attribute 68 + +; CORTEX-M4F-SOFT: .cpu cortex-m4f +; CORTEX-M4F-SOFT: .eabi_attribute 6, 13 +; CORTEX-M4F-SOFT: .eabi_attribute 7, 77 +; CORTEX-M4F-SOFT: .eabi_attribute 8, 0 +; CORTEX-M4F-SOFT: .eabi_attribute 9, 2 +; CORTEX-M4F-SOFT: .fpu fpv4-sp-d16 +; CORTEX-M4F-SOFT-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-M4F-SOFT: .eabi_attribute 20, 1 +; CORTEX-M4F-SOFT: .eabi_attribute 21, 1 +; CORTEX-M4F-SOFT-NOT: .eabi_attribute 22 +; CORTEX-M4F-SOFT: .eabi_attribute 23, 3 +; CORTEX-M4F-SOFT: .eabi_attribute 24, 1 +; CORTEX-M4F-SOFT: .eabi_attribute 25, 1 +; CORTEX-M4F-SOFT: .eabi_attribute 27, 1 +; CORTEX-M4F-SOFT-NOT: .eabi_attribute 28 +; CORTEX-M4F-SOFT: .eabi_attribute 36, 1 +; CORTEX-M4F-SOFT: .eabi_attribute 38, 1 +; CORTEX-M4F-SOFT-NOT: .eabi_attribute 42 +; CORTEX-M4F-SOFT-NOT: .eabi_attribute 44 +; CORTEX-M4F-SOFT-NOT: .eabi_attribute 68 + +; CORTEX-M4F-SOFT-FAST-NOT: .eabi_attribute 19 +;; The M4F defaults to a VFPv4 FPU, so it flushes preseving sign when ;; -ffast-math is specified. -; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2 -; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21 -; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22 -; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1 - -; CORTEX-M4-HARD: .cpu cortex-m4 -; CORTEX-M4-HARD: .eabi_attribute 6, 13 -; CORTEX-M4-HARD: .eabi_attribute 7, 77 -; CORTEX-M4-HARD: .eabi_attribute 8, 0 -; CORTEX-M4-HARD: .eabi_attribute 9, 2 -; CORTEX-M4-HARD: .fpu fpv4-sp-d16 -; CORTEX-M4-HARD-NOT: .eabi_attribute 19 +; CORTEX-M4F-SOFT-FAST: .eabi_attribute 20, 2 +; CORTEX-M4F-SOFT-FAST-NOT: .eabi_attribute 21 +; CORTEX-M4F-SOFT-FAST-NOT: .eabi_attribute 22 +; CORTEX-M4F-SOFT-FAST: .eabi_attribute 23, 1 + +; CORTEX-M4F-HARD: .cpu cortex-m4f +; CORTEX-M4F-HARD: .eabi_attribute 6, 13 +; CORTEX-M4F-HARD: .eabi_attribute 7, 77 +; CORTEX-M4F-HARD: .eabi_attribute 8, 0 +; CORTEX-M4F-HARD: .eabi_attribute 9, 2 +; CORTEX-M4F-HARD: .fpu fpv4-sp-d16 +; CORTEX-M4F-HARD-NOT: .eabi_attribute 19 ;; We default to IEEE 754 compliance -; CORTEX-M4-HARD: .eabi_attribute 20, 1 -; CORTEX-M4-HARD: .eabi_attribute 21, 1 -; CORTEX-M4-HARD-NOT: .eabi_attribute 22 -; CORTEX-M4-HARD: .eabi_attribute 23, 3 -; CORTEX-M4-HARD: .eabi_attribute 24, 1 -; CORTEX-M4-HARD: .eabi_attribute 25, 1 -; CORTEX-M4-HARD: .eabi_attribute 27, 1 -; CORTEX-M4-HARD: .eabi_attribute 28, 1 -; CORTEX-M4-HARD: .eabi_attribute 36, 1 -; CORTEX-M4-HARD: .eabi_attribute 38, 1 -; CORTEX-M4-HARD-NOT: .eabi_attribute 42 -; CORTEX-M4-HARD-NOT: .eabi_attribute 44 -; CORTEX-M4-HARD-NOT: .eabi_attribute 68 - -; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19 -;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when +; CORTEX-M4F-HARD: .eabi_attribute 20, 1 +; CORTEX-M4F-HARD: .eabi_attribute 21, 1 +; CORTEX-M4F-HARD-NOT: .eabi_attribute 22 +; CORTEX-M4F-HARD: .eabi_attribute 23, 3 +; CORTEX-M4F-HARD: .eabi_attribute 24, 1 +; CORTEX-M4F-HARD: .eabi_attribute 25, 1 +; CORTEX-M4F-HARD: .eabi_attribute 27, 1 +; CORTEX-M4F-HARD: .eabi_attribute 28, 1 +; CORTEX-M4F-HARD: .eabi_attribute 36, 1 +; CORTEX-M4F-HARD: .eabi_attribute 38, 1 +; CORTEX-M4F-HARD-NOT: .eabi_attribute 42 +; CORTEX-M4F-HARD-NOT: .eabi_attribute 44 +; CORTEX-M4F-HARD-NOT: .eabi_attribute 68 + +; CORTEX-M4F-HARD-FAST-NOT: .eabi_attribute 19 +;; The M4F defaults to a VFPv4 FPU, so it flushes preseving sign when ;; -ffast-math is specified. -; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2 -; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21 -; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22 -; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1 +; CORTEX-M4F-HARD-FAST: .eabi_attribute 20, 2 +; CORTEX-M4F-HARD-FAST-NOT: .eabi_attribute 21 +; CORTEX-M4F-HARD-FAST-NOT: .eabi_attribute 22 +; CORTEX-M4F-HARD-FAST: .eabi_attribute 23, 1 ; CORTEX-M7: .cpu cortex-m7 ; CORTEX-M7: .eabi_attribute 6, 13 @@ -1060,7 +1084,7 @@ ; CORTEX-R5: .eabi_attribute 7, 82 ; CORTEX-R5: .eabi_attribute 8, 1 ; CORTEX-R5: .eabi_attribute 9, 2 -; CORTEX-R5: .fpu vfpv3-d16 +; CORTEX-R5-NOT: .fpu vfpv3-d16 ; CORTEX-R5-NOT: .eabi_attribute 19 ;; We default to IEEE 754 compliance ; CORTEX-R5: .eabi_attribute 20, 1 @@ -1077,6 +1101,28 @@ ; CORTEX-R5: .eabi_attribute 44, 2 ; CORTEX-R5-NOT: .eabi_attribute 68 +; CORTEX-R5F: .cpu cortex-r5f +; CORTEX-R5F: .eabi_attribute 6, 10 +; CORTEX-R5F: .eabi_attribute 7, 82 +; CORTEX-R5F: .eabi_attribute 8, 1 +; CORTEX-R5F: .eabi_attribute 9, 2 +; CORTEX-R5F: .fpu vfpv3-d16 +; CORTEX-R5F-NOT: .eabi_attribute 19 +;; We default to IEEE 754 compliance +; CORTEX-R5F: .eabi_attribute 20, 1 +; CORTEX-R5F: .eabi_attribute 21, 1 +; CORTEX-R5F-NOT: .eabi_attribute 22 +; CORTEX-R5F: .eabi_attribute 23, 3 +; CORTEX-R5F: .eabi_attribute 24, 1 +; CORTEX-R5F: .eabi_attribute 25, 1 +; CORTEX-R5F-NOT: .eabi_attribute 27 +; CORTEX-R5F-NOT: .eabi_attribute 28 +; CORTEX-R5F-NOT: .eabi_attribute 36 +; CORTEX-R5F: .eabi_attribute 38, 1 +; CORTEX-R5F-NOT: .eabi_attribute 42 +; CORTEX-R5F: .eabi_attribute 44, 2 +; CORTEX-R5F-NOT: .eabi_attribute 68 + ; CORTEX-R5-FAST-NOT: .eabi_attribute 19 ;; The R5 has the VFPv3 FP unit, which always flushes preserving sign. ; CORTEX-R5-FAST: .eabi_attribute 20, 2 Index: test/CodeGen/ARM/darwin-eabi.ll =================================================================== --- test/CodeGen/ARM/darwin-eabi.ll +++ test/CodeGen/ARM/darwin-eabi.ll @@ -1,7 +1,7 @@ ; RUN: llc -mtriple=thumbv7m-apple-darwin -mcpu=cortex-m3 < %s | FileCheck %s --check-prefix=CHECK-M3 -; RUN: llc -mtriple=thumbv7em-apple-darwin -mcpu=cortex-m4 < %s | FileCheck %s --check-prefix=CHECK-M4 +; RUN: llc -mtriple=thumbv7em-apple-darwin -mcpu=cortex-m4f < %s | FileCheck %s --check-prefix=CHECK-M4F ; RUN: llc -mtriple=thumbv7-apple-darwin -mcpu=cortex-m3 < %s | FileCheck %s --check-prefix=CHECK-M3 -; RUN: llc -mtriple=thumbv7-apple-darwin -mcpu=cortex-m4 < %s | FileCheck %s --check-prefix=CHECK-M4 +; RUN: llc -mtriple=thumbv7-apple-darwin -mcpu=cortex-m4f < %s | FileCheck %s --check-prefix=CHECK-M4F define float @float_op(float %lhs, float %rhs) { %sum = fadd float %lhs, %rhs @@ -9,8 +9,8 @@ ; CHECK-M3-LABEL: float_op: ; CHECK-M3: bl ___addsf3 -; CHECK-M4-LABEL: float_op: -; CHECK-M4: vadd.f32 +; CHECK-M4F-LABEL: float_op: +; CHECK-M4F: vadd.f32 } define double @double_op(double %lhs, double %rhs) { @@ -19,6 +19,6 @@ ; CHECK-M3-LABEL: double_op: ; CHECK-M3: bl ___adddf3 -; CHECK-M4-LABEL: double_op: -; CHECK-M4: {{(blx|b.w)}} ___adddf3 +; CHECK-M4F-LABEL: double_op: +; CHECK-M4F: {{(blx|b.w)}} ___adddf3 } Index: test/CodeGen/ARM/special-reg.ll =================================================================== --- test/CodeGen/ARM/special-reg.ll +++ test/CodeGen/ARM/special-reg.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ARM --check-prefix=ACORE -; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=ARM --check-prefix=MCORE +; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4f 2>&1 | FileCheck %s --check-prefix=ARM --check-prefix=MCORE define i32 @read_i32_encoded_register() nounwind { entry: Index: test/CodeGen/Thumb2/cortex-fp.ll =================================================================== --- test/CodeGen/Thumb2/cortex-fp.ll +++ test/CodeGen/Thumb2/cortex-fp.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM3 -; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM4 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-m4f | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM4F ; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXM7 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -march=thumb -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=CORTEXA8 @@ -8,7 +8,7 @@ entry: ; CHECK-LABEL: foo: ; CORTEXM3: bl ___mulsf3 -; CORTEXM4: vmul.f32 s +; CORTEXM4F: vmul.f32 s ; CORTEXM7: vmul.f32 s ; CORTEXA8: vmul.f32 d %0 = fmul float %a, %b @@ -20,7 +20,7 @@ ; CHECK-LABEL: bar: %0 = fmul double %a, %b ; CORTEXM3: bl ___muldf3 -; CORTEXM4: {{bl|b.w}} ___muldf3 +; CORTEXM4F: {{bl|b.w}} ___muldf3 ; CORTEXM7: vmul.f64 d ; CORTEXA8: vmul.f64 d ret double %0 Index: test/CodeGen/Thumb2/float-cmp.ll =================================================================== --- test/CodeGen/Thumb2/float-cmp.ll +++ test/CodeGen/Thumb2/float-cmp.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=NONE -; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP +; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4f | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP Index: test/CodeGen/Thumb2/float-intrinsics-double.ll =================================================================== --- test/CodeGen/Thumb2/float-intrinsics-double.ll +++ test/CodeGen/Thumb2/float-intrinsics-double.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=NONE -; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=SP +; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4f | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=SP ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=VFP -check-prefix=FP-ARMv8 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=SP ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=VFP4 Index: test/CodeGen/Thumb2/float-intrinsics-float.ll =================================================================== --- test/CodeGen/Thumb2/float-intrinsics-float.ll +++ test/CodeGen/Thumb2/float-intrinsics-float.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=NONE -; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=VMLA +; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4f | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=VMLA ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=VFP -check-prefix=FP-ARMv8 -check-prefix=VMLA ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=FP-ARMv8 -check-prefix=VMLA ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=VFP4 -check-prefix=NO-VMLA Index: test/CodeGen/Thumb2/float-ops.ll =================================================================== --- test/CodeGen/Thumb2/float-ops.ll +++ test/CodeGen/Thumb2/float-ops.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=NONE -; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=VFP4-ALL +; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4f | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=VFP4-ALL ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=FP-ARMv8 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=VFP4-ALL -check-prefix=VFP4-DP Index: test/MC/ARM/vfp4.s =================================================================== --- test/MC/ARM/vfp4.s +++ test/MC/ARM/vfp4.s @@ -1,6 +1,6 @@ @ RUN: llvm-mc < %s -triple armv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=ARM @ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=THUMB -@ RUN: not llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mcpu=cortex-m4 > %t 2> %t2 +@ RUN: not llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mcpu=cortex-m4f > %t 2> %t2 @ RUN: FileCheck %s < %t --check-prefix=THUMB_V7EM @ RUN: FileCheck %s < %t2 --check-prefix=THUMB_V7EM-ERRORS