Index: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp =================================================================== --- llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp +++ llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -5559,22 +5559,29 @@ LHS = Op0; Value *X; - if (match(LHS, m_Shl(m_One(), m_Value(X)))) { - APInt ValToCheck = Op0KnownZeroInverted; + const APInt *C1; + if (match(LHS, m_Shl(m_Power2(C1), m_Value(X)))) { Type *XTy = X->getType(); - if (ValToCheck.isPowerOf2()) { + unsigned Log2C1 = C1->countTrailingZeros(); + APInt C2 = Op0KnownZeroInverted; + if (C1->isOne() && C2.isPowerOf2()) { // ((1 << X) & 8) == 0 -> X != 3 // ((1 << X) & 8) != 0 -> X == 3 - auto *CmpC = ConstantInt::get(XTy, ValToCheck.countTrailingZeros()); + auto *CmpC = ConstantInt::get(XTy, C2.countTrailingZeros()); auto NewPred = ICmpInst::getInversePredicate(Pred); return new ICmpInst(NewPred, X, CmpC); - } else if ((++ValToCheck).isPowerOf2()) { - // ((1 << X) & 7) == 0 -> X >= 3 - // ((1 << X) & 7) != 0 -> X < 3 - auto *CmpC = ConstantInt::get(XTy, ValToCheck.countTrailingZeros()); - auto NewPred = - Pred == CmpInst::ICMP_EQ ? CmpInst::ICMP_UGE : CmpInst::ICMP_ULT; - return new ICmpInst(NewPred, X, CmpC); + } else { + APInt C2Pow2 = (C2 & ~(*C1 - 1)) + *C1; + if (C2Pow2.isPowerOf2()) { + // iff (C1 is pow2) & ((C2 & ~(C1-1)) + C1) is pow2): + // ((C1 << X) & C2) == 0 -> X >= (Log2(C2+C1) - Log2(C1)) + // ((C1 << X) & C2) != 0 -> X < (Log2(C2+C1) - Log2(C1)) + unsigned Log2C2 = C2Pow2.countTrailingZeros(); + auto *CmpC = ConstantInt::get(XTy, Log2C2 - Log2C1); + auto NewPred = Pred == CmpInst::ICMP_EQ ? CmpInst::ICMP_UGE + : CmpInst::ICMP_ULT; + return new ICmpInst(NewPred, X, CmpC); + } } } Index: llvm/test/Transforms/InstCombine/icmp-and-shift.ll =================================================================== --- llvm/test/Transforms/InstCombine/icmp-and-shift.ll +++ llvm/test/Transforms/InstCombine/icmp-and-shift.ll @@ -124,9 +124,7 @@ define i32 @icmp_eq_and_pow2_shl_pow2_negative2(i32 %0) { ; CHECK-LABEL: @icmp_eq_and_pow2_shl_pow2_negative2( -; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, [[TMP0:%.*]] -; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], 14 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP0:%.*]], 2 ; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; CHECK-NEXT: ret i32 [[CONV]] ; @@ -203,9 +201,7 @@ define i32 @icmp_eq_and_pow2_minus1_shl_pow2(i32 %0) { ; CHECK-LABEL: @icmp_eq_and_pow2_minus1_shl_pow2( -; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, [[TMP0:%.*]] -; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], 14 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP0:%.*]], 2 ; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; CHECK-NEXT: ret i32 [[CONV]] ; @@ -218,9 +214,7 @@ define <2 x i32> @icmp_eq_and_pow2_minus1_shl_pow2_vec(<2 x i32> %0) { ; CHECK-LABEL: @icmp_eq_and_pow2_minus1_shl_pow2_vec( -; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> , [[TMP0:%.*]] -; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[SHL]], -; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[AND]], zeroinitializer +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[TMP0:%.*]], ; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i1> [[CMP]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[CONV]] ; @@ -233,9 +227,7 @@ define i32 @icmp_ne_and_pow2_minus1_shl_pow2(i32 %0) { ; CHECK-LABEL: @icmp_ne_and_pow2_minus1_shl_pow2( -; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, [[TMP0:%.*]] -; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], 14 -; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP0:%.*]], 3 ; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; CHECK-NEXT: ret i32 [[CONV]] ; @@ -248,9 +240,7 @@ define <2 x i32> @icmp_ne_and_pow2_minus1_shl_pow2_vec(<2 x i32> %0) { ; CHECK-LABEL: @icmp_ne_and_pow2_minus1_shl_pow2_vec( -; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> , [[TMP0:%.*]] -; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[SHL]], -; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TMP0:%.*]], ; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i1> [[CMP]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[CONV]] ;