diff --git a/llvm/lib/CodeGen/MachineSSAUpdater.cpp b/llvm/lib/CodeGen/MachineSSAUpdater.cpp
--- a/llvm/lib/CodeGen/MachineSSAUpdater.cpp
+++ b/llvm/lib/CodeGen/MachineSSAUpdater.cpp
@@ -152,6 +152,14 @@
   if (!HasValueForBlock(BB))
     return GetValueAtEndOfBlockInternal(BB, ExistingValueOnly);
 
+  // Ok, we have already got a value for this block. If it is out of our block
+  // or it is a phi - we can re-use it as it will be defined in the middle of
+  // block as well.
+  Register defR = getAvailableVals(AV).lookup(BB);
+  if (auto I = MRI->getVRegDef(defR))
+    if (I->isPHI() || I->getParent() != BB)
+      return defR;
+
   // If there are no predecessors, just return undef.
   if (BB->pred_empty()) {
     // If we cannot insert new instructions, just return $noreg.
diff --git a/llvm/lib/Transforms/Utils/SSAUpdater.cpp b/llvm/lib/Transforms/Utils/SSAUpdater.cpp
--- a/llvm/lib/Transforms/Utils/SSAUpdater.cpp
+++ b/llvm/lib/Transforms/Utils/SSAUpdater.cpp
@@ -100,6 +100,14 @@
   if (!HasValueForBlock(BB))
     return GetValueAtEndOfBlock(BB);
 
+  // Ok, we have already got a value for this block. If it is out of our block
+  // or it is a phi - we can re-use it as it will be defined in the middle of
+  // block as well.
+  Value *defV = FindValueForBlock(BB);
+  if (auto I = dyn_cast<Instruction>(defV))
+    if (isa<PHINode>(I) || I->getParent() != BB)
+      return defV;
+
   // Otherwise, we have the hard case.  Get the live-in values for each
   // predecessor.
   SmallVector<std::pair<BasicBlock *, Value *>, 8> PredValues;