diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h @@ -62,6 +62,14 @@ unsigned getRegUsageForType(Type *Ty); + InstructionCost getArithmeticInstrCost( + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, + TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, + TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, + TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, + TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, + ArrayRef Args = ArrayRef(), + const Instruction *CxtI = nullptr); InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind); diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -198,6 +198,44 @@ return getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, CostKind); } +InstructionCost RISCVTTIImpl::getArithmeticInstrCost( + unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, + TTI::OperandValueKind Opd1Info, TTI::OperandValueKind Opd2Info, + TTI::OperandValueProperties Opd1PropInfo, + TTI::OperandValueProperties Opd2PropInfo, ArrayRef Args, + const Instruction *CxtI) { + // FIXME: Only supporting fixed vectors for now. + if (!isa(Ty) || !ST->useRVVForFixedLengthVectors()) + return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, + Opd2Info, Opd1PropInfo, Opd2PropInfo, + Args, CxtI); + + int ISD = TLI->InstructionOpcodeToISD(Opcode); + assert(ISD && "Invalid opcode"); + + switch (ISD) { + default: + return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, + Opd2Info, Opd1PropInfo, Opd2PropInfo, + Args, CxtI); + case ISD::ADD: + case ISD::AND: + case ISD::OR: + case ISD::SDIV: + case ISD::SHL: + case ISD::SRA: + case ISD::SRL: + case ISD::UDIV: + case ISD::XOR: + case ISD::FADD: + case ISD::FSUB: + case ISD::FMUL: + case ISD::FDIV: + std::pair LT = TLI->getTypeLegalizationCost(DL, Ty); + return LT.first * 2; + } +} + InstructionCost RISCVTTIImpl::getGatherScatterOpCost( unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) { diff --git a/llvm/test/Analysis/CostModel/RISCV/arith-fp.ll b/llvm/test/Analysis/CostModel/RISCV/arith-fp.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Analysis/CostModel/RISCV/arith-fp.ll @@ -0,0 +1,719 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=riscv32 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=256 -passes='print' -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefix=RISCV32 +; RUN: opt < %s -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+experimental-zvfh -riscv-v-vector-bits-min=256 -passes='print' -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefix=RISCV64 + +define i32 @fadd(i32 %arg) { +; CHECK-LABEL: 'fadd' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fadd half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fadd <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fadd <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fadd <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fadd float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fadd <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fadd <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fadd <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fadd double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fadd <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fadd <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fadd' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fadd half undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fadd <4 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fadd <8 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fadd <16 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fadd float undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fadd <2 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fadd <4 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fadd double undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fadd <2 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fadd <4 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fadd' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fadd half undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fadd <4 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fadd <8 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fadd <16 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fadd float undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fadd <2 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fadd <4 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fadd <8 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fadd double undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fadd <2 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fadd <4 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fadd half undef, undef + %V4F16 = fadd <4 x half> undef, undef + %V8F16 = fadd <8 x half> undef, undef + %V16F16 = fadd <16 x half> undef, undef + + %F32 = fadd float undef, undef + %V2F32 = fadd <2 x float> undef, undef + %V4F32 = fadd <4 x float> undef, undef + %V8F32 = fadd <8 x float> undef, undef + + %F64 = fadd double undef, undef + %V2F64 = fadd <2 x double> undef, undef + %V4F64 = fadd <4 x double> undef, undef + + ret i32 undef +} + +define i32 @fsub(i32 %arg) { +; CHECK-LABEL: 'fsub' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fsub half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fsub <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fsub <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fsub <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fsub float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fsub <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fsub <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fsub <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fsub double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fsub <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fsub' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fsub half undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fsub <4 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fsub <8 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fsub <16 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fsub float undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fsub <2 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fsub <4 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fsub double undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fsub' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fsub half undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fsub <4 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fsub <8 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fsub <16 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fsub float undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fsub <2 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fsub <4 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fsub double undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fsub half undef, undef + %V4F16 = fsub <4 x half> undef, undef + %V8F16 = fsub <8 x half> undef, undef + %V16F16 = fsub <16 x half> undef, undef + + %F32 = fsub float undef, undef + %V2F32 = fsub <2 x float> undef, undef + %V4F32 = fsub <4 x float> undef, undef + %V8F32 = fsub <8 x float> undef, undef + + %F64 = fsub double undef, undef + %V2F64 = fsub <2 x double> undef, undef + %V4F64 = fsub <4 x double> undef, undef + + ret i32 undef +} + +define i32 @fneg_idiom(i32 %arg) { +; CHECK-LABEL: 'fneg_idiom' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fsub half 0xH8000, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fsub <4 x half> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fsub <8 x half> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fsub float -0.000000e+00, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fsub <2 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fsub <4 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fsub <8 x float> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fsub double -0.000000e+00, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fsub <4 x double> , undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fneg_idiom' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fsub half 0xH8000, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fsub <4 x half> , undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fsub <8 x half> , undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fsub float -0.000000e+00, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fsub <2 x float> , undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fsub <4 x float> , undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fsub double -0.000000e+00, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> , undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> , undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fneg_idiom' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fsub half 0xH8000, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fsub <4 x half> , undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fsub <8 x half> , undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fsub float -0.000000e+00, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fsub <2 x float> , undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fsub <4 x float> , undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fsub <8 x float> , undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fsub double -0.000000e+00, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fsub <2 x double> , undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fsub <4 x double> , undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fsub half -0.0, undef + %V4F16 = fsub <4 x half> , undef + %V8F16 = fsub <8 x half> , undef + + %F32 = fsub float -0.0, undef + %V2F32 = fsub <2 x float> , undef + %V4F32 = fsub <4 x float> , undef + %V8F32 = fsub <8 x float> , undef + + %F64 = fsub double -0.0, undef + %V2F64 = fsub <2 x double> , undef + %V4F64 = fsub <4 x double> , undef + + ret i32 undef +} + +define i32 @fneg(i32 %arg) { +; CHECK-LABEL: 'fneg' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fneg half undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F16 = fneg <2 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fneg <4 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fneg <8 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fneg <16 x half> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fneg float undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fneg <2 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fneg <4 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fneg <8 x float> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fneg double undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fneg <2 x double> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fneg <4 x double> undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fneg' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fneg half undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = fneg <2 x half> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = fneg <4 x half> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F16 = fneg <8 x half> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fneg <16 x half> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fneg float undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = fneg <2 x float> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = fneg <4 x float> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fneg <8 x float> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fneg double undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = fneg <2 x double> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fneg <4 x double> undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fneg' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fneg half undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = fneg <2 x half> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = fneg <4 x half> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F16 = fneg <8 x half> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fneg <16 x half> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fneg float undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = fneg <2 x float> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F32 = fneg <4 x float> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fneg <8 x float> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fneg double undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = fneg <2 x double> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fneg <4 x double> undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fneg half undef + %V2F16 = fneg <2 x half> undef + %V4F16 = fneg <4 x half> undef + %V8F16 = fneg <8 x half> undef + %V16F16 = fneg <16 x half> undef + + %F32 = fneg float undef + %V2F32 = fneg <2 x float> undef + %V4F32 = fneg <4 x float> undef + %V8F32 = fneg <8 x float> undef + + %F64 = fneg double undef + %V2F64 = fneg <2 x double> undef + %V4F64 = fneg <4 x double> undef + + ret i32 undef +} + +define i32 @fmul(i32 %arg) { +; CHECK-LABEL: 'fmul' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fmul half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fmul <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fmul <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fmul <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fmul float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fmul <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fmul <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fmul <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fmul double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fmul <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fmul <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fmul' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fmul half undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fmul <4 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fmul <8 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fmul <16 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fmul float undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fmul <2 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fmul <4 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fmul double undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fmul <2 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fmul <4 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fmul' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fmul half undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fmul <4 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fmul <8 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fmul <16 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fmul float undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fmul <2 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fmul <4 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fmul <8 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fmul double undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fmul <2 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fmul <4 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fmul half undef, undef + %V4F16 = fmul <4 x half> undef, undef + %V8F16 = fmul <8 x half> undef, undef + %V16F16 = fmul <16 x half> undef, undef + + %F32 = fmul float undef, undef + %V2F32 = fmul <2 x float> undef, undef + %V4F32 = fmul <4 x float> undef, undef + %V8F32 = fmul <8 x float> undef, undef + + %F64 = fmul double undef, undef + %V2F64 = fmul <2 x double> undef, undef + %V4F64 = fmul <4 x double> undef, undef + + ret i32 undef +} + +define i32 @fdiv(i32 %arg) { +; CHECK-LABEL: 'fdiv' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fdiv half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fdiv <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fdiv <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = fdiv <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fdiv float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fdiv <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fdiv <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fdiv <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fdiv double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fdiv <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fdiv <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fdiv' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fdiv half undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fdiv <4 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fdiv <8 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fdiv <16 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fdiv float undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fdiv <2 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fdiv <4 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fdiv <8 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fdiv double undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fdiv <2 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fdiv <4 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fdiv' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = fdiv half undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = fdiv <4 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = fdiv <8 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = fdiv <16 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = fdiv float undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fdiv <2 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fdiv <4 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fdiv <8 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = fdiv double undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fdiv <2 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fdiv <4 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = fdiv half undef, undef + %V4F16 = fdiv <4 x half> undef, undef + %V8F16 = fdiv <8 x half> undef, undef + %V16F16 = fdiv <16 x half> undef, undef + + %F32 = fdiv float undef, undef + %V2F32 = fdiv <2 x float> undef, undef + %V4F32 = fdiv <4 x float> undef, undef + %V8F32 = fdiv <8 x float> undef, undef + + %F64 = fdiv double undef, undef + %V2F64 = fdiv <2 x double> undef, undef + %V4F64 = fdiv <4 x double> undef, undef + + ret i32 undef +} + +define i32 @frem(i32 %arg) { +; CHECK-LABEL: 'frem' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = frem half undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 26 for instruction: %V4F16 = frem <4 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 58 for instruction: %V8F16 = frem <8 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 116 for instruction: %V16F16 = frem <16 x half> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = frem float undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2F32 = frem <2 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 26 for instruction: %V4F32 = frem <4 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 52 for instruction: %V8F32 = frem <8 x float> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = frem double undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2F64 = frem <2 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V4F64 = frem <4 x double> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'frem' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = frem half undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F16 = frem <4 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8F16 = frem <8 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16F16 = frem <16 x half> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = frem float undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2F32 = frem <2 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F32 = frem <4 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8F32 = frem <8 x float> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = frem double undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2F64 = frem <2 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F64 = frem <4 x double> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'frem' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = frem half undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F16 = frem <4 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8F16 = frem <8 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V16F16 = frem <16 x half> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = frem float undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2F32 = frem <2 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F32 = frem <4 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V8F32 = frem <8 x float> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = frem double undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2F64 = frem <2 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V4F64 = frem <4 x double> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = frem half undef, undef + %V4F16 = frem <4 x half> undef, undef + %V8F16 = frem <8 x half> undef, undef + %V16F16 = frem <16 x half> undef, undef + + %F32 = frem float undef, undef + %V2F32 = frem <2 x float> undef, undef + %V4F32 = frem <4 x float> undef, undef + %V8F32 = frem <8 x float> undef, undef + + %F64 = frem double undef, undef + %V2F64 = frem <2 x double> undef, undef + %V4F64 = frem <4 x double> undef, undef + + ret i32 undef +} + +define i32 @fsqrt(i32 %arg) { +; CHECK-LABEL: 'fsqrt' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.sqrt.f16(half undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F16 = call <4 x half> @llvm.sqrt.v4f16(<4 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F16 = call <8 x half> @llvm.sqrt.v8f16(<8 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = call <16 x half> @llvm.sqrt.v16f16(<16 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fsqrt' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.sqrt.f16(half undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.sqrt.v4f16(<4 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.sqrt.v8f16(<8 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = call <16 x half> @llvm.sqrt.v16f16(<16 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fsqrt' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.sqrt.f16(half undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.sqrt.v4f16(<4 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.sqrt.v8f16(<8 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = call <16 x half> @llvm.sqrt.v16f16(<16 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.sqrt.f32(float undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.sqrt.f64(double undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = call half @llvm.sqrt.f16(half undef) + %V4F16 = call <4 x half> @llvm.sqrt.v4f16(<4 x half> undef) + %V8F16 = call <8 x half> @llvm.sqrt.v8f16(<8 x half> undef) + %V16F16 = call <16 x half> @llvm.sqrt.v16f16(<16 x half> undef) + + %F32 = call float @llvm.sqrt.f32(float undef) + %V2F32 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> undef) + %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) + %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) + + %F64 = call double @llvm.sqrt.f64(double undef) + %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) + %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) + + ret i32 undef +} + +define i32 @fabs(i32 %arg) { +; CHECK-LABEL: 'fabs' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.fabs.f16(half undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F16 = call <4 x half> @llvm.fabs.v4f16(<4 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F16 = call <8 x half> @llvm.fabs.v8f16(<8 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F16 = call <16 x half> @llvm.fabs.v16f16(<16 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fabs.f32(float undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call <2 x float> @llvm.fabs.v2f32(<2 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fabs.f64(double undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fabs' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.fabs.f16(half undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.fabs.v4f16(<4 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.fabs.v8f16(<8 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F16 = call <16 x half> @llvm.fabs.v16f16(<16 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fabs.f32(float undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.fabs.v2f32(<2 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fabs.f64(double undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fabs' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.fabs.f16(half undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.fabs.v4f16(<4 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.fabs.v8f16(<8 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F16 = call <16 x half> @llvm.fabs.v16f16(<16 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fabs.f32(float undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.fabs.v2f32(<2 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fabs.f64(double undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = call half @llvm.fabs.f16(half undef) + %V4F16 = call <4 x half> @llvm.fabs.v4f16(<4 x half> undef) + %V8F16 = call <8 x half> @llvm.fabs.v8f16(<8 x half> undef) + %V2F16 = call <16 x half> @llvm.fabs.v16f16(<16 x half> undef) + + %F32 = call float @llvm.fabs.f32(float undef) + %V2F32 = call <2 x float> @llvm.fabs.v2f32(<2 x float> undef) + %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) + %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) + + %F64 = call double @llvm.fabs.f64(double undef) + %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) + %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) + + ret i32 undef +} + +define i32 @fcopysign(i32 %arg) { +; CHECK-LABEL: 'fcopysign' +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F16 = call half @llvm.copysign.f16(half undef, half undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.copysign.v4f16(<4 x half> undef, <4 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.copysign.v8f16(<8 x half> undef, <8 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = call <16 x half> @llvm.copysign.v16f16(<16 x half> undef, <16 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.copysign.v2f32(<2 x float> undef, <2 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %F64 = call double @llvm.copysign.f64(double undef, double undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fcopysign' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.copysign.f16(half undef, half undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.copysign.v4f16(<4 x half> undef, <4 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.copysign.v8f16(<8 x half> undef, <8 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = call <16 x half> @llvm.copysign.v16f16(<16 x half> undef, <16 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.copysign.v2f32(<2 x float> undef, <2 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.copysign.f64(double undef, double undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fcopysign' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call half @llvm.copysign.f16(half undef, half undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.copysign.v4f16(<4 x half> undef, <4 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.copysign.v8f16(<8 x half> undef, <8 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = call <16 x half> @llvm.copysign.v16f16(<16 x half> undef, <16 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.copysign.f32(float undef, float undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.copysign.v2f32(<2 x float> undef, <2 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.copysign.f64(double undef, double undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = call half @llvm.copysign.f16(half undef, half undef) + %V4F16 = call <4 x half> @llvm.copysign.v4f16(<4 x half> undef, <4 x half> undef) + %V8F16 = call <8 x half> @llvm.copysign.v8f16(<8 x half> undef, <8 x half> undef) + %V16F16 = call <16 x half> @llvm.copysign.v16f16(<16 x half> undef, <16 x half> undef) + + %F32 = call float @llvm.copysign.f32(float undef, float undef) + %V2F32 = call <2 x float> @llvm.copysign.v2f32(<2 x float> undef, <2 x float> undef) + %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) + %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) + + %F64 = call double @llvm.copysign.f64(double undef, double undef) + %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) + %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) + + ret i32 undef +} + +define i32 @fma(i32 %arg) { +; CHECK-LABEL: 'fma' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call float @llvm.fma.f32(float undef, float undef, float undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F16 = call <4 x half> @llvm.fma.v4f16(<4 x half> undef, <4 x half> undef, <4 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F16 = call <8 x half> @llvm.fma.v8f16(<8 x half> undef, <8 x half> undef, <8 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F16 = call <16 x half> @llvm.fma.v16f16(<16 x half> undef, <16 x half> undef, <16 x half> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call <2 x float> @llvm.fma.v2f32(<2 x float> undef, <2 x float> undef, <2 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; RISCV32-LABEL: 'fma' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call float @llvm.fma.f32(float undef, float undef, float undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.fma.v4f16(<4 x half> undef, <4 x half> undef, <4 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.fma.v8f16(<8 x half> undef, <8 x half> undef, <8 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = call <16 x half> @llvm.fma.v16f16(<16 x half> undef, <16 x half> undef, <16 x half> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.fma.v2f32(<2 x float> undef, <2 x float> undef, <2 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; +; RISCV64-LABEL: 'fma' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call float @llvm.fma.f32(float undef, float undef, float undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F16 = call <4 x half> @llvm.fma.v4f16(<4 x half> undef, <4 x half> undef, <4 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F16 = call <8 x half> @llvm.fma.v8f16(<8 x half> undef, <8 x half> undef, <8 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F16 = call <16 x half> @llvm.fma.v16f16(<16 x half> undef, <16 x half> undef, <16 x half> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = call <2 x float> @llvm.fma.v2f32(<2 x float> undef, <2 x float> undef, <2 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; + %F16 = call float @llvm.fma.f32(float undef, float undef, float undef) + %V4F16 = call <4 x half> @llvm.fma.v4f16(<4 x half> undef, <4 x half> undef, <4 x half> undef) + %V8F16 = call <8 x half> @llvm.fma.v8f16(<8 x half> undef, <8 x half> undef, <8 x half> undef) + %V16F16 = call <16 x half> @llvm.fma.v16f16(<16 x half> undef, <16 x half> undef, <16 x half> undef) + + %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) + %V2F32 = call <2 x float> @llvm.fma.v2f32(<2 x float> undef, <2 x float> undef, <2 x float> undef) + %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) + %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) + + %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) + %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) + %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) + + ret i32 undef +} + +declare half @llvm.sqrt.f16(half) +declare <4 x half> @llvm.sqrt.v4f16(<4 x half>) +declare <8 x half> @llvm.sqrt.v8f16(<8 x half>) +declare <16 x half> @llvm.sqrt.v16f16(<16 x half>) + +declare float @llvm.sqrt.f32(float) +declare <2 x float> @llvm.sqrt.v2f32(<2 x float>) +declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) +declare <8 x float> @llvm.sqrt.v8f32(<8 x float>) + +declare double @llvm.sqrt.f64(double) +declare <2 x double> @llvm.sqrt.v2f64(<2 x double>) +declare <4 x double> @llvm.sqrt.v4f64(<4 x double>) + +declare half @llvm.fabs.f16(half) +declare <4 x half> @llvm.fabs.v4f16(<4 x half>) +declare <8 x half> @llvm.fabs.v8f16(<8 x half>) +declare <16 x half> @llvm.fabs.v16f16(<16 x half>) + +declare float @llvm.fabs.f32(float) +declare <2 x float> @llvm.fabs.v2f32(<2 x float>) +declare <4 x float> @llvm.fabs.v4f32(<4 x float>) +declare <8 x float> @llvm.fabs.v8f32(<8 x float>) + +declare double @llvm.fabs.f64(double) +declare <2 x double> @llvm.fabs.v2f64(<2 x double>) +declare <4 x double> @llvm.fabs.v4f64(<4 x double>) + +declare half @llvm.copysign.f16(half, half) +declare <4 x half> @llvm.copysign.v4f16(<4 x half>, <4 x half>) +declare <8 x half> @llvm.copysign.v8f16(<8 x half>, <8 x half>) +declare <16 x half> @llvm.copysign.v16f16(<16 x half>, <16 x half>) + +declare float @llvm.copysign.f32(float, float) +declare <2 x float> @llvm.copysign.v2f32(<2 x float>, <2 x float>) +declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>) +declare <8 x float> @llvm.copysign.v8f32(<8 x float>, <8 x float>) + +declare double @llvm.copysign.f64(double, double) +declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>) +declare <4 x double> @llvm.copysign.v4f64(<4 x double>, <4 x double>) + +declare half @llvm.fma.f16(half, half, half) +declare <4 x half> @llvm.fma.v4f16(<4 x half>, <4 x half>, <4 x half>) +declare <8 x half> @llvm.fma.v8f16(<8 x half>, <8 x half>, <8 x half>) +declare <16 x half> @llvm.fma.v16f16(<16 x half>, <16 x half>, <16 x half>) + +declare float @llvm.fma.f32(float, float, float) +declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) +declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) +declare <8 x float> @llvm.fma.v8f32(<8 x float>, <8 x float>, <8 x float>) + +declare double @llvm.fma.f64(double, double, double) +declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) +declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>) diff --git a/llvm/test/Analysis/CostModel/RISCV/arith.ll b/llvm/test/Analysis/CostModel/RISCV/arith.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Analysis/CostModel/RISCV/arith.ll @@ -0,0 +1,877 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=riscv32 -mattr=+v -riscv-v-vector-bits-min=256 -passes='print' -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefix=RISCV32 +; RUN: opt < %s -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-min=256 -passes='print' -cost-kind=throughput 2>&1 -disable-output | FileCheck %s --check-prefix=RISCV64 + +define void @i1() { +; CHECK-LABEL: 'i1' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i1 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'i1' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i1 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'i1' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i1 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c = add i1 undef, undef + %d = sub i1 undef, undef + %e = mul i1 undef, undef + %f = ashr i1 undef, undef + %g = lshr i1 undef, undef + %h = shl i1 undef, undef + %i = and i1 undef, undef + %j = or i1 undef, undef + %k = xor i1 undef, undef + ret void +} + +define void @i8() { +; CHECK-LABEL: 'i8' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i8 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'i8' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i8 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'i8' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i8 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c = add i8 undef, undef + %d = sub i8 undef, undef + %e = mul i8 undef, undef + %f = ashr i8 undef, undef + %g = lshr i8 undef, undef + %h = shl i8 undef, undef + %i = and i8 undef, undef + %j = or i8 undef, undef + %k = xor i8 undef, undef + ret void +} + +define void @i16() { +; CHECK-LABEL: 'i16' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i16 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'i16' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i16 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'i16' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i16 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c = add i16 undef, undef + %d = sub i16 undef, undef + %e = mul i16 undef, undef + %f = ashr i16 undef, undef + %g = lshr i16 undef, undef + %h = shl i16 undef, undef + %i = and i16 undef, undef + %j = or i16 undef, undef + %k = xor i16 undef, undef + ret void +} + +define void @i32() { +; CHECK-LABEL: 'i32' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i32 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'i32' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i32 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'i32' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i32 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c = add i32 undef, undef + %d = sub i32 undef, undef + %e = mul i32 undef, undef + %f = ashr i32 undef, undef + %g = lshr i32 undef, undef + %h = shl i32 undef, undef + %i = and i32 undef, undef + %j = or i32 undef, undef + %k = xor i32 undef, undef + ret void +} + +define void @i64() { +; CHECK-LABEL: 'i64' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i64 undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'i64' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c = add i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d = sub i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f = ashr i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g = lshr i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h = shl i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i = and i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j = or i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k = xor i64 undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'i64' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i64 undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c = add i64 undef, undef + %d = sub i64 undef, undef + %e = mul i64 undef, undef + %f = ashr i64 undef, undef + %g = lshr i64 undef, undef + %h = shl i64 undef, undef + %i = and i64 undef, undef + %j = or i64 undef, undef + %k = xor i64 undef, undef + ret void +} + + +define void @vi8() { +; CHECK-LABEL: 'vi8' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c2 = add <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d2 = sub <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e2 = mul <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f2 = ashr <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g2 = lshr <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h2 = shl <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i2 = and <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j2 = or <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k2 = xor <2 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c4 = add <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d4 = sub <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e4 = mul <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f4 = ashr <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g4 = lshr <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h4 = shl <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i4 = and <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j4 = or <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k4 = xor <4 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c8 = add <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d8 = sub <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e8 = mul <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f8 = ashr <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g8 = lshr <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h8 = shl <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = and <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j8 = or <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k8 = xor <8 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c16 = add <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d16 = sub <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e16 = mul <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f16 = ashr <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g16 = lshr <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h16 = shl <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = and <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j16 = or <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k16 = xor <16 x i8> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'vi8' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i8> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'vi8' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i8> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c2 = add <2 x i8> undef, undef + %d2 = sub <2 x i8> undef, undef + %e2 = mul <2 x i8> undef, undef + %f2 = ashr <2 x i8> undef, undef + %g2 = lshr <2 x i8> undef, undef + %h2 = shl <2 x i8> undef, undef + %i2 = and <2 x i8> undef, undef + %j2 = or <2 x i8> undef, undef + %k2 = xor <2 x i8> undef, undef + %c4 = add <4 x i8> undef, undef + %d4 = sub <4 x i8> undef, undef + %e4 = mul <4 x i8> undef, undef + %f4 = ashr <4 x i8> undef, undef + %g4 = lshr <4 x i8> undef, undef + %h4 = shl <4 x i8> undef, undef + %i4 = and <4 x i8> undef, undef + %j4 = or <4 x i8> undef, undef + %k4 = xor <4 x i8> undef, undef + %c8 = add <8 x i8> undef, undef + %d8 = sub <8 x i8> undef, undef + %e8 = mul <8 x i8> undef, undef + %f8 = ashr <8 x i8> undef, undef + %g8 = lshr <8 x i8> undef, undef + %h8 = shl <8 x i8> undef, undef + %i8 = and <8 x i8> undef, undef + %j8 = or <8 x i8> undef, undef + %k8 = xor <8 x i8> undef, undef + %c16 = add <16 x i8> undef, undef + %d16 = sub <16 x i8> undef, undef + %e16 = mul <16 x i8> undef, undef + %f16 = ashr <16 x i8> undef, undef + %g16 = lshr <16 x i8> undef, undef + %h16 = shl <16 x i8> undef, undef + %i16 = and <16 x i8> undef, undef + %j16 = or <16 x i8> undef, undef + %k16 = xor <16 x i8> undef, undef + ret void +} + +define void @vi16() { +; CHECK-LABEL: 'vi16' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c2 = add <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d2 = sub <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e2 = mul <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f2 = ashr <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g2 = lshr <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h2 = shl <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i2 = and <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j2 = or <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k2 = xor <2 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c4 = add <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d4 = sub <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e4 = mul <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f4 = ashr <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g4 = lshr <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h4 = shl <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i4 = and <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j4 = or <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k4 = xor <4 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c8 = add <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d8 = sub <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e8 = mul <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f8 = ashr <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g8 = lshr <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h8 = shl <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = and <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j8 = or <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k8 = xor <8 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i16> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'vi16' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i16> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'vi16' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i16> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c2 = add <2 x i16> undef, undef + %d2 = sub <2 x i16> undef, undef + %e2 = mul <2 x i16> undef, undef + %f2 = ashr <2 x i16> undef, undef + %g2 = lshr <2 x i16> undef, undef + %h2 = shl <2 x i16> undef, undef + %i2 = and <2 x i16> undef, undef + %j2 = or <2 x i16> undef, undef + %k2 = xor <2 x i16> undef, undef + %c4 = add <4 x i16> undef, undef + %d4 = sub <4 x i16> undef, undef + %e4 = mul <4 x i16> undef, undef + %f4 = ashr <4 x i16> undef, undef + %g4 = lshr <4 x i16> undef, undef + %h4 = shl <4 x i16> undef, undef + %i4 = and <4 x i16> undef, undef + %j4 = or <4 x i16> undef, undef + %k4 = xor <4 x i16> undef, undef + %c8 = add <8 x i16> undef, undef + %d8 = sub <8 x i16> undef, undef + %e8 = mul <8 x i16> undef, undef + %f8 = ashr <8 x i16> undef, undef + %g8 = lshr <8 x i16> undef, undef + %h8 = shl <8 x i16> undef, undef + %i8 = and <8 x i16> undef, undef + %j8 = or <8 x i16> undef, undef + %k8 = xor <8 x i16> undef, undef + %c16 = add <16 x i16> undef, undef + %d16 = sub <16 x i16> undef, undef + %e16 = mul <16 x i16> undef, undef + %f16 = ashr <16 x i16> undef, undef + %g16 = lshr <16 x i16> undef, undef + %h16 = shl <16 x i16> undef, undef + %i16 = and <16 x i16> undef, undef + %j16 = or <16 x i16> undef, undef + %k16 = xor <16 x i16> undef, undef + ret void +} + +define void @vi32() { +; CHECK-LABEL: 'vi32' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c2 = add <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d2 = sub <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e2 = mul <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f2 = ashr <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g2 = lshr <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h2 = shl <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i2 = and <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j2 = or <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k2 = xor <2 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c4 = add <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d4 = sub <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e4 = mul <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f4 = ashr <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g4 = lshr <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h4 = shl <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i4 = and <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j4 = or <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k4 = xor <4 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %c16 = add <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %d16 = sub <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %e16 = mul <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f16 = ashr <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %g16 = lshr <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %h16 = shl <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %i16 = and <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %j16 = or <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %k16 = xor <16 x i32> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'vi32' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i32> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'vi32' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i32> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c2 = add <2 x i32> undef, undef + %d2 = sub <2 x i32> undef, undef + %e2 = mul <2 x i32> undef, undef + %f2 = ashr <2 x i32> undef, undef + %g2 = lshr <2 x i32> undef, undef + %h2 = shl <2 x i32> undef, undef + %i2 = and <2 x i32> undef, undef + %j2 = or <2 x i32> undef, undef + %k2 = xor <2 x i32> undef, undef + %c4 = add <4 x i32> undef, undef + %d4 = sub <4 x i32> undef, undef + %e4 = mul <4 x i32> undef, undef + %f4 = ashr <4 x i32> undef, undef + %g4 = lshr <4 x i32> undef, undef + %h4 = shl <4 x i32> undef, undef + %i4 = and <4 x i32> undef, undef + %j4 = or <4 x i32> undef, undef + %k4 = xor <4 x i32> undef, undef + %c8 = add <8 x i32> undef, undef + %d8 = sub <8 x i32> undef, undef + %e8 = mul <8 x i32> undef, undef + %f8 = ashr <8 x i32> undef, undef + %g8 = lshr <8 x i32> undef, undef + %h8 = shl <8 x i32> undef, undef + %i8 = and <8 x i32> undef, undef + %j8 = or <8 x i32> undef, undef + %k8 = xor <8 x i32> undef, undef + %c16 = add <16 x i32> undef, undef + %d16 = sub <16 x i32> undef, undef + %e16 = mul <16 x i32> undef, undef + %f16 = ashr <16 x i32> undef, undef + %g16 = lshr <16 x i32> undef, undef + %h16 = shl <16 x i32> undef, undef + %i16 = and <16 x i32> undef, undef + %j16 = or <16 x i32> undef, undef + %k16 = xor <16 x i32> undef, undef + ret void +} + +define void @vi64() { +; CHECK-LABEL: 'vi64' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c2 = add <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d2 = sub <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %e2 = mul <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f2 = ashr <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g2 = lshr <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h2 = shl <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i2 = and <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j2 = or <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k2 = xor <2 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %e4 = mul <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %c8 = add <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %d8 = sub <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %e8 = mul <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %f8 = ashr <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %g8 = lshr <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %h8 = shl <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %i8 = and <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %j8 = or <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %k8 = xor <8 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %c16 = add <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %d16 = sub <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %e16 = mul <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %f16 = ashr <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %g16 = lshr <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %h16 = shl <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %i16 = and <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %j16 = or <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %k16 = xor <16 x i64> undef, undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; RISCV32-LABEL: 'vi64' +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i64> undef, undef +; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; +; RISCV64-LABEL: 'vi64' +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c2 = add <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d2 = sub <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e2 = mul <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f2 = ashr <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g2 = lshr <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h2 = shl <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i2 = and <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j2 = or <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k2 = xor <2 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c4 = add <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d4 = sub <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e4 = mul <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f4 = ashr <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g4 = lshr <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h4 = shl <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i4 = and <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j4 = or <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k4 = xor <4 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c8 = add <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d8 = sub <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e8 = mul <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f8 = ashr <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g8 = lshr <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h8 = shl <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i8 = and <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j8 = or <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k8 = xor <8 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %c16 = add <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %d16 = sub <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %e16 = mul <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %f16 = ashr <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %g16 = lshr <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %h16 = shl <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i16 = and <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %j16 = or <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %k16 = xor <16 x i64> undef, undef +; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; + %c2 = add <2 x i64> undef, undef + %d2 = sub <2 x i64> undef, undef + %e2 = mul <2 x i64> undef, undef + %f2 = ashr <2 x i64> undef, undef + %g2 = lshr <2 x i64> undef, undef + %h2 = shl <2 x i64> undef, undef + %i2 = and <2 x i64> undef, undef + %j2 = or <2 x i64> undef, undef + %k2 = xor <2 x i64> undef, undef + %c4 = add <4 x i64> undef, undef + %d4 = sub <4 x i64> undef, undef + %e4 = mul <4 x i64> undef, undef + %f4 = ashr <4 x i64> undef, undef + %g4 = lshr <4 x i64> undef, undef + %h4 = shl <4 x i64> undef, undef + %i4 = and <4 x i64> undef, undef + %j4 = or <4 x i64> undef, undef + %k4 = xor <4 x i64> undef, undef + %c8 = add <8 x i64> undef, undef + %d8 = sub <8 x i64> undef, undef + %e8 = mul <8 x i64> undef, undef + %f8 = ashr <8 x i64> undef, undef + %g8 = lshr <8 x i64> undef, undef + %h8 = shl <8 x i64> undef, undef + %i8 = and <8 x i64> undef, undef + %j8 = or <8 x i64> undef, undef + %k8 = xor <8 x i64> undef, undef + %c16 = add <16 x i64> undef, undef + %d16 = sub <16 x i64> undef, undef + %e16 = mul <16 x i64> undef, undef + %f16 = ashr <16 x i64> undef, undef + %g16 = lshr <16 x i64> undef, undef + %h16 = shl <16 x i64> undef, undef + %i16 = and <16 x i64> undef, undef + %j16 = or <16 x i64> undef, undef + %k16 = xor <16 x i64> undef, undef + ret void +}