diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1100,7 +1100,7 @@
     if (!IsImplicitOp) {
       if (!MCID.isVariadic() && NumExplicitOps >= MCID.getNumOperands() &&
           !Operand.Operand.isValidExcessOperand())
-        return error("too many operands for instruction");
+        return error(Operand.Begin, "too many operands for instruction");
 
       ++NumExplicitOps;
     }
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir b/llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
--- a/llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
@@ -1,12 +1,13 @@
-# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | \
+# RUN:   FileCheck --strict-whitespace %s
 
 ---
 name: extra_imm_operand
 body: |
   bb.0:
-    ; CHECK: [[@LINE+3]]:18: too many operands for instruction
-    ; CHECK-NEXT: S_ENDPGM 0, 0
-    ; CHECK_NEXT:               ^
+    ; CHECK: [[@LINE+3]]:17: too many operands for instruction
+    ; CHECK-NEXT: {{^}}    S_ENDPGM 0, 0
+    ; CHECK-NEXT: {{^}}                ^
     S_ENDPGM 0, 0
 
 ...
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir b/llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir
--- a/llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir
@@ -1,12 +1,13 @@
-# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | \
+# RUN:   FileCheck --strict-whitespace %s
 
 ---
 name: extra_reg_operand
 body: |
   bb.0:
-    ; CHECK: [[@LINE+3]]:29: too many operands for instruction
-    ; S_ENDPGM 0, undef $vgpr0
-    ; CHECK_NEXT:               ^
+    ; CHECK: [[@LINE+3]]:17: too many operands for instruction
+    ; CHECK-NEXT: {{^}}    S_ENDPGM 0, undef $vgpr0
+    ; CHECK-NEXT: {{^}}                ^
     S_ENDPGM 0, undef $vgpr0
 
 ...