diff --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td b/llvm/lib/Target/AArch64/SMEInstrFormats.td --- a/llvm/lib/Target/AArch64/SMEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td @@ -14,10 +14,11 @@ // SME Outer Products //===----------------------------------------------------------------------===// + class sme_fp_outer_product_inst : I<(outs za_ty:$ZAda), - (ins PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm), + (ins za_ty:$_ZAda, PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm), mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn, $Zm", "", []>, Sched<[]> { @@ -34,6 +35,8 @@ let Inst{9-5} = Zn; let Inst{4} = S; let Inst{3} = 0b0; + + let Constraints = "$ZAda = $_ZAda"; } class sme_outer_product_fp32 @@ -53,7 +56,7 @@ MatrixTileOperand za_ty, ZPRRegOp zpr_ty, string mnemonic> : I<(outs za_ty:$ZAda), - (ins PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm), + (ins za_ty:$_ZAda, PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm), mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn, $Zm", "", []>, Sched<[]> { @@ -72,6 +75,8 @@ let Inst{9-5} = Zn; let Inst{4} = S; let Inst{3} = 0b0; + + let Constraints = "$ZAda = $_ZAda"; } class sme_int_outer_product_i32 opc, string mnemonic> @@ -91,7 +96,7 @@ class sme_outer_product_widening_inst : I<(outs TileOp32:$ZAda), - (ins PPR3bAny:$Pn, PPR3bAny:$Pm, ZPR16:$Zn, ZPR16:$Zm), + (ins TileOp32:$_ZAda, PPR3bAny:$Pn, PPR3bAny:$Pm, ZPR16:$Zn, ZPR16:$Zm), mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn, $Zm", "", []>, Sched<[]> { @@ -109,6 +114,8 @@ let Inst{4} = S; let Inst{3-2} = 0b00; let Inst{1-0} = ZAda; + + let Constraints = "$ZAda = $_ZAda"; } multiclass sme_bf16_outer_product { @@ -126,7 +133,7 @@ class sme_add_vector_to_tile_inst : I<(outs tile_ty:$ZAda), - (ins PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn), + (ins tile_ty:$_ZAda, PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn), mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn", "", []>, Sched<[]> { bits<3> Pm; @@ -140,6 +147,8 @@ let Inst{12-10} = Pn; let Inst{9-5} = Zn; let Inst{4-3} = 0b00; + + let Constraints = "$ZAda = $_ZAda"; } class sme_add_vector_to_tile_u32 @@ -429,8 +438,12 @@ bit is_col, Operand imm_ty, ZPRRegOp zpr_ty, string mnemonic> : sme_vector_to_tile_base; + (ins tile_ty:$_ZAd, MatrixIndexGPR32Op12_15:$Rv, imm_ty:$imm, PPR3bAny:$Pg, zpr_ty:$Zn), + mnemonic, "\t$ZAd[$Rv, $imm], $Pg/m, $Zn">{ + + let Constraints = "$ZAd = $_ZAd"; +} + multiclass sme_vector_to_tile_aliases : sme_tile_to_vector_base; + (ins zpr_ty:$_Zd, PPR3bAny:$Pg, tile_ty:$ZAn, MatrixIndexGPR32Op12_15:$Rv, imm_ty:$imm), + mnemonic, "\t$Zd, $Pg/m, $ZAn[$Rv, $imm]"> { + + let Constraints = "$Zd = $_Zd"; +} multiclass sme_tile_to_vector_aliases