diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/asm-show-inst.ll b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/asm-show-inst.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/asm-show-inst.ll
@@ -0,0 +1,13 @@
+;; Check that we remove the exact MCInst number from --asm-verbose output
+; RUN: llc < %s -mtriple=i686-unknown-unknown --asm-show-inst | FileCheck %s --check-prefix=VERBOSE
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=CHECK
+
+define i8 @add_i8(i8 %a) nounwind {
+  %add = add i8 %a, 2
+  ret i8 %add
+}
+
+define i32 @add_i32(i32 %a) nounwind {
+  %add = add i32 %a, 2
+  ret i32 %add
+}
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/asm-show-inst.ll.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/asm-show-inst.ll.expected
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/asm-show-inst.ll.expected
@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+;; Check that we remove the exact MCInst number from --asm-verbose output
+; RUN: llc < %s -mtriple=i686-unknown-unknown --asm-show-inst | FileCheck %s --check-prefix=VERBOSE
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=CHECK
+
+define i8 @add_i8(i8 %a) nounwind {
+; VERBOSE-LABEL: add_i8:
+; VERBOSE:       # %bb.0:
+; VERBOSE-NEXT:    movb {{[0-9]+}}(%esp), %al # <MCInst #1804 MOV8rm
+; VERBOSE-NEXT:    # <MCOperand Reg:2>
+; VERBOSE-NEXT:    # <MCOperand Reg:33>
+; VERBOSE-NEXT:    # <MCOperand Imm:1>
+; VERBOSE-NEXT:    # <MCOperand Reg:0>
+; VERBOSE-NEXT:    # <MCOperand Imm:4>
+; VERBOSE-NEXT:    # <MCOperand Reg:0>>
+; VERBOSE-NEXT:    addb $2, %al # <MCInst #400 ADD8i8
+; VERBOSE-NEXT:    # <MCOperand Imm:2>>
+; VERBOSE-NEXT:    retl # <MCInst #2560 RET32
+; VERBOSE-NEXT:    # <MCOperand Reg:2>>
+;
+; CHECK-LABEL: add_i8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %al
+; CHECK-NEXT:    addb $2, %al
+; CHECK-NEXT:    retl
+  %add = add i8 %a, 2
+  ret i8 %add
+}
+
+define i32 @add_i32(i32 %a) nounwind {
+; VERBOSE-LABEL: add_i32:
+; VERBOSE:       # %bb.0:
+; VERBOSE-NEXT:    movl {{[0-9]+}}(%esp), %eax # <MCInst #1768 MOV32rm
+; VERBOSE-NEXT:    # <MCOperand Reg:22>
+; VERBOSE-NEXT:    # <MCOperand Reg:33>
+; VERBOSE-NEXT:    # <MCOperand Imm:1>
+; VERBOSE-NEXT:    # <MCOperand Reg:0>
+; VERBOSE-NEXT:    # <MCOperand Imm:4>
+; VERBOSE-NEXT:    # <MCOperand Reg:0>>
+; VERBOSE-NEXT:    addl $2, %eax # <MCInst #387 ADD32ri8
+; VERBOSE-NEXT:    # <MCOperand Reg:22>
+; VERBOSE-NEXT:    # <MCOperand Reg:22>
+; VERBOSE-NEXT:    # <MCOperand Imm:2>>
+; VERBOSE-NEXT:    retl # <MCInst #2560 RET32
+; VERBOSE-NEXT:    # <MCOperand Reg:22>>
+;
+; CHECK-LABEL: add_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    addl $2, %eax
+; CHECK-NEXT:    retl
+  %add = add i32 %a, 2
+  ret i32 %add
+}
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/asm-show-inst.test b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/asm-show-inst.test
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/asm-show-inst.test
@@ -0,0 +1,5 @@
+# REQUIRES: x86-registered-target
+## Check that we insert regexes for MCInst/MCReg operands instead of hardcoding the numbers
+
+# RUN: cp -f %S/Inputs/asm-show-inst.ll %t.ll && %update_llc_test_checks %t.ll
+# RUN: diff -u %S/Inputs/asm-show-inst.ll.expected %t.ll