diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll +++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll @@ -1,5 +1,6 @@ ; RUN: llc -mtriple=x86_64 -stop-after=finalize-isel -debug-only=isel -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=PIC ; RUN: llc -mtriple=x86_64-windows -stop-after=finalize-isel -debug-only=isel -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=WIN +; RUN: llc -mtriple=x86_64 < %s | FileCheck %s --check-prefix=ASM define i64 @i64_test(i64 %i) nounwind readnone { %loc = alloca i64 diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll.expected --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll.expected +++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll.expected @@ -1,6 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=x86_64 -stop-after=finalize-isel -debug-only=isel -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=PIC ; RUN: llc -mtriple=x86_64-windows -stop-after=finalize-isel -debug-only=isel -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=WIN +; RUN: llc -mtriple=x86_64 < %s | FileCheck %s --check-prefix=ASM define i64 @i64_test(i64 %i) nounwind readnone { ; PIC-LABEL: i64_test: @@ -20,6 +21,12 @@ ; WIN-NEXT: t10: ch,glue = CopyToReg t0, Register:i64 $rax, t7 ; WIN-NEXT: t11: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t10, t10:1 ; WIN-EMPTY: +; +; ASM-LABEL: i64_test: +; ASM: # %bb.0: +; ASM-NEXT: movq %rdi, %rax +; ASM-NEXT: addq -{{[0-9]+}}(%rsp), %rax +; ASM-NEXT: retq %loc = alloca i64 %j = load i64, i64 * %loc %r = add i64 %i, %j @@ -46,6 +53,12 @@ ; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8 ; WIN-NEXT: t12: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t11, t11:1 ; WIN-EMPTY: +; +; ASM-LABEL: i32_test: +; ASM: # %bb.0: +; ASM-NEXT: movl %edi, %eax +; ASM-NEXT: addl -{{[0-9]+}}(%rsp), %eax +; ASM-NEXT: retq %loc = alloca i32 %j = load i32, i32 * %loc %r = add i32 %i, %j @@ -76,6 +89,12 @@ ; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8 ; WIN-NEXT: t12: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t11, t11:1 ; WIN-EMPTY: +; +; ASM-LABEL: i16_test: +; ASM: # %bb.0: +; ASM-NEXT: addw -{{[0-9]+}}(%rsp), %di +; ASM-NEXT: movzwl %di, %eax +; ASM-NEXT: retq %loc = alloca i16 %j = load i16, i16 * %loc %r = add i16 %i, %j @@ -106,6 +125,12 @@ ; WIN-NEXT: t11: ch,glue = CopyToReg t0, Register:i64 $rax, t8 ; WIN-NEXT: t12: ch = RET TargetConstant:i32<0>, Register:i64 $rax, t11, t11:1 ; WIN-EMPTY: +; +; ASM-LABEL: i8_test: +; ASM: # %bb.0: +; ASM-NEXT: addb -{{[0-9]+}}(%rsp), %dil +; ASM-NEXT: movzbl %dil, %eax +; ASM-NEXT: retq %loc = alloca i8 %j = load i8, i8 * %loc %r = add i8 %i, %j diff --git a/llvm/utils/update_llc_test_checks.py b/llvm/utils/update_llc_test_checks.py --- a/llvm/utils/update_llc_test_checks.py +++ b/llvm/utils/update_llc_test_checks.py @@ -79,12 +79,6 @@ if m: march_in_cmd = m.groups()[0] - m = common.DEBUG_ONLY_ARG_RE.search(llc_cmd) - if m and m.groups()[0] == 'isel': - from UpdateTestChecks import isel as output_type - else: - from UpdateTestChecks import asm as output_type - common.verify_filecheck_prefixes(filecheck_cmd) if llc_tool not in LLC_LIKE_TOOLS: common.warn('Skipping non-llc RUN line: ' + l) @@ -135,6 +129,11 @@ if not triple: triple = common.get_triple_from_march(march_in_cmd) + m = common.DEBUG_ONLY_ARG_RE.search(llc_args) + if m and m.groups()[0] == 'isel': + from UpdateTestChecks import isel as output_type + else: + from UpdateTestChecks import asm as output_type scrubber, function_re = output_type.get_run_handler(triple) builder.process_run_line(function_re, scrubber, raw_tool_output, prefixes, True) builder.processed_prefixes(prefixes)