diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp --- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp @@ -8444,6 +8444,7 @@ case Instruction::URem: case Instruction::Xor: case Instruction::ZExt: + case Instruction::Freeze: return true; } return false; @@ -9367,6 +9368,17 @@ break; } + case Instruction::Freeze: { + State.ILV->setDebugLocFromInst(&I); + + for (unsigned Part = 0; Part < State.UF; ++Part) { + Value *Op = State.get(getOperand(0), Part); + + Value *Freeze = Builder.CreateFreeze(Op); + State.set(this, Freeze, Part); + } + break; + } case Instruction::ICmp: case Instruction::FCmp: { // Widen compares. Generate vector compares. diff --git a/llvm/test/Transforms/LoopVectorize/vector-freeze.ll b/llvm/test/Transforms/LoopVectorize/vector-freeze.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/LoopVectorize/vector-freeze.ll @@ -0,0 +1,26 @@ +; RUN: opt -loop-vectorize -force-vector-width=16 -force-vector-interleave=1 -S < %s | FileCheck %s +; RUN: opt -loop-vectorize -scalable-vectorization=on -force-target-supports-scalable-vectors=true -force-vector-width=16 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=SVE + +define i64 @test(ptr noalias readonly %addr) { +; CHECK-LABEL: @test( +; CHECK: vector.body: +; CHECK: freeze <16 x i64> + +; SVE-LABEL: @test( +; SVE: vector.body: +; SVE: freeze + +entry: + br label %loop + +exit: + ret i64 %tmp4 + +loop: + %tmp3 = phi ptr [ %tmp6, %loop ], [ %addr, %entry ] + %tmp4 = freeze i64 0 + %tmp5 = add i64 0, 0 + %tmp6 = getelementptr inbounds ptr, ptr %tmp3, i64 1 + %tmp7 = icmp eq ptr %tmp6, null + br i1 %tmp7, label %exit, label %loop +}