Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -8423,6 +8423,7 @@
     case Instruction::URem:
     case Instruction::Xor:
     case Instruction::ZExt:
+    case Instruction::Freeze:
       return true;
     }
     return false;
@@ -9346,6 +9347,17 @@
 
     break;
   }
+  case Instruction::Freeze: {
+    State.ILV->setDebugLocFromInst(&I);
+
+    for (unsigned Part = 0; Part < State.UF; ++Part) {
+
+      Value *Op = State.get(getOperand(0), Part);
+      Value *Freeze = Builder.CreateFreeze(Op);
+      State.set(this, Freeze, Part);
+    }
+    break;
+  }
   case Instruction::ICmp:
   case Instruction::FCmp: {
     // Widen compares. Generate vector compares.
Index: llvm/test/Transforms/LoopVectorize/AArch64/vector-freeze.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LoopVectorize/AArch64/vector-freeze.ll
@@ -0,0 +1,37 @@
+; RUN: opt -loop-vectorize -S < %s | FileCheck %s
+; RUN: opt -loop-vectorize -mtriple aarch64-linux-gnu -mattr=+sve -S < %s | FileCheck %s --check-prefix=SVE
+
+define void @test(i8* noalias readonly %addr) {
+; CHECK-LABEL: @test(
+; CHECK:       vector.body:
+; CHECK:       freeze <4 x i8>
+;
+; SVE-LABEL: @test(
+; SVE:       vector.body:
+; SVE:       freeze <vscale x 16 x i8>
+
+for.body.preheader:
+  br label %for.body
+
+for.body:                                         ; preds = %if.end, %for.body.preheader
+  %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %if.end ]
+  %arrayidx = getelementptr inbounds i8, i8* %addr, i64 %indvars.iv
+  %0 = load i8, i8* %arrayidx, align 1
+  br i1 false, label %if.end, label %lor.lhs.false
+
+lor.lhs.false:                                    ; preds = %for.body
+  %.fr = freeze i8 %0
+  %cmp = icmp eq i8 %.fr, 0
+  br i1 %cmp, label %if.end, label %switch.early.test
+
+switch.early.test:                                ; preds = %lor.lhs.false
+  br label %if.end
+
+if.end:                                           ; preds = %switch.early.test, %lor.lhs.false, %for.body
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+  %exitcond.not = icmp eq i64 %indvars.iv.next, 0
+  br i1 %exitcond.not, label %for.end.loopexit, label %for.body
+
+for.end.loopexit:                                 ; preds = %if.end
+  ret void
+}