diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -40,6 +40,10 @@
   return STI->getFeatureBits()[Mips::FeatureMicroMips];
 }
 
+static bool isMips32r6(const MCSubtargetInfo *STI) {
+  return STI->getFeatureBits()[Mips::FeatureMips32r6];
+}
+
 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
     : MCTargetStreamer(S), GPReg(Mips::GP), ModuleDirectiveAllowed(true) {
   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
@@ -279,10 +283,18 @@
 
 void MipsTargetStreamer::emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc,
                                             const MCSubtargetInfo *STI) {
-  if (hasShortDelaySlot)
-    emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
-  else
-    emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
+  // The default case of `nop` is `sll $zero, $zero, 0`.
+  unsigned Opc = Mips::SLL;
+  if (isMicroMips(STI) && hasShortDelaySlot) {
+    Opc = isMips32r6(STI) ? Mips::MOVE16_MMR6 : Mips::MOVE16_MM;
+    emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI);
+    return;
+  }
+
+  if (isMicroMips(STI))
+    Opc = isMips32r6(STI) ? Mips::SLL_MMR6 : Mips::SLL_MM;
+
+  emitRRI(Opc, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
 }
 
 void MipsTargetStreamer::emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI) {
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
--- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td
@@ -1325,7 +1325,6 @@
                                      II_DIVU, 0, 1, 1>, ISA_MIPS1_NOT_32R6_64R6;
 
   def : MipsInstAlias<"wait", (WAIT_MM 0x0), 1>, ISA_MICROMIPS;
-  def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>, ISA_MICROMIPS;
   def : MipsInstAlias<"nop", (SLL_MM ZERO, ZERO, 0), 1>, ISA_MICROMIPS;
   def : MipsInstAlias<"nop", (MOVE16_MM ZERO, ZERO), 1>, ISA_MICROMIPS;
   def : MipsInstAlias<"ei", (EI_MM ZERO), 1>, ISA_MICROMIPS;
diff --git a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
--- a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
+++ b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
@@ -534,7 +534,7 @@
       }
       if (hasDelaySlot) {
         if (STI->isTargetNaCl()) {
-          BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::NOP));
+          TII->insertNop(*BalTgtMBB, Pos, DL);
         } else {
           BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
               .addReg(Mips::SP)
@@ -677,9 +677,8 @@
       //  nop
       // $fallthrough:
       //
-      MIBundleBuilder(*LongBrMBB, Pos)
-          .append(BuildMI(*MFp, DL, TII->get(Mips::J)).addMBB(TgtMBB))
-          .append(BuildMI(*MFp, DL, TII->get(Mips::NOP)));
+      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::J)).addMBB(TgtMBB);
+      TII->insertNop(*LongBrMBB, Pos, DL)->bundleWithPred();
     } else {
       // At this point, offset where we need to branch does not fit into
       // immediate field of the branch instruction and is not in the same
@@ -768,8 +767,8 @@
         if (std::next(Iit) == FI->end() ||
             std::next(Iit)->getOpcode() != Mips::NOP) {
           Changed = true;
-          MIBundleBuilder(&*I).append(
-              BuildMI(*MFp, I->getDebugLoc(), TII->get(Mips::NOP)));
+          TII->insertNop(*(I->getParent()), std::next(I), I->getDebugLoc())
+              ->bundleWithPred();
           NumInsertedNops++;
         }
       }
diff --git a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
--- a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -677,7 +677,7 @@
     // Bundle the NOP to the instruction with the delay slot.
     LLVM_DEBUG(dbgs() << DEBUG_TYPE << ": could not fill delay slot for ";
                I->dump());
-    BuildMI(MBB, std::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
+    TII->insertNop(MBB, std::next(I), I->getDebugLoc());
     MIBundleBuilder(MBB, I, std::next(I, 2));
     ++FilledSlots;
     Changed = true;
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.h b/llvm/lib/Target/Mips/MipsInstrInfo.h
--- a/llvm/lib/Target/Mips/MipsInstrInfo.h
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.h
@@ -113,6 +113,12 @@
   void insertNoop(MachineBasicBlock &MBB,
                   MachineBasicBlock::iterator MI) const override;
 
+  /// Insert an ISA appropriate `nop`.
+  // FIXME: Add support for MIPS16e.
+  MachineInstrBuilder insertNop(MachineBasicBlock &MBB,
+                                MachineBasicBlock::iterator MI,
+                                DebugLoc DL) const;
+
   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
   /// such, whenever a client has an instance of instruction info, it should
   /// always be able to get register info as well (through this method).
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -61,6 +61,19 @@
   BuildMI(MBB, MI, DL, get(Mips::NOP));
 }
 
+MachineInstrBuilder MipsInstrInfo::insertNop(MachineBasicBlock &MBB,
+                                             MachineBasicBlock::iterator MI,
+                                             DebugLoc DL) const {
+  assert(!Subtarget.inMips16Mode() &&
+         "insertNop does not support MIPS16e mode at this time");
+  const unsigned MMOpc =
+      Subtarget.hasMips32r6() ? Mips::SLL_MMR6 : Mips::SLL_MM;
+  const unsigned Opc = Subtarget.inMicroMipsMode() ? MMOpc : Mips::SLL;
+  return BuildMI(MBB, MI, DL, get(Opc), Mips::ZERO)
+      .addReg(Mips::ZERO)
+      .addImm(0);
+}
+
 MachineMemOperand *
 MipsInstrInfo::GetMemOperand(MachineBasicBlock &MBB, int FI,
                              MachineMemOperand::Flags Flags) const {
diff --git a/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts-def-use.mir b/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts-def-use.mir
--- a/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts-def-use.mir
+++ b/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts-def-use.mir
@@ -72,11 +72,11 @@
   ; CHECK:     $v0_64 = DADDiu $v0_64, 1
   ; CHECK:   }
   ; CHECK:   BNE killed renamable $at, $zero, %bb.2, implicit-def $at {
-  ; CHECK:     NOP
+  ; CHECK:     $zero = SLL $zero, 0
   ; CHECK:   }
   ; CHECK: bb.1.return:
   ; CHECK:   PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
-  ; CHECK:     NOP
+  ; CHECK:     $zero = SLL $zero, 0
   ; CHECK:   }
   ; CHECK: bb.2.err:
   bb.0.entry:
diff --git a/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir b/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir
--- a/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir
+++ b/llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir
@@ -95,15 +95,15 @@
   ; CHECK:     $sp_64 = DADDiu $sp_64, 16
   ; CHECK:   }
   ; CHECK:   BEQ64 renamable $a0_64, $zero_64, %bb.2, implicit-def $at {
-  ; CHECK:     NOP
+  ; CHECK:     $zero = SLL $zero, 0
   ; CHECK:   }
   ; CHECK: bb.1.if.then:
   ; CHECK:   successors: %bb.3(0x80000000)
   ; CHECK:   JAL @func_a, csr_n64, implicit-def dead $ra, implicit $a0_64, implicit-def $sp, implicit-def $v0_64 {
-  ; CHECK:     NOP
+  ; CHECK:     $zero = SLL $zero, 0
   ; CHECK:   }
   ; CHECK:   J %bb.3, implicit-def dead $at {
-  ; CHECK:     NOP
+  ; CHECK:     $zero = SLL $zero, 0
   ; CHECK:   }
   ; CHECK: bb.2.if.else:
   ; CHECK:   successors: %bb.3(0x80000000)
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromips.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromips.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromips.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromips.mir
@@ -73,12 +73,12 @@
   ; MM:   successors: %bb.2(0x50000000), %bb.1(0x30000000)
   ; MM:   FCMP_D32_MM killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
   ; MM:   BC1F_MM $fcc0, %bb.2, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1.entry:
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.if.then:
   ; MM:   INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -92,7 +92,7 @@
   ; PIC:   successors: %bb.3(0x50000000), %bb.1(0x30000000)
   ; PIC:   FCMP_D32_MM killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
   ; PIC:   BC1F_MM $fcc0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -173,7 +173,7 @@
   ; MM:   successors: %bb.2(0x30000000), %bb.1(0x50000000)
   ; MM:   FCMP_D32_MM killed renamable $d6, killed renamable $d7, 19, implicit-def $fcc0
   ; MM:   BC1F_MM killed $fcc0, %bb.1, implicit-def dead $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1.return:
   ; MM:   $v0 = LI16_MM 1
@@ -187,7 +187,7 @@
   ; PIC:   successors: %bb.2(0x30000000), %bb.1(0x50000000)
   ; PIC:   FCMP_D32_MM killed renamable $d6, killed renamable $d7, 19, implicit-def $fcc0
   ; PIC:   BC1F_MM killed $fcc0, %bb.1, implicit-def dead $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1.return:
   ; PIC:   $v0 = LI16_MM 1
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mips.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mips.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mips.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mips.mir
@@ -72,12 +72,12 @@
   ; MIPS:   successors: %bb.2(0x50000000), %bb.1(0x30000000)
   ; MIPS:   FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
   ; MIPS:   BC1F $fcc0, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1.entry:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.if.then:
   ; MIPS:   INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -93,7 +93,7 @@
   ; PIC:   successors: %bb.3(0x50000000), %bb.1(0x30000000)
   ; PIC:   FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
   ; PIC:   BC1F $fcc0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -176,12 +176,12 @@
   ; MIPS:   successors: %bb.2(0x50000000), %bb.1(0x30000000)
   ; MIPS:   FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
   ; MIPS:   BC1T $fcc0, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1.entry:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.if.then:
   ; MIPS:   INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -197,7 +197,7 @@
   ; PIC:   successors: %bb.3(0x50000000), %bb.1(0x30000000)
   ; PIC:   FCMP_D32 killed renamable $d6, killed renamable $d7, 2, implicit-def $fcc0
   ; PIC:   BC1T $fcc0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mipsr6.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mipsr6.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mipsr6.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mipsr6.mir
@@ -74,7 +74,7 @@
   ; R6:   successors: %bb.2(0x50000000), %bb.1(0x30000000)
   ; R6:   $f0 = CMP_EQ_D killed $d12_64, killed $d14_64
   ; R6:   BC1NEZ $d0_64, %bb.2 {
-  ; R6:     NOP
+  ; R6:     $zero = SLL $zero, 0
   ; R6:   }
   ; R6: bb.1.entry:
   ; R6:   successors: %bb.3(0x80000000)
@@ -93,7 +93,7 @@
   ; PIC:   successors: %bb.3(0x50000000), %bb.1(0x30000000)
   ; PIC:   $f0 = CMP_EQ_D killed $d12_64, killed $d14_64
   ; PIC:   BC1NEZ $d0_64, %bb.3 {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -174,7 +174,7 @@
   ; R6:   successors: %bb.2(0x50000000), %bb.1(0x30000000)
   ; R6:   $f0 = CMP_EQ_D killed $d12_64, killed $d14_64
   ; R6:   BC1EQZ $d0_64, %bb.2 {
-  ; R6:     NOP
+  ; R6:     $zero = SLL $zero, 0
   ; R6:   }
   ; R6: bb.1.entry:
   ; R6:   successors: %bb.3(0x80000000)
@@ -193,7 +193,7 @@
   ; PIC:   successors: %bb.3(0x50000000), %bb.1(0x30000000)
   ; PIC:   $f0 = CMP_EQ_D killed $d12_64, killed $d14_64
   ; PIC:   BC1EQZ $d0_64, %bb.3 {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-microMIPS.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-microMIPS.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-microMIPS.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-microMIPS.mir
@@ -137,7 +137,7 @@
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -225,12 +225,12 @@
   ; MM:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MM:   renamable $at = ANDi killed renamable $a0, 1
   ; MM:   BLTZ_MM $at, %bb.2, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -242,7 +242,7 @@
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BLTZ_MM $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -320,12 +320,12 @@
   ; MM:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MM:   renamable $at = ANDi killed renamable $a0, 1
   ; MM:   BLEZ_MM $at, %bb.2, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -337,7 +337,7 @@
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BLEZ_MM $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -415,12 +415,12 @@
   ; MM:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MM:   renamable $at = ANDi killed renamable $a0, 1
   ; MM:   BGTZ_MM $at, %bb.2, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -432,7 +432,7 @@
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BGTZ_MM $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -510,12 +510,12 @@
   ; MM:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MM:   renamable $at = ANDi killed renamable $a0, 1
   ; MM:   BGEZ_MM $at, %bb.2, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -527,7 +527,7 @@
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BGEZ_MM $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -608,7 +608,7 @@
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -696,12 +696,12 @@
   ; MM:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MM:   renamable $v0 = ANDi killed renamable $a0, 1
   ; MM:   BNEZ16_MM $v0, %bb.2, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -713,7 +713,7 @@
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $v0 = ANDi killed renamable $a0, 1
   ; PIC:   BNEZ16_MM $v0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -791,12 +791,12 @@
   ; MM:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MM:   renamable $v0 = ANDi killed renamable $a0, 1
   ; MM:   BEQZ16_MM $v0, %bb.2, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.1 (%ir-block.0):
   ; MM:   successors: %bb.3(0x80000000)
   ; MM:   J %bb.3, implicit-def $at {
-  ; MM:     NOP
+  ; MM:     $zero = SLL_MM $zero, 0
   ; MM:   }
   ; MM: bb.2.iftrue:
   ; MM:   successors: %bb.3(0x80000000)
@@ -808,7 +808,7 @@
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $v0 = ANDi killed renamable $a0, 1
   ; PIC:   BEQZ16_MM $v0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL_MM $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64.mir
@@ -117,12 +117,12 @@
   ; MIPS64: bb.0 (%ir-block.0):
   ; MIPS64:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS64:   BNE64 $a0_64, $zero_64, %bb.2, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 131068", 1
@@ -137,7 +137,7 @@
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   BNE64 $a0_64, $zero_64, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -219,12 +219,12 @@
   ; MIPS64: bb.0 (%ir-block.0):
   ; MIPS64:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS64:   BEQ64 $a0_64, $zero_64, %bb.2, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 131068", 1
@@ -239,7 +239,7 @@
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   BEQ64 $a0_64, $zero_64, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -321,12 +321,12 @@
   ; MIPS64: bb.0 (%ir-block.0):
   ; MIPS64:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS64:   BLTZ64 $a0_64, %bb.2, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 131068", 1
@@ -341,7 +341,7 @@
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   BLTZ64 $a0_64, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -423,12 +423,12 @@
   ; MIPS64: bb.0 (%ir-block.0):
   ; MIPS64:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS64:   BLEZ64 $a0_64, %bb.2, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 131068", 1
@@ -443,7 +443,7 @@
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   BLEZ64 $a0_64, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -525,12 +525,12 @@
   ; MIPS64: bb.0 (%ir-block.0):
   ; MIPS64:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS64:   BGTZ64 $a0_64, %bb.2, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 131068", 1
@@ -545,7 +545,7 @@
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   BGTZ64 $a0_64, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -627,12 +627,12 @@
   ; MIPS64: bb.0 (%ir-block.0):
   ; MIPS64:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS64:   BGEZ64 $a0_64, %bb.2, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 131068", 1
@@ -647,7 +647,7 @@
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   BGEZ64 $a0_64, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64r6.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64r6.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64r6.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64r6.mir
@@ -346,7 +346,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -444,7 +444,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -542,7 +542,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -640,7 +640,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -738,7 +738,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -836,7 +836,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -934,7 +934,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -1032,7 +1032,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -1130,7 +1130,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
@@ -1228,7 +1228,7 @@
   ; MIPS64: bb.1 (%ir-block.0):
   ; MIPS64:   successors: %bb.3(0x80000000)
   ; MIPS64:   J %bb.3, implicit-def $at {
-  ; MIPS64:     NOP
+  ; MIPS64:     $zero = SLL $zero, 0
   ; MIPS64:   }
   ; MIPS64: bb.2.iftrue:
   ; MIPS64:   INLINEASM &".space 831068", 1
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-int.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-int.mir
@@ -112,26 +112,26 @@
   ; MIPS:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS:   renamable $at = ANDi killed renamable $a0, 1
   ; MIPS:   BNE $at, $zero, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1 (%ir-block.0):
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.iftrue:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   INLINEASM &".space 131068", 1
   ; MIPS: bb.3.tail:
   ; MIPS:   PseudoReturn undef $ra {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; PIC-LABEL: name: expand_BEQ
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BNE $at, $zero, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -153,7 +153,7 @@
   ; PIC:   INLINEASM &".space 131068", 1
   ; PIC: bb.4.tail:
   ; PIC:   PseudoReturn undef $ra {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   bb.0 (%ir-block.0):
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
@@ -211,26 +211,26 @@
   ; MIPS:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS:   renamable $at = ANDi killed renamable $a0, 1
   ; MIPS:   BLTZ $at, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1 (%ir-block.0):
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.iftrue:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   INLINEASM &".space 131068", 1
   ; MIPS: bb.3.tail:
   ; MIPS:   PseudoReturn undef $ra {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; PIC-LABEL: name: expand_BGEZ
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BLTZ $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -252,7 +252,7 @@
   ; PIC:   INLINEASM &".space 131068", 1
   ; PIC: bb.4.tail:
   ; PIC:   PseudoReturn undef $ra {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   bb.0 (%ir-block.0):
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
@@ -310,26 +310,26 @@
   ; MIPS:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS:   renamable $at = ANDi killed renamable $a0, 1
   ; MIPS:   BLEZ $at, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1 (%ir-block.0):
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.iftrue:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   INLINEASM &".space 131068", 1
   ; MIPS: bb.3.tail:
   ; MIPS:   PseudoReturn undef $ra {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; PIC-LABEL: name: expand_BGTZ
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BLEZ $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -351,7 +351,7 @@
   ; PIC:   INLINEASM &".space 131068", 1
   ; PIC: bb.4.tail:
   ; PIC:   PseudoReturn undef $ra {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   bb.0 (%ir-block.0):
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
@@ -409,26 +409,26 @@
   ; MIPS:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS:   renamable $at = ANDi killed renamable $a0, 1
   ; MIPS:   BGTZ $at, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1 (%ir-block.0):
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.iftrue:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   INLINEASM &".space 131068", 1
   ; MIPS: bb.3.tail:
   ; MIPS:   PseudoReturn undef $ra {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; PIC-LABEL: name: expand_BLEZ
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BGTZ $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -450,7 +450,7 @@
   ; PIC:   INLINEASM &".space 131068", 1
   ; PIC: bb.4.tail:
   ; PIC:   PseudoReturn undef $ra {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   bb.0 (%ir-block.0):
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
@@ -508,26 +508,26 @@
   ; MIPS:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS:   renamable $at = ANDi killed renamable $a0, 1
   ; MIPS:   BGEZ $at, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1 (%ir-block.0):
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.iftrue:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   INLINEASM &".space 131068", 1
   ; MIPS: bb.3.tail:
   ; MIPS:   PseudoReturn undef $ra {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; PIC-LABEL: name: expand_BLTZ
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BGEZ $at, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -549,7 +549,7 @@
   ; PIC:   INLINEASM &".space 131068", 1
   ; PIC: bb.4.tail:
   ; PIC:   PseudoReturn undef $ra {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   bb.0 (%ir-block.0):
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
@@ -607,26 +607,26 @@
   ; MIPS:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; MIPS:   renamable $at = ANDi killed renamable $a0, 1
   ; MIPS:   BEQ $at, $zero, %bb.2, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.1 (%ir-block.0):
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   J %bb.3, implicit-def $at {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; MIPS: bb.2.iftrue:
   ; MIPS:   successors: %bb.3(0x80000000)
   ; MIPS:   INLINEASM &".space 131068", 1
   ; MIPS: bb.3.tail:
   ; MIPS:   PseudoReturn undef $ra {
-  ; MIPS:     NOP
+  ; MIPS:     $zero = SLL $zero, 0
   ; MIPS:   }
   ; PIC-LABEL: name: expand_BNE
   ; PIC: bb.0 (%ir-block.0):
   ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
   ; PIC:   renamable $at = ANDi killed renamable $a0, 1
   ; PIC:   BEQ $at, $zero, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1 (%ir-block.0):
   ; PIC:   successors: %bb.2(0x80000000)
@@ -648,7 +648,7 @@
   ; PIC:   INLINEASM &".space 131068", 1
   ; PIC: bb.4.tail:
   ; PIC:   PseudoReturn undef $ra {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   bb.0 (%ir-block.0):
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
diff --git a/llvm/test/CodeGen/Mips/longbranch/branch-limits-msa.mir b/llvm/test/CodeGen/Mips/longbranch/branch-limits-msa.mir
--- a/llvm/test/CodeGen/Mips/longbranch/branch-limits-msa.mir
+++ b/llvm/test/CodeGen/Mips/longbranch/branch-limits-msa.mir
@@ -263,12 +263,12 @@
   ; MSA:   renamable $w0 = SHF_B killed renamable $w0, 27
   ; MSA:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; MSA:   BNZ_B $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -288,7 +288,7 @@
   ; PIC:   renamable $w0 = SHF_B killed renamable $w0, 27
   ; PIC:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; PIC:   BNZ_B $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -379,12 +379,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   renamable $w0 = SHF_H killed renamable $w0, 27
   ; MSA:   BNZ_H $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -403,7 +403,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   renamable $w0 = SHF_H killed renamable $w0, 27
   ; PIC:   BNZ_H $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -493,12 +493,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; MSA:   BNZ_W $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -517,7 +517,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; PIC:   BNZ_W $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -606,12 +606,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   BNZ_D $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -629,7 +629,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   BNZ_D $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -717,12 +717,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   BNZ_V $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -740,7 +740,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   BNZ_V $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -830,12 +830,12 @@
   ; MSA:   renamable $w0 = SHF_B killed renamable $w0, 27
   ; MSA:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; MSA:   BZ_B $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -855,7 +855,7 @@
   ; PIC:   renamable $w0 = SHF_B killed renamable $w0, 27
   ; PIC:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; PIC:   BZ_B $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -946,12 +946,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   renamable $w0 = SHF_H killed renamable $w0, 27
   ; MSA:   BZ_H $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -970,7 +970,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   renamable $w0 = SHF_H killed renamable $w0, 27
   ; PIC:   BZ_H $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -1060,12 +1060,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; MSA:   BZ_W $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -1084,7 +1084,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   renamable $w0 = SHF_W killed renamable $w0, 177
   ; PIC:   BZ_W $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -1173,12 +1173,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   BZ_D $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -1196,7 +1196,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   BZ_D $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)
@@ -1284,12 +1284,12 @@
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; MSA:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; MSA:   BZ_V $w0, %bb.2, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.1.entry:
   ; MSA:   successors: %bb.3(0x80000000)
   ; MSA:   J %bb.3, implicit-def $at {
-  ; MSA:     NOP
+  ; MSA:     $zero = SLL $zero, 0
   ; MSA:   }
   ; MSA: bb.2.if.then:
   ; MSA:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
@@ -1307,7 +1307,7 @@
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0
   ; PIC:   renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1
   ; PIC:   BZ_V $w0, %bb.3, implicit-def $at {
-  ; PIC:     NOP
+  ; PIC:     $zero = SLL $zero, 0
   ; PIC:   }
   ; PIC: bb.1.entry:
   ; PIC:   successors: %bb.2(0x80000000)