Index: include/llvm/Target/TargetInstrInfo.h
===================================================================
--- include/llvm/Target/TargetInstrInfo.h
+++ include/llvm/Target/TargetInstrInfo.h
@@ -61,6 +61,10 @@
 
   virtual ~TargetInstrInfo();
 
+  static bool isBuiltinOpcode(unsigned Opc) {
+    return Opc < TargetOpcode::BUILTIN_OP_END;
+  }
+
   /// Given a machine instruction descriptor, returns the register
   /// class constraint for OpNum, or NULL.
   const TargetRegisterClass *getRegClass(const MCInstrDesc &TID,
Index: include/llvm/Target/TargetOpcodes.h
===================================================================
--- include/llvm/Target/TargetOpcodes.h
+++ include/llvm/Target/TargetOpcodes.h
@@ -128,6 +128,10 @@
   /// "zero cost" null checks in managed languages by allowing LLVM to fold
   /// comparisons into existing memory operations.
   FAULTING_LOAD_OP = 22,
+
+  /// BUILTIN_OP_END - This must be the last enum value in this list.
+  /// The target-specific post-isel opcode values start here.
+  BUILTIN_OP_END = FAULTING_LOAD_OP,
 };
 } // end namespace TargetOpcode
 } // end namespace llvm