Index: flang/test/Integration/OpenMPLLVM/threadprivate-char-array-chararray.f90
===================================================================
--- /dev/null
+++ flang/test/Integration/OpenMPLLVM/threadprivate-char-array-chararray.f90
@@ -0,0 +1,58 @@
+! This test checks lowering of OpenMP Threadprivate Directive.
+! Test for character, array, and character array.
+
+!RUN: %flang_fc1 -emit-llvm -fopenmp %s -o - | FileCheck %s --check-prefix=LLVMIR
+
+module test
+  character :: x
+  integer :: y(5)
+  character(5) :: z(5)
+
+  !$omp threadprivate(x, y, z)
+
+!LLVMIR-DAG: @_QMtestEx = global [1 x i8] undef
+!LLVMIR-DAG: @_QMtestEy = global [5 x i32] undef
+!LLVMIR-DAG: @_QMtestEz = global [5 x [5 x i8]] undef
+
+!LLVMIR-DAG: @_QMtestEx.cache = common global i8** null
+!LLVMIR-DAG: @_QMtestEy.cache = common global i8** null
+!LLVMIR-DAG: @_QMtestEz.cache = common global i8** null
+
+contains
+  subroutine sub()
+! CHECK-LABEL: @_QMtestPsub()
+!LLVMIR:  [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE0:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0:[0-9]+]], i32 [[TMP0:%.*]], i8* getelementptr inbounds ([1 x i8], [1 x i8]* @_QMtestEx, i32 0, i32 0), i64 1, i8*** @_QMtestEx.cache)
+!LLVMIR-DAG:  [[LOAD0:%.*]] = bitcast i8* [[CACHE0]] to [1 x i8]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* bitcast ([5 x i32]* @_QMtestEy to i8*), i64 20, i8*** @_QMtestEy.cache)
+!LLVMIR-DAG:  [[LOAD1:%.*]] = bitcast i8* [[CACHE1]] to [5 x i32]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2:%.*]], i8* getelementptr inbounds ([5 x [5 x i8]], [5 x [5 x i8]]* @_QMtestEz, i32 0, i32 0, i32 0), i64 25, i8*** @_QMtestEz.cache)
+!LLVMIR-DAG:  [[LOAD2:%.*]] = bitcast i8* [[CACHE2]] to [5 x [5 x i8]]*, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = bitcast [1 x i8]* [[LOAD0]] to i8*, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = insertvalue { [5 x i32]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [5 x i32]* undef, i64 4, i32 20180515, i8 1, i8 9, i8 0, i8 0
+!LLVMIR-DAG:  {{.*}} = insertvalue { [5 x [5 x i8]]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [5 x [5 x i8]]* undef, i64 5, i32 20180515, i8 1, i8 40, i8 0, i8 0
+    print *, x, y, z
+
+    !$omp parallel
+      print *, x, y, z
+    !$omp end parallel
+
+    print *, x, y, z
+
+! LLVMIR-LABEL: omp.par.region{{.*}}
+!LLVMIR:  [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE0:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0:[0-9]+]], i32 [[TMP0:%.*]], i8* getelementptr inbounds ([1 x i8], [1 x i8]* @_QMtestEx, i32 0, i32 0), i64 1, i8*** @_QMtestEx.cache)
+!LLVMIR-DAG:  [[LOAD0:%.*]] = bitcast i8* [[CACHE0]] to [1 x i8]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* bitcast ([5 x i32]* @_QMtestEy to i8*), i64 20, i8*** @_QMtestEy.cache)
+!LLVMIR-DAG:  [[LOAD1:%.*]] = bitcast i8* [[CACHE1]] to [5 x i32]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2:%.*]], i8* getelementptr inbounds ([5 x [5 x i8]], [5 x [5 x i8]]* @_QMtestEz, i32 0, i32 0, i32 0), i64 25, i8*** @_QMtestEz.cache)
+!LLVMIR-DAG:  [[LOAD2:%.*]] = bitcast i8* [[CACHE2]] to [5 x [5 x i8]]*, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = bitcast [1 x i8]* [[LOAD0]] to i8*, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = insertvalue { [5 x i32]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [5 x i32]* undef, i64 4, i32 20180515, i8 1, i8 9, i8 0, i8 0
+!LLVMIR-DAG:  {{.*}} = insertvalue { [5 x [5 x i8]]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [5 x [5 x i8]]* undef, i64 5, i32 20180515, i8 1, i8 40, i8 0, i8 0
+  end
+end
Index: flang/test/Integration/OpenMPLLVM/threadprivate-commonblock.f90
===================================================================
--- /dev/null
+++ flang/test/Integration/OpenMPLLVM/threadprivate-commonblock.f90
@@ -0,0 +1,78 @@
+! This test checks lowering of OpenMP Threadprivate Directive.
+! Test for common block.
+
+!RUN: %flang_fc1 -emit-llvm -fopenmp %s -o - | FileCheck %s --check-prefix=LLVMIR
+
+module test
+  integer:: a
+  real :: b(2)
+  complex, pointer :: c, d(:)
+  character(5) :: e, f(2)
+  common /blk/ a, b, c, d, e, f
+
+  !$omp threadprivate(/blk/)
+
+!LLVMIR-DAG: @_QBblk = common global [103 x i8] zeroinitializer
+
+!LLVMIR-DAG: @_QBblk.cache = common global i8** null
+
+contains
+  subroutine sub()
+!LLVMIR:  [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR:  [[TMP5:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0]], i32 [[TMP0]], i8* getelementptr inbounds ([103 x i8], [103 x i8]* @_QBblk, i32 0, i32 0), i64 103, i8*** @_QBblk.cache)
+!LLVMIR:  [[TMP6:%.*]] = bitcast i8* [[TMP5]] to [103 x i8]*, !dbg !{{.*}}
+!LLVMIR:  [[TMP7:%.*]] = bitcast [103 x i8]* [[TMP6]] to i8*, !dbg !{{.*}}
+!LLVMIR:  [[TMP8:%.*]] = getelementptr i8, i8* [[TMP7]], i64 0, !dbg !{{.*}}
+!LLVMIR:  [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32*, !dbg !{{.*}}
+!LLVMIR:  [[TMP10:%.*]] = getelementptr i8, i8* [[TMP7]], i64 4, !dbg !{{.*}}
+!LLVMIR:  [[TMP11:%.*]] = bitcast i8* [[TMP10]] to [2 x float]*, !dbg !{{.*}}
+!LLVMIR:  [[TMP12:%.*]] = getelementptr i8, i8* [[TMP7]], i64 16, !dbg !{{.*}}
+!LLVMIR:  [[TMP13:%.*]] = bitcast i8* [[TMP12]] to { { float, float }*, i64, i32, i8, i8, i8, i8 }*, !dbg !{{.*}}
+!LLVMIR:  [[TMP14:%.*]] = getelementptr i8, i8* [[TMP7]], i64 40, !dbg !{{.*}}
+!LLVMIR:  [[TMP15:%.*]] = bitcast i8* [[TMP14]] to { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }*, !dbg !{{.*}}
+!LLVMIR:  [[TMP16:%.*]] = getelementptr i8, i8* [[TMP7]], i64 88, !dbg !{{.*}}
+!LLVMIR:  [[TMP17:%.*]] = bitcast i8* [[TMP16]] to [5 x i8]*, !dbg !{{.*}}
+!LLVMIR:  [[TMP18:%.*]] = getelementptr i8, i8* [[TMP7]], i64 93, !dbg !{{.*}}
+!LLVMIR:  [[TMP19:%.*]] = bitcast i8* [[TMP18]] to [2 x [5 x i8]]*, !dbg !{{.*}}
+!LLVMIR:  %{{.*}} = load i32, i32* [[TMP9]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = insertvalue { [2 x float]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [2 x float]* undef, i64 4, i32 20180515, i8 1, i8 27, i8 0, i8 0
+!LLVMIR-DAG:  %{{.*}} = getelementptr { { float, float }*, i64, i32, i8, i8, i8, i8 }, { { float, float }*, i64, i32, i8, i8, i8, i8 }* [[TMP13]], i32 0, i32 0, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = getelementptr { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }* [[TMP15]], i32 0, i32 7, i64 0, i32 0, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = bitcast [5 x i8]* [[TMP17]] to i8*, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = insertvalue { [2 x [5 x i8]]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [2 x [5 x i8]]* undef, i64 5, i32 20180515, i8 1, i8 40, i8 0, i8 0
+    print *, a, b, c, d, e, f
+
+    !$omp parallel
+      print *, a, b, c, d, e, f
+    !$omp end parallel
+
+!LLVMIR-DAG:  %{{.*}} = load i32, i32* [[TMP9]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = getelementptr { { float, float }*, i64, i32, i8, i8, i8, i8 }, { { float, float }*, i64, i32, i8, i8, i8, i8 }* [[TMP13]], i32 0, i32 0, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = getelementptr { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }* [[TMP15]], i32 0, i32 7, i64 0, i32 0, !dbg !{{.*}}
+    print *, a, b, c, d, e, f
+
+! LLVMIR-LABEL: omp.par.region{{.*}}
+!LLVMIR:  [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR:  [[TMP5:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0]], i32 [[TMP0]], i8* getelementptr inbounds ([103 x i8], [103 x i8]* @_QBblk, i32 0, i32 0), i64 103, i8*** @_QBblk.cache)
+!LLVMIR-DAG:  [[TMP6:%.*]] = bitcast i8* [[TMP5]] to [103 x i8]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP7:%.*]] = bitcast [103 x i8]* [[TMP6]] to i8*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP8:%.*]] = getelementptr i8, i8* [[TMP7]], i64 0, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP9:%.*]] = bitcast i8* [[TMP8:%.*]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP10:%.*]] = getelementptr i8, i8* [[TMP7]], i64 4, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP11:%.*]] = bitcast i8* [[TMP10:%.*]] to [2 x float]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP12:%.*]] = getelementptr i8, i8* [[TMP7]], i64 16, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP13:%.*]] = bitcast i8* [[TMP12:%.*]] to { { float, float }*, i64, i32, i8, i8, i8, i8 }*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP14:%.*]] = getelementptr i8, i8* [[TMP7]], i64 40, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP15:%.*]] = bitcast i8* [[TMP14:%.*]] to { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP16:%.*]] = getelementptr i8, i8* [[TMP7]], i64 88, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP17:%.*]] = bitcast i8* [[TMP16:%.*]] to [5 x i8]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP18:%.*]] = getelementptr i8, i8* [[TMP7]], i64 93, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP19:%.*]] = bitcast i8* [[TMP18:%.*]] to [2 x [5 x i8]]*, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = load i32, i32* [[TMP9]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = insertvalue { [2 x float]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [2 x float]* undef, i64 4, i32 20180515, i8 1, i8 27, i8 0, i8 0
+!LLVMIR-DAG:  %{{.*}} = getelementptr { { float, float }*, i64, i32, i8, i8, i8, i8 }, { { float, float }*, i64, i32, i8, i8, i8, i8 }* [[TMP13]], i32 0, i32 0, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = getelementptr { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, { { float, float }*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }* [[TMP15]], i32 0, i32 7, i64 0, i32 0, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = bitcast [5 x i8]* [[TMP17]] to i8*, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = insertvalue { [2 x [5 x i8]]*, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] } { [2 x [5 x i8]]* undef, i64 5, i32 20180515, i8 1, i8 40, i8 0, i8 0
+  end
+end
Index: flang/test/Integration/OpenMPLLVM/threadprivate-integer-different-kinds.f90
===================================================================
--- /dev/null
+++ flang/test/Integration/OpenMPLLVM/threadprivate-integer-different-kinds.f90
@@ -0,0 +1,92 @@
+! This test checks lowering of OpenMP Threadprivate Directive.
+! Test for variables with different kind.
+
+!REQUIRES: shell
+!RUN: %flang_fc1 -emit-llvm -fopenmp %s -o - | FileCheck %s --check-prefix=LLVMIR
+
+program test
+  integer, save :: i
+  integer(kind=1), save :: i1
+  integer(kind=2), save :: i2
+  integer(kind=4), save :: i4
+  integer(kind=8), save :: i8
+  integer(kind=16), save :: i16
+
+!LLVMIR-DAG: @_QFEi = internal global i32 undef
+!LLVMIR-DAG: @_QFEi1 = internal global i8 undef
+!LLVMIR-DAG: @_QFEi16 = internal global i128 undef
+!LLVMIR-DAG: @_QFEi2 = internal global i16 undef
+!LLVMIR-DAG: @_QFEi4 = internal global i32 undef
+!LLVMIR-DAG: @_QFEi8 = internal global i64 undef
+  !$omp threadprivate(i, i1, i2, i4, i8, i16)
+
+!LLVMIR-DAG: @_QFEi.cache = common global i8** null
+!LLVMIR-DAG: @_QFEi1.cache = common global i8** null
+!LLVMIR-DAG: @_QFEi16.cache = common global i8** null
+!LLVMIR-DAG: @_QFEi2.cache = common global i8** null
+!LLVMIR-DAG: @_QFEi4.cache = common global i8** null
+!LLVMIR-DAG: @_QFEi8.cache = common global i8** null
+
+! CHECK-LABEL: @_QQmain()
+!LLVMIR: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR-DAG: [[CACHE0:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0:[0-9]+]], i32 [[TMP0:%.*]], i8* bitcast (i32* @_QFEi to i8*), i64 4, i8*** @_QFEi.cache)
+!LLVMIR-DAG: [[LOAD0:%.*]] = bitcast i8* [[CACHE0]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG: [[CACHE1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* @_QFEi1, i64 1, i8*** @_QFEi1.cache)
+!LLVMIR-DAG: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
+!LLVMIR-DAG: [[CACHE2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2:%.*]], i8* bitcast (i16* @_QFEi2 to i8*), i64 2, i8*** @_QFEi2.cache)
+!LLVMIR-DAG: [[LOAD2:%.*]] = bitcast i8* [[CACHE2]] to i16*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
+!LLVMIR-DAG: [[CACHE3:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP3:%.*]], i8* bitcast (i32* @_QFEi4 to i8*), i64 4, i8*** @_QFEi4.cache)
+!LLVMIR-DAG: [[LOAD3:%.*]] = bitcast i8* [[CACHE3]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
+!LLVMIR-DAG: [[CACHE4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP4:%.*]], i8* bitcast (i64* @_QFEi8 to i8*), i64 8, i8*** @_QFEi8.cache)
+!LLVMIR-DAG: [[LOAD4:%.*]] = bitcast i8* [[CACHE4]] to i64*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5:[0-9]+]])
+!LLVMIR-DAG: [[CACHE5:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB5:[0-9]+]], i32 [[TMP5:%.*]], i8* bitcast (i128* @_QFEi16 to i8*), i64 16, i8*** @_QFEi16.cache)
+!LLVMIR-DAG: [[LOAD5:%.*]] = bitcast i8* [[CACHE5]] to i128*, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i32, i32* [[LOAD0]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i8, i8* [[CACHE1]], align 1, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i16, i16* [[LOAD2]], align 2, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i32, i32* [[LOAD3]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i64, i64* [[LOAD4]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i128, i128* [[LOAD5]], align 4, !dbg !{{.*}}
+  print *, i, i1, i2, i4, i8, i16
+
+  !$omp parallel
+    print *, i, i1, i2, i4, i8, i16
+  !$omp end parallel
+
+!LLVMIR-DAG: {{.*}} = load i32, i32* [[LOAD0]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i8, i8* [[CACHE1]], align 1, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i16, i16* [[LOAD2]], align 2, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i32, i32* [[LOAD3]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i64, i64* [[LOAD4]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i128, i128* [[LOAD5]], align 4, !dbg !{{.*}}
+  print *, i, i1, i2, i4, i8, i16
+
+! LLVMIR-LABEL: omp.par.region{{.*}}
+!LLVMIR: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR-DAG: [[CACHE0:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0:[0-9]+]], i32 [[TMP0:%.*]], i8* bitcast (i32* @_QFEi to i8*), i64 4, i8*** @_QFEi.cache)
+!LLVMIR-DAG: [[LOAD0:%.*]] = bitcast i8* [[CACHE0]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG: [[CACHE1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* @_QFEi1, i64 1, i8*** @_QFEi1.cache)
+!LLVMIR-DAG: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
+!LLVMIR-DAG: [[CACHE2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2:%.*]], i8* bitcast (i16* @_QFEi2 to i8*), i64 2, i8*** @_QFEi2.cache)
+!LLVMIR-DAG: [[LOAD2:%.*]] = bitcast i8* [[CACHE2]] to i16*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
+!LLVMIR-DAG: [[CACHE3:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP3:%.*]], i8* bitcast (i32* @_QFEi4 to i8*), i64 4, i8*** @_QFEi4.cache)
+!LLVMIR-DAG: [[LOAD3:%.*]] = bitcast i8* [[CACHE3]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP4:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
+!LLVMIR-DAG: [[CACHE4:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP4:%.*]], i8* bitcast (i64* @_QFEi8 to i8*), i64 8, i8*** @_QFEi8.cache)
+!LLVMIR-DAG: [[LOAD4:%.*]] = bitcast i8* [[CACHE4]] to i64*, !dbg !{{.*}}
+!LLVMIR-DAG: [[TMP5:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB5:[0-9]+]])
+!LLVMIR-DAG: [[CACHE5:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB5:[0-9]+]], i32 [[TMP5:%.*]], i8* bitcast (i128* @_QFEi16 to i8*), i64 16, i8*** @_QFEi16.cache)
+!LLVMIR-DAG: [[LOAD5:%.*]] = bitcast i8* [[CACHE5]] to i128*, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i32, i32* [[LOAD0]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i8, i8* [[CACHE1]], align 1, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i16, i16* [[LOAD2]], align 2, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i32, i32* [[LOAD3]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i64, i64* [[LOAD4]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG: {{.*}} = load i128, i128* [[LOAD5]], align 4, !dbg !{{.*}}
+end
Index: flang/test/Integration/OpenMPLLVM/threadprivate-real-logical-complex-derivedtype.f90
===================================================================
--- /dev/null
+++ flang/test/Integration/OpenMPLLVM/threadprivate-real-logical-complex-derivedtype.f90
@@ -0,0 +1,80 @@
+! This test checks lowering of OpenMP Threadprivate Directive.
+! Test for real, logical, complex, and derived type.
+
+!RUN: %flang_fc1 -emit-llvm -fopenmp %s -o - | FileCheck %s --check-prefix=LLVMIR
+
+module test
+  type my_type
+    integer :: t_i
+    real :: t_arr(5)
+  end type my_type
+  real :: x
+  complex :: y
+  logical :: z
+  type(my_type) :: t
+
+  !$omp threadprivate(x, y, z, t)
+
+!LLVMIR-DAG: %_QMtestTmy_type = type { i32, [5 x float] }
+!LLVMIR-DAG: @_QMtestEt = global %_QMtestTmy_type undef
+!LLVMIR-DAG: @_QMtestEx = global float undef
+!LLVMIR-DAG: @_QMtestEy = global { float, float } undef
+!LLVMIR-DAG: @_QMtestEz = global i32 undef
+
+!LLVMIR-DAG: @_QMtestEt.cache = common global i8** null
+!LLVMIR-DAG: @_QMtestEx.cache = common global i8** null
+!LLVMIR-DAG: @_QMtestEy.cache = common global i8** null
+!LLVMIR-DAG: @_QMtestEz.cache = common global i8** null
+
+contains
+  subroutine sub()
+! CHECK-LABEL: @_QMtestPsub()
+!LLVMIR:  [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE0:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0:[0-9]+]], i32 [[TMP0:%.*]], i8* bitcast (%_QMtestTmy_type* @_QMtestEt to i8*), i64 24, i8*** @_QMtestEt.cache)
+!LLVMIR-DAG:  [[LOAD0:%.*]] = bitcast i8* [[CACHE0]] to %_QMtestTmy_type*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* bitcast (float* @_QMtestEx to i8*), i64 4, i8*** @_QMtestEx.cache)
+!LLVMIR-DAG:  [[LOAD1:%.*]] = bitcast i8* [[CACHE1]] to float*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2:%.*]], i8* bitcast ({ float, float }* @_QMtestEy to i8*), i64 8, i8*** @_QMtestEy.cache)
+!LLVMIR-DAG:  [[LOAD2:%.*]] = bitcast i8* [[CACHE2]] to { float, float }*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE3:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP3:%.*]], i8* bitcast (i32* @_QMtestEz to i8*), i64 4, i8*** @_QMtestEz.cache)
+!LLVMIR-DAG:  [[LOAD3:%.*]] = bitcast i8* [[CACHE3]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load float, float* [[LOAD1]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load { float, float }, { float, float }* [[LOAD2]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load i32, i32* [[LOAD3]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  [[GEP0:%.*]] = getelementptr %_QMtestTmy_type, %_QMtestTmy_type* [[LOAD0]], i64 0, i32 0, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load i32, i32* [[GEP0]], align 4, !dbg !{{.*}}
+    print *, x, y, z, t%t_i
+
+    !$omp parallel
+      print *, x, y, z, t%t_i
+    !$omp end parallel
+
+!LLVMIR-DAG:  %{{.*}} = load float, float* [[LOAD1]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = load { float, float }, { float, float }* [[LOAD2]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = load i32, i32* [[LOAD3]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = load i32, i32* [[GEP0]], align 4, !dbg !{{.*}}
+    print *, x, y, z, t%t_i
+
+! LLVMIR-LABEL: omp.par.region{{.*}}
+!LLVMIR:  [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE0:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0:[0-9]+]], i32 [[TMP0:%.*]], i8* bitcast (%_QMtestTmy_type* @_QMtestEt to i8*), i64 24, i8*** @_QMtestEt.cache)
+!LLVMIR-DAG:  [[LOAD0:%.*]] = bitcast i8* [[CACHE0]] to %_QMtestTmy_type*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* bitcast (float* @_QMtestEx to i8*), i64 4, i8*** @_QMtestEx.cache)
+!LLVMIR-DAG:  [[LOAD1:%.*]] = bitcast i8* [[CACHE1]] to float*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE2:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2:%.*]], i8* bitcast ({ float, float }* @_QMtestEy to i8*), i64 8, i8*** @_QMtestEy.cache)
+!LLVMIR-DAG:  [[LOAD2:%.*]] = bitcast i8* [[CACHE2]] to { float, float }*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE3:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP3:%.*]], i8* bitcast (i32* @_QMtestEz to i8*), i64 4, i8*** @_QMtestEz.cache)
+!LLVMIR-DAG:  [[LOAD3:%.*]] = bitcast i8* [[CACHE3]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load float, float* [[LOAD1]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load { float, float }, { float, float }* [[LOAD2]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load i32, i32* [[LOAD3]], align 4, !dbg !{{.*}}
+!LLVMIR-DAG:  [[GEP0:%.*]] = getelementptr %_QMtestTmy_type, %_QMtestTmy_type* [[LOAD0]], i64 0, i32 0, !dbg !{{.*}}
+!LLVMIR-DAG:  {{.*}} = load i32, i32* [[GEP0]], align 4, !dbg !{{.*}}
+  end
+end
Index: flang/test/Integration/OpenMPLLVM/threadprivate-use-association.f90
===================================================================
--- /dev/null
+++ flang/test/Integration/OpenMPLLVM/threadprivate-use-association.f90
@@ -0,0 +1,69 @@
+! This test checks lowering of OpenMP Threadprivate Directive.
+! Test for threadprivate variable in use association.
+
+!RUN: %flang_fc1 -emit-llvm -fopenmp %s -o - | FileCheck %s --check-prefix=LLVMIR
+
+!LLVMIR-DAG: @_QBblk = common global [24 x i8] zeroinitializer
+!LLVMIR-DAG: @_QMtestEy = global float undef
+
+!LLVMIR-DAG: @_QBblk.cache = common global i8** null
+!LLVMIR-DAG: @_QMtestEy.cache = common global i8** null
+
+module test
+  integer :: x
+  real :: y, z(5)
+  common /blk/ x, z
+
+  !$omp threadprivate(y, /blk/)
+
+contains
+  subroutine sub()
+    !$omp parallel
+! LLVMIR-LABEL: @_QMtestPsub..omp_par
+! LLVMIR-LABEL: omp.par.region{{.*}}
+!LLVMIR-DAG:  [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB0:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE0:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB0:[0-9]+]], i32 [[TMP0:%.*]], i8* getelementptr inbounds ([24 x i8], [24 x i8]* @_QBblk, i32 0, i32 0), i64 24, i8*** @_QBblk.cache)
+!LLVMIR-DAG:  [[INS4:%.*]] = bitcast i8* [[CACHE0]] to [24 x i8]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG:  [[CACHE1:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* bitcast (float* @_QMtestEy to i8*), i64 4, i8*** @_QMtestEy.cache)
+!LLVMIR-DAG:  [[INS7:%.*]] = bitcast i8* [[CACHE1]] to float*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[INS8:%.*]] = bitcast [24 x i8]* [[INS4]] to i8*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[INS9:%.*]] = getelementptr i8, i8* [[INS8]], i64 0, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = bitcast i8* [[INS9]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[INS11:%.*]] = getelementptr i8, i8* [[INS8]], i64 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = bitcast i8* [[INS11]] to [5 x float]*, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = load float, float* [[INS7]], align 4, !dbg !{{.*}}
+      print *, x, y, z
+    !$omp end parallel
+  end
+end
+
+program main
+  use test
+  integer :: x1
+  real :: z1(5)
+  common /blk/ x1, z1
+
+  !$omp threadprivate(/blk/)
+
+  call sub()
+
+  !$omp parallel
+! LLVMIR-LABEL: @_QQmain..omp_par
+! LLVMIR-LABEL: omp.par.region{{.*}}
+!LLVMIR-DAG:  [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
+!LLVMIR-DAG:  [[INS6:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1:%.*]], i8* getelementptr inbounds ([24 x i8], [24 x i8]* @_QBblk, i32 0, i32 0), i64 24, i8*** @_QBblk.cache)
+!LLVMIR-DAG:  [[INS7:%.*]] = bitcast i8* [[INS6]] to [24 x i8]*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
+!LLVMIR-DAG:  [[INS9:%.*]] = call i8* @__kmpc_threadprivate_cached(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1:%.*]], i8* bitcast (float* @_QMtestEy to i8*), i64 4, i8*** @_QMtestEy.cache)
+!LLVMIR-DAG:  [[INS10:%.*]] = bitcast i8* [[INS9]] to float*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[INS11:%.*]] = bitcast [24 x i8]* [[INS7]] to i8*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[INS12:%.*]] = getelementptr i8, i8* [[INS11]], i64 0, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = bitcast i8* [[INS12]] to i32*, !dbg !{{.*}}
+!LLVMIR-DAG:  [[INS14:%.*]] = getelementptr i8, i8* [[INS11]], i64 4, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = bitcast i8* [[INS14]] to [5 x float]*, !dbg !{{.*}}
+!LLVMIR-DAG:  %{{.*}} = load float, float* [[INS10]], align 4, !dbg !{{.*}}
+    print *, x1, y, z1
+  !$omp end parallel
+
+end
Index: mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
===================================================================
--- mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
+++ mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
@@ -52,7 +52,11 @@
   LogicalResult
   matchAndRewrite(T curOp, typename T::Adaptor adaptor,
                   ConversionPatternRewriter &rewriter) const override {
-    rewriter.replaceOpWithNewOp<T>(curOp, TypeRange(), adaptor.getOperands(),
+    TypeConverter *converter = ConvertToLLVMPattern::getTypeConverter();
+    SmallVector<Type> resTypes;
+    if (failed(converter->convertTypes(curOp->getResultTypes(), resTypes)))
+      return failure();
+    rewriter.replaceOpWithNewOp<T>(curOp, resTypes, adaptor.getOperands(),
                                    curOp->getAttrs());
     return success();
   }
@@ -65,10 +69,10 @@
                                mlir::omp::MasterOp>(
       [&](Operation *op) { return typeConverter.isLegal(&op->getRegion(0)); });
   target
-      .addDynamicallyLegalOp<mlir::omp::AtomicReadOp, mlir::omp::AtomicWriteOp>(
-          [&](Operation *op) {
-            return typeConverter.isLegal(op->getOperandTypes());
-          });
+      .addDynamicallyLegalOp<mlir::omp::AtomicReadOp, mlir::omp::AtomicWriteOp,
+                             mlir::omp::ThreadprivateOp>([&](Operation *op) {
+        return typeConverter.isLegal(op->getOperandTypes());
+      });
 }
 
 void mlir::populateOpenMPToLLVMConversionPatterns(LLVMTypeConverter &converter,
@@ -77,7 +81,8 @@
                RegionOpConversion<omp::ParallelOp>,
                RegionOpConversion<omp::WsLoopOp>,
                RegionLessOpConversion<omp::AtomicReadOp>,
-               RegionLessOpConversion<omp::AtomicWriteOp>>(converter);
+               RegionLessOpConversion<omp::AtomicWriteOp>,
+               RegionLessOpConversion<omp::ThreadprivateOp>>(converter);
 }
 
 namespace {