Index: llvm/include/llvm/CodeGen/MachineFunction.h =================================================================== --- llvm/include/llvm/CodeGen/MachineFunction.h +++ llvm/include/llvm/CodeGen/MachineFunction.h @@ -53,7 +53,6 @@ class Function; class GISelChangeObserver; class GlobalValue; -class LLVMTargetMachine; class MachineConstantPool; class MachineFrameInfo; class MachineFunction; @@ -69,6 +68,7 @@ class raw_ostream; class SlotIndexes; class StringRef; +class TargetMachine; class TargetRegisterClass; class TargetSubtargetInfo; struct WasmEHFuncInfo; @@ -256,7 +256,7 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction { Function &F; - const LLVMTargetMachine &Target; + const TargetMachine &Target; const TargetSubtargetInfo *STI; MCContext &Ctx; MachineModuleInfo &MMI; @@ -565,7 +565,7 @@ /// for instructions that have a stack spill fused into them. const static unsigned int DebugOperandMemNumber; - MachineFunction(Function &F, const LLVMTargetMachine &Target, + MachineFunction(Function &F, const TargetMachine &Target, const TargetSubtargetInfo &STI, unsigned FunctionNum, MachineModuleInfo &MMI); MachineFunction(const MachineFunction &) = delete; @@ -644,7 +644,7 @@ void assignBeginEndSections(); /// getTarget - Return the target machine this machine code is compiled with - const LLVMTargetMachine &getTarget() const { return Target; } + const TargetMachine &getTarget() const { return Target; } /// getSubtarget - Return the subtarget for which this machine code is being /// compiled. Index: llvm/include/llvm/CodeGen/MachineModuleInfo.h =================================================================== --- llvm/include/llvm/CodeGen/MachineModuleInfo.h +++ llvm/include/llvm/CodeGen/MachineModuleInfo.h @@ -44,10 +44,10 @@ class BasicBlock; class Function; -class LLVMTargetMachine; class MachineFunction; class Module; class MCSymbol; +class TargetMachine; //===----------------------------------------------------------------------===// /// This class can be derived from and used by targets to hold private @@ -77,7 +77,7 @@ friend class MachineModuleInfoWrapperPass; friend class MachineModuleAnalysis; - const LLVMTargetMachine &TM; + const TargetMachine &TM; /// This is the MCContext used for the entire code generator. MCContext Context; @@ -124,10 +124,9 @@ MachineModuleInfo &operator=(MachineModuleInfo &&MMII) = delete; public: - explicit MachineModuleInfo(const LLVMTargetMachine *TM = nullptr); + explicit MachineModuleInfo(const TargetMachine *TM = nullptr); - explicit MachineModuleInfo(const LLVMTargetMachine *TM, - MCContext *ExtContext); + explicit MachineModuleInfo(const TargetMachine *TM, MCContext *ExtContext); MachineModuleInfo(MachineModuleInfo &&MMII); @@ -136,7 +135,7 @@ void initialize(); void finalize(); - const LLVMTargetMachine &getTarget() const { return TM; } + const TargetMachine &getTarget() const { return TM; } const MCContext &getContext() const { return ExternalContext ? *ExternalContext : Context; @@ -207,9 +206,9 @@ public: static char ID; // Pass identification, replacement for typeid - explicit MachineModuleInfoWrapperPass(const LLVMTargetMachine *TM = nullptr); + explicit MachineModuleInfoWrapperPass(const TargetMachine *TM = nullptr); - explicit MachineModuleInfoWrapperPass(const LLVMTargetMachine *TM, + explicit MachineModuleInfoWrapperPass(const TargetMachine *TM, MCContext *ExtContext); // Initialization and Finalization @@ -225,13 +224,13 @@ friend AnalysisInfoMixin; static AnalysisKey Key; - const LLVMTargetMachine *TM; + const TargetMachine *TM; public: /// Provide the result type for this analysis pass. using Result = MachineModuleInfo; - MachineModuleAnalysis(const LLVMTargetMachine *TM) : TM(TM) {} + MachineModuleAnalysis(const TargetMachine *TM) : TM(TM) {} /// Run the analysis pass and produce machine module information. MachineModuleInfo run(Module &M, ModuleAnalysisManager &); Index: llvm/include/llvm/CodeGen/RegisterUsageInfo.h =================================================================== --- llvm/include/llvm/CodeGen/RegisterUsageInfo.h +++ llvm/include/llvm/CodeGen/RegisterUsageInfo.h @@ -29,7 +29,7 @@ namespace llvm { class Function; -class LLVMTargetMachine; +class TargetMachine; class PhysicalRegisterUsageInfo : public ImmutablePass { public: @@ -41,7 +41,7 @@ } /// Set TargetMachine which is used to print analysis. - void setTargetMachine(const LLVMTargetMachine &TM); + void setTargetMachine(const TargetMachine &TM); bool doInitialization(Module &M) override; @@ -63,7 +63,7 @@ /// and 1 means content of register will be preserved around function call. DenseMap> RegMasks; - const LLVMTargetMachine *TM; + const TargetMachine *TM; }; } // end namespace llvm Index: llvm/include/llvm/CodeGen/ScheduleDAG.h =================================================================== --- llvm/include/llvm/CodeGen/ScheduleDAG.h +++ llvm/include/llvm/CodeGen/ScheduleDAG.h @@ -554,7 +554,7 @@ class ScheduleDAG { public: - const LLVMTargetMachine &TM; ///< Target processor + const TargetMachine &TM; ///< Target processor const TargetInstrInfo *TII; ///< Target instruction information const TargetRegisterInfo *TRI; ///< Target processor register info MachineFunction &MF; ///< Machine function Index: llvm/include/llvm/Target/TargetMachine.h =================================================================== --- llvm/include/llvm/Target/TargetMachine.h +++ llvm/include/llvm/Target/TargetMachine.h @@ -128,6 +128,14 @@ StringRef getTargetFeatureString() const { return TargetFS; } void setTargetFeatureString(StringRef FS) { TargetFS = std::string(FS); } + /// True if the target uses physical regs (as nearly all targets do). False + /// for stack machines such as WebAssembly and other virtual-register + /// machines. If true, all vregs must be allocated before PEI. If false, then + /// callee-save register spilling and scavenging are not needed or used. If + /// false, implicitly defined registers will still be assumed to be physical + /// registers, except that variadic defs will be allocated vregs. + virtual bool usesPhysRegsForValues() const { return true; } + /// Virtual method implemented by subclasses that returns a reference to that /// target's TargetSubtargetInfo-derived member variable. virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const { @@ -397,6 +405,10 @@ virtual unsigned getSjLjDataSize() const { return DefaultSjLjDataSize; } static std::pair parseBinutilsVersion(StringRef Version); + + /// The default variant to use in unqualified `asm` instructions. + /// If this returns 0, `asm "$(foo$|bar$)"` will evaluate to `asm "foo"`. + virtual int unqualifiedInlineAsmVariant() const { return 0; } }; /// This class describes a target machine that is implemented with the LLVM @@ -471,23 +483,11 @@ createMCStreamer(raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, MCContext &Ctx); - /// True if the target uses physical regs (as nearly all targets do). False - /// for stack machines such as WebAssembly and other virtual-register - /// machines. If true, all vregs must be allocated before PEI. If false, then - /// callee-save register spilling and scavenging are not needed or used. If - /// false, implicitly defined registers will still be assumed to be physical - /// registers, except that variadic defs will be allocated vregs. - virtual bool usesPhysRegsForValues() const { return true; } - /// True if the target wants to use interprocedural register allocation by /// default. The -enable-ipra flag can be used to override this. virtual bool useIPRA() const { return false; } - - /// The default variant to use in unqualified `asm` instructions. - /// If this returns 0, `asm "$(foo$|bar$)"` will evaluate to `asm "foo"`. - virtual int unqualifiedInlineAsmVariant() const { return 0; } }; /// Helper method for getting the code model, returning Default if Index: llvm/lib/CodeGen/MIRParser/MIRParser.cpp =================================================================== --- llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -297,7 +297,7 @@ yaml::MachineFunction YamlMF; yaml::EmptyContext Ctx; - const LLVMTargetMachine &TM = MMI.getTarget(); + const TargetMachine &TM = MMI.getTarget(); YamlMF.MachineFuncInfo = std::unique_ptr( TM.createDefaultFuncInfoYAML()); @@ -389,7 +389,7 @@ PerFunctionMIParsingState &PFS, const yaml::MachineFunction &YamlMF) { MachineFunction &MF = PFS.MF; SMDiagnostic Error; - const LLVMTargetMachine &TM = MF.getTarget(); + const TargetMachine &TM = MF.getTarget(); for (auto YamlCSInfo : YamlMF.CallSitesInfo) { yaml::CallSiteInfo::MachineInstrLoc MILoc = YamlCSInfo.CallLocation; if (MILoc.BlockNum >= MF.size()) @@ -541,7 +541,7 @@ return true; if (YamlMF.MachineFuncInfo) { - const LLVMTargetMachine &TM = MF.getTarget(); + const TargetMachine &TM = MF.getTarget(); // Note this is called after the initial constructor of the // MachineFunctionInfo based on the MachineFunction, which may depend on the // IR. Index: llvm/lib/CodeGen/MachineFunction.cpp =================================================================== --- llvm/lib/CodeGen/MachineFunction.cpp +++ llvm/lib/CodeGen/MachineFunction.cpp @@ -138,7 +138,7 @@ return STI->getFrameLowering()->getStackAlign().value(); } -MachineFunction::MachineFunction(Function &F, const LLVMTargetMachine &Target, +MachineFunction::MachineFunction(Function &F, const TargetMachine &Target, const TargetSubtargetInfo &STI, unsigned FunctionNum, MachineModuleInfo &mmi) : F(F), Target(Target), STI(&STI), Ctx(mmi.getContext()), MMI(mmi) { Index: llvm/lib/CodeGen/MachineModuleInfo.cpp =================================================================== --- llvm/lib/CodeGen/MachineModuleInfo.cpp +++ llvm/lib/CodeGen/MachineModuleInfo.cpp @@ -74,7 +74,7 @@ TheModule = MMI.TheModule; } -MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM) +MachineModuleInfo::MachineModuleInfo(const TargetMachine *TM) : TM(*TM), Context(TM->getTargetTriple(), TM->getMCAsmInfo(), TM->getMCRegisterInfo(), TM->getMCSubtargetInfo(), nullptr, nullptr, false) { @@ -82,7 +82,7 @@ initialize(); } -MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM, +MachineModuleInfo::MachineModuleInfo(const TargetMachine *TM, MCContext *ExtContext) : TM(*TM), Context(TM->getTargetTriple(), TM->getMCAsmInfo(), TM->getMCRegisterInfo(), TM->getMCSubtargetInfo(), @@ -175,13 +175,13 @@ } MachineModuleInfoWrapperPass::MachineModuleInfoWrapperPass( - const LLVMTargetMachine *TM) + const TargetMachine *TM) : ImmutablePass(ID), MMI(TM) { initializeMachineModuleInfoWrapperPassPass(*PassRegistry::getPassRegistry()); } MachineModuleInfoWrapperPass::MachineModuleInfoWrapperPass( - const LLVMTargetMachine *TM, MCContext *ExtContext) + const TargetMachine *TM, MCContext *ExtContext) : ImmutablePass(ID), MMI(TM, ExtContext) { initializeMachineModuleInfoWrapperPassPass(*PassRegistry::getPassRegistry()); } Index: llvm/lib/CodeGen/RegUsageInfoCollector.cpp =================================================================== --- llvm/lib/CodeGen/RegUsageInfoCollector.cpp +++ llvm/lib/CodeGen/RegUsageInfoCollector.cpp @@ -100,7 +100,7 @@ bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) { MachineRegisterInfo *MRI = &MF.getRegInfo(); const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); - const LLVMTargetMachine &TM = MF.getTarget(); + const TargetMachine &TM = MF.getTarget(); LLVM_DEBUG(dbgs() << " -------------------- " << getPassName() << " -------------------- \nFunction Name : " Index: llvm/lib/CodeGen/RegisterUsageInfo.cpp =================================================================== --- llvm/lib/CodeGen/RegisterUsageInfo.cpp +++ llvm/lib/CodeGen/RegisterUsageInfo.cpp @@ -37,7 +37,7 @@ char PhysicalRegisterUsageInfo::ID = 0; -void PhysicalRegisterUsageInfo::setTargetMachine(const LLVMTargetMachine &TM) { +void PhysicalRegisterUsageInfo::setTargetMachine(const TargetMachine &TM) { this->TM = &TM; } Index: llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp =================================================================== --- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp +++ llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp @@ -197,7 +197,7 @@ void NVPTXAsmPrinter::lowerImageHandleSymbol(unsigned Index, MCOperand &MCOp) { // Ewwww - LLVMTargetMachine &TM = const_cast(MF->getTarget()); + TargetMachine &TM = const_cast(MF->getTarget()); NVPTXTargetMachine &nvTM = static_cast(TM); const NVPTXMachineFunctionInfo *MFI = MF->getInfo(); const char *Sym = MFI->getImageHandleSymbol(Index);