Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -8033,6 +8033,7 @@
       // Put Cond in a virtual register to make it available from the new blocks.
       ExportFromCurrentBlock(Cond);
     }
+    UnhandledWeights -= I->Weight;
 
     switch (I->Kind) {
       case CC_JumpTable: {
@@ -8103,7 +8104,6 @@
         }
 
         // The false weight is the sum of all unhandled cases.
-        UnhandledWeights -= I->Weight;
         CaseBlock CB(CC, LHS, RHS, MHS, I->MBB, Fallthrough, CurMBB, I->Weight,
                      UnhandledWeights);
 
Index: test/CodeGen/X86/switch-edge-weight.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/switch-edge-weight.ll
@@ -0,0 +1,43 @@
+; RUN: llc -march=x86-64 -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
+
+; Check if weights are correctly assigned to edges generated from switch
+; statement.
+
+; CHECK: BB#4:
+; CHECK: Successors according to CFG: BB#1(10) BB#6(10)
+; CHECK: BB#6:
+; CHECK: Successors according to CFG: BB#1(10) BB#2(10)
+
+define void @test(i8* %l) nounwind {
+entry:
+  %l.addr = alloca i8*, align 8
+  store i8* %l, i8** %l.addr
+  %tmp = load i8*, i8** %l.addr
+  %tmp1 = load i8, i8* %tmp
+  %conv = sext i8 %tmp1 to i32
+  switch i32 %conv, label %sw.default [
+    i32 54, label %sw.bb
+    i32 55, label %sw.bb
+    i32 56, label %sw.bb
+    i32 58, label %sw.bb
+    i32 67, label %sw.bb
+    i32 68, label %sw.bb
+    i32 134, label %sw.bb
+    i32 140, label %sw.bb
+  ], !prof !1
+
+sw.bb:
+  call void @foo(i32 0)
+  br label %sw.epilog
+
+sw.default:
+  call void @foo(i32 97)
+  br label %sw.epilog
+
+sw.epilog:
+  ret void
+}
+
+declare void @foo(i32)
+
+!1 = !{!"branch_weights", i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10}