Index: mlir/benchmark/python/common.py =================================================================== --- mlir/benchmark/python/common.py +++ mlir/benchmark/python/common.py @@ -16,7 +16,7 @@ """Setup pass pipeline parameters for benchmark functions. """ opt = ( - "parallelization-strategy=0" + "parallelization-strategy=none" " vectorization-strategy=0 vl=1 enable-simd-index32=False" ) pipeline = f"sparse-compiler{{{opt}}}" Index: mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h =================================================================== --- mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h +++ mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h @@ -30,12 +30,14 @@ struct SparseCompilerOptions : public PassPipelineOptions { // These options must be kept in sync with `SparsificationBase`. - PassOptions::Option parallelization{ + + PassOptions::Option parallelization{ *this, "parallelization-strategy", - desc("Set the parallelization strategy"), init(0)}; - PassOptions::Option vectorization{ + desc("Set the parallelization strategy"), + init(SparseParallelizationStrategy::kNone)}; + PassOptions::Option vectorization{ *this, "vectorization-strategy", desc("Set the vectorization strategy"), - init(0)}; + init(SparseVectorizationStrategy::kNone)}; PassOptions::Option vectorLength{ *this, "vl", desc("Set the vector length"), init(1)}; PassOptions::Option enableSIMDIndex32{ @@ -47,10 +49,8 @@ /// Projects out the options for `createSparsificationPass`. SparsificationOptions sparsificationOptions() const { - return SparsificationOptions(sparseParallelizationStrategy(parallelization), - sparseVectorizationStrategy(vectorization), - vectorLength, enableSIMDIndex32, - enableVLAVectorization); + return SparsificationOptions(parallelization, vectorization, vectorLength, + enableSIMDIndex32, enableVLAVectorization); } // These options must be kept in sync with `SparseTensorConversionBase`. Index: mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h =================================================================== --- mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h +++ mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h @@ -45,9 +45,6 @@ // TODO: support reduction parallelization too? }; -/// Converts command-line parallelization flag to the strategy enum. -SparseParallelizationStrategy sparseParallelizationStrategy(int32_t flag); - /// Defines a vectorization strategy. Any inner loop is a candidate (full SIMD /// for parallel loops and horizontal SIMD for reduction loops). A loop is /// actually vectorized if (1) allowed by the strategy, and (2) the emitted @@ -58,9 +55,6 @@ kAnyStorageInnerLoop }; -/// Converts command-line vectorization flag to the strategy enum. -SparseVectorizationStrategy sparseVectorizationStrategy(int32_t flag); - /// Options for the Sparsification pass. struct SparsificationOptions { SparsificationOptions(SparseParallelizationStrategy p, Index: mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td =================================================================== --- mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td +++ mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td @@ -63,10 +63,34 @@ "vector::VectorDialect", ]; let options = [ - Option<"parallelization", "parallelization-strategy", "int32_t", "0", - "Set the parallelization strategy">, - Option<"vectorization", "vectorization-strategy", "int32_t", "0", - "Set the vectorization strategy">, + Option<"parallelization", "parallelization-strategy", "enum SparseParallelizationStrategy", + "mlir::SparseParallelizationStrategy::kNone", + "Set the parallelization strategy", [{llvm::cl::values( + clEnumValN(mlir::SparseParallelizationStrategy::kNone, "none", + "Turn off sparse parallelization."), + clEnumValN(mlir::SparseParallelizationStrategy::kDenseOuterLoop, + "dense-outer-loop", + "Enable dense outer loop sparse parallelization."), + clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageOuterLoop, + "any-storage-outer-loop", + "Enable sparse parallelization regardless of storage for the outer loop."), + clEnumValN(mlir::SparseParallelizationStrategy::kDenseAnyLoop, + "dense-any-loop", + "Enable dense parallelization for any loop."), + clEnumValN(mlir::SparseParallelizationStrategy::kAnyStorageAnyLoop, + "any-storage-any-loop", + "Enable sparse parallelization for any storage and loop."))}]>, + Option<"vectorization", "vectorization-strategy", "enum SparseVectorizationStrategy", + "mlir::SparseVectorizationStrategy::kNone", + "Set the vectorization strategy", [{llvm::cl::values( + clEnumValN(mlir::SparseVectorizationStrategy::kNone, "none", + "Turn off sparse vectorization."), + clEnumValN(mlir::SparseVectorizationStrategy::kDenseInnerLoop, + "dense-inner-loop", + "Enable vectorization for dense inner loops."), + clEnumValN(mlir::SparseVectorizationStrategy::kAnyStorageInnerLoop, + "any-storage-inner-loop", + "Enable sparse vectorization for inner loops with any storage."))}]>, Option<"vectorLength", "vl", "int32_t", "1", "Set the vector length">, Option<"enableSIMDIndex32", "enable-simd-index32", "bool", "false", Index: mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp =================================================================== --- mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp +++ mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp @@ -39,8 +39,8 @@ SparsificationPass() = default; SparsificationPass(const SparsificationPass &pass) = default; SparsificationPass(const SparsificationOptions &options) { - parallelization = static_cast(options.parallelizationStrategy); - vectorization = static_cast(options.vectorizationStrategy); + parallelization = options.parallelizationStrategy; + vectorization = options.vectorizationStrategy; vectorLength = options.vectorLength; enableSIMDIndex32 = options.enableSIMDIndex32; enableVLAVectorization = options.enableVLAVectorization; @@ -50,10 +50,8 @@ auto *ctx = &getContext(); RewritePatternSet patterns(ctx); // Translate strategy flags to strategy options. - SparsificationOptions options( - sparseParallelizationStrategy(parallelization), - sparseVectorizationStrategy(vectorization), vectorLength, - enableSIMDIndex32, enableVLAVectorization); + SparsificationOptions options(parallelization, vectorization, vectorLength, + enableSIMDIndex32, enableVLAVectorization); // Apply rewriting. populateSparsificationPatterns(patterns, options); vector::populateVectorToVectorCanonicalizationPatterns(patterns); @@ -133,33 +131,6 @@ } // namespace -SparseParallelizationStrategy -mlir::sparseParallelizationStrategy(int32_t flag) { - switch (flag) { - default: - return SparseParallelizationStrategy::kNone; - case 1: - return SparseParallelizationStrategy::kDenseOuterLoop; - case 2: - return SparseParallelizationStrategy::kAnyStorageOuterLoop; - case 3: - return SparseParallelizationStrategy::kDenseAnyLoop; - case 4: - return SparseParallelizationStrategy::kAnyStorageAnyLoop; - } -} - -SparseVectorizationStrategy mlir::sparseVectorizationStrategy(int32_t flag) { - switch (flag) { - default: - return SparseVectorizationStrategy::kNone; - case 1: - return SparseVectorizationStrategy::kDenseInnerLoop; - case 2: - return SparseVectorizationStrategy::kAnyStorageInnerLoop; - } -} - SparseToSparseConversionStrategy mlir::sparseToSparseConversionStrategy(int32_t flag) { switch (flag) { Index: mlir/test/Dialect/SparseTensor/sparse_parallel.mlir =================================================================== --- mlir/test/Dialect/SparseTensor/sparse_parallel.mlir +++ mlir/test/Dialect/SparseTensor/sparse_parallel.mlir @@ -1,12 +1,12 @@ -// RUN: mlir-opt %s -sparsification="parallelization-strategy=0" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=none" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR0 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=1" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=dense-outer-loop" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR1 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=2" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=any-storage-outer-loop" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR2 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=3" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=dense-any-loop" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR3 -// RUN: mlir-opt %s -sparsification="parallelization-strategy=4" | \ +// RUN: mlir-opt %s -sparsification="parallelization-strategy=any-storage-any-loop" | \ // RUN: FileCheck %s --check-prefix=CHECK-PAR4 #DenseMatrix = #sparse_tensor.encoding<{ Index: mlir/test/Dialect/SparseTensor/sparse_vector.mlir =================================================================== --- mlir/test/Dialect/SparseTensor/sparse_vector.mlir +++ mlir/test/Dialect/SparseTensor/sparse_vector.mlir @@ -1,12 +1,12 @@ -// RUN: mlir-opt %s -sparsification="vectorization-strategy=0 vl=16" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=none vl=16" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC0 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=1 vl=16" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=dense-inner-loop vl=16" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC1 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC2 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16 enable-simd-index32=true" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16 enable-simd-index32=true" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC3 -// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=4 enable-vla-vectorization=true" -cse -split-input-file | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=4 enable-vla-vectorization=true" -cse -split-input-file | \ // RUN: FileCheck %s --check-prefix=CHECK-VEC4 #DenseVector = #sparse_tensor.encoding<{ dimLevelType = [ "dense" ] }> Index: mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir =================================================================== --- mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir +++ mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/generate-test-checks.py -// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=8" -canonicalize | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=8" -canonicalize | \ // RUN: FileCheck %s #SparseMatrix = #sparse_tensor.encoding<{dimLevelType = ["dense","compressed"]}> Index: mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir =================================================================== --- mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir +++ mlir/test/Dialect/SparseTensor/sparse_vector_index.mlir @@ -5,7 +5,7 @@ // about what constitutes a good test! The CHECK should be // minimized and named to reflect the test intent. -// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=8" -canonicalize | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=8" -canonicalize | \ // RUN: FileCheck %s #SparseVector = #sparse_tensor.encoding<{ Index: mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir =================================================================== --- mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir +++ mlir/test/Dialect/SparseTensor/sparse_vector_peeled.mlir @@ -1,4 +1,4 @@ -// RUN: mlir-opt %s -sparsification="vectorization-strategy=2 vl=16" -scf-for-loop-peeling -canonicalize | \ +// RUN: mlir-opt %s -sparsification="vectorization-strategy=any-storage-inner-loop vl=16" -scf-for-loop-peeling -canonicalize | \ // RUN: FileCheck %s #SparseVector = #sparse_tensor.encoding<{ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir @@ -6,7 +6,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test.tns" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir @@ -8,7 +8,7 @@ // Do the same run, but now with SIMDization as well. This should not change the outcome. // // RUN: mlir-opt %s \ -// RUN: --sparse-compiler="vectorization-strategy=2 vl=16 enable-simd-index32" | \ +// RUN: --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=16 enable-simd-index32" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/wide.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/mttkrp_b.tns" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=8" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=8" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir @@ -8,7 +8,7 @@ // Do the same run, but now with SIMDization as well. This should not change the outcome. // // RUN: mlir-opt %s \ -// RUN: --sparse-compiler="vectorization-strategy=2 vl=4 enable-simd-index32" | \ +// RUN: --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4 enable-simd-index32" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir @@ -5,7 +5,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=8" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=8" | \ // RUN: mlir-cpu-runner -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir @@ -6,7 +6,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=4" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=4" | \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ // RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/wide.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ Index: mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir +++ mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir @@ -7,7 +7,7 @@ // // Do the same run, but now with SIMDization as well. This should not change the outcome. // -// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=2 vl=2" | \ +// RUN: mlir-opt %s --sparse-compiler="vectorization-strategy=any-storage-inner-loop vl=2" | \ // RUN: TENSOR0="%mlir_integration_test_dir/data/test_symmetric.mtx" \ // RUN: mlir-cpu-runner \ // RUN: -e entry -entry-point-result=void \ Index: mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py +++ mlir/test/Integration/Dialect/SparseTensor/python/test_SDDMM.py @@ -140,22 +140,24 @@ ir.AffineMap.get_permutation([0, 1]), ir.AffineMap.get_permutation([1, 0]) ] + vec_strategy = [ + 'none', 'dense-inner-loop' + ] for level in levels: for ordering in orderings: for pwidth in [32]: for iwidth in [32]: - for par in [0]: - for vec in [0, 1]: - for e in [True]: - vl = 1 if vec == 0 else 16 - attr = st.EncodingAttr.get(level, ordering, pwidth, iwidth) - opt = (f'parallelization-strategy={par} ' - f'vectorization-strategy={vec} ' - f'vl={vl} enable-simd-index32={e}') - compiler = sparse_compiler.SparseCompiler( - options=opt, opt_level=0, shared_libs=[support_lib]) - build_compile_and_run_SDDMMM(attr, compiler) - count = count + 1 + for vec in vec_strategy: + for e in [True]: + vl = 1 if vec == 0 else 16 + attr = st.EncodingAttr.get(level, ordering, pwidth, iwidth) + opt = (f'parallelization-strategy=none ' + f'vectorization-strategy={vec} ' + f'vl={vl} enable-simd-index32={e}') + compiler = sparse_compiler.SparseCompiler( + options=opt, opt_level=0, shared_libs=[support_lib]) + build_compile_and_run_SDDMMM(attr, compiler) + count = count + 1 # CHECK: Passed 16 tests print('Passed ', count, 'tests') Index: mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py +++ mlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py @@ -120,12 +120,10 @@ # a *single* sparse tensor. Note that we deliberate do not exhaustively # search the full state space to reduce runtime of the test. It is # straightforward to adapt the code below to explore more combinations. - par = 0 - vec = 0 vl = 1 e = False - opt = (f'parallelization-strategy={par} ' - f'vectorization-strategy={vec} ' + opt = (f'parallelization-strategy=none ' + f'vectorization-strategy=none ' f'vl={vl} enable-simd-index32={e}') levels = [[st.DimLevelType.dense, st.DimLevelType.dense], [st.DimLevelType.dense, st.DimLevelType.compressed], Index: mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py =================================================================== --- mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py +++ mlir/test/Integration/Dialect/SparseTensor/python/test_stress.py @@ -182,13 +182,11 @@ # CHECK-LABEL: TEST: test_stress print("\nTEST: test_stress") with ir.Context() as ctx, ir.Location.unknown(): - par = 0 - vec = 0 vl = 1 e = False sparsification_options = ( - f'parallelization-strategy={par} ' - f'vectorization-strategy={vec} ' + f'parallelization-strategy=none ' + f'vectorization-strategy=none ' f'vl={vl} ' f'enable-simd-index32={e}') compiler = sparse_compiler.SparseCompiler(